| Message ID | 5665AE16.8090001@foss.arm.com |
|---|---|
| State | New |
| Headers | show |
On Mon, Dec 7, 2015 at 4:04 PM, Matthew Wahab <matthew.wahab@foss.arm.com> wrote: > Ping. Updated patch attached. > Matthew > > > On 26/11/15 15:55, Matthew Wahab wrote: >> >> Hello, >> >> >> ARMv8.1 includes an extension to ARM which adds two Adv.SIMD >> instructions, vqrdmlah and vqrdmlsh. This patch set adds support for >> ARMv8.1 and for the new instructions, enabling the architecture with >> --march=armv8.1-a. The new instructions are enabled when both ARMv8.1 >> and a suitable fpu options are set, for instance with -march=armv8.1-a >> -mfpu=neon-fp-armv8 -mfloat-abi=hard. >> >> This patch set adds the command line options and internal feature >> macros. Following patches >> - enable multilib support for ARMv8.1, >> - add patterns for the new instructions, >> - add the ACLE feature macro for the ARMv8.1 extensions, >> - extend target support in the testsuite to ARMv8.1, >> - add the ACLE intrinsics for vqrmdl{as}h and >> - add the ACLE intrinsics for vqrmdl{as}h_lane. >> >> Tested the series for arm-none-eabi with cross-compiled check-gcc on an >> ARMv8.1 emulator. Also tested arm-none-linux-gnueabihf with native >> bootstrap and make check. >> >> Is this ok for trunk? >> Matthew >> >> gcc/ >> 2015-11-26 Matthew Wahab <matthew.wahab@arm.com> >> >> * config/arm/arm-arches.def: Add "armv8.1-a" and "armv8.1-a+crc". >> * config/arm/arm-protos.h (FL2_ARCH8_1): New. >> (FL2_FOR_ARCH8_1A): New. >> * config/arm/arm-tables.opt: Regenerate. >> * config/arm/arm.c (arm_arch8_1): New. >> (arm_option_override): Set arm_arch8_1. >> * config/arm/arm.h (TARGET_NEON_RDMA): New. >> (arm_arch8_1): Declare. >> * doc/invoke.texi (ARM Options, -march): Add "armv8.1-a" and >> "armv8.1-a+crc". >> (ARM Options, -mfpu): Fix a typo. > > OK.
On Thu, Dec 10, 2015 at 10:43 AM, Ramana Radhakrishnan <ramana.gcc@googlemail.com> wrote: > On Mon, Dec 7, 2015 at 4:04 PM, Matthew Wahab > <matthew.wahab@foss.arm.com> wrote: >> Ping. Updated patch attached. >> Matthew >> >> >> On 26/11/15 15:55, Matthew Wahab wrote: >>> >>> Hello, >>> >>> >>> ARMv8.1 includes an extension to ARM which adds two Adv.SIMD >>> instructions, vqrdmlah and vqrdmlsh. This patch set adds support for >>> ARMv8.1 and for the new instructions, enabling the architecture with >>> --march=armv8.1-a. The new instructions are enabled when both ARMv8.1 >>> and a suitable fpu options are set, for instance with -march=armv8.1-a >>> -mfpu=neon-fp-armv8 -mfloat-abi=hard. >>> >>> This patch set adds the command line options and internal feature >>> macros. Following patches >>> - enable multilib support for ARMv8.1, >>> - add patterns for the new instructions, >>> - add the ACLE feature macro for the ARMv8.1 extensions, >>> - extend target support in the testsuite to ARMv8.1, >>> - add the ACLE intrinsics for vqrmdl{as}h and >>> - add the ACLE intrinsics for vqrmdl{as}h_lane. >>> >>> Tested the series for arm-none-eabi with cross-compiled check-gcc on an >>> ARMv8.1 emulator. Also tested arm-none-linux-gnueabihf with native >>> bootstrap and make check. >>> >>> Is this ok for trunk? >>> Matthew >>> >>> gcc/ >>> 2015-11-26 Matthew Wahab <matthew.wahab@arm.com> >>> >>> * config/arm/arm-arches.def: Add "armv8.1-a" and "armv8.1-a+crc". >>> * config/arm/arm-protos.h (FL2_ARCH8_1): New. >>> (FL2_FOR_ARCH8_1A): New. >>> * config/arm/arm-tables.opt: Regenerate. >>> * config/arm/arm.c (arm_arch8_1): New. >>> (arm_option_override): Set arm_arch8_1. >>> * config/arm/arm.h (TARGET_NEON_RDMA): New. >>> (arm_arch8_1): Declare. >>> * doc/invoke.texi (ARM Options, -march): Add "armv8.1-a" and >>> "armv8.1-a+crc". >>> (ARM Options, -mfpu): Fix a typo. >> >> > > OK. I couldn't find 0/7 but in addition here you need to update the output for TAG_FP_SIMD_Arch to be 4. regards Ramana
On 10/12/15 11:02, Ramana Radhakrishnan wrote: > On Thu, Dec 10, 2015 at 10:43 AM, Ramana Radhakrishnan > <ramana.gcc@googlemail.com> wrote: >> On Mon, Dec 7, 2015 at 4:04 PM, Matthew Wahab >> <matthew.wahab@foss.arm.com> wrote: >>> Ping. Updated patch attached. >>> Matthew >>> >>> >>> On 26/11/15 15:55, Matthew Wahab wrote: >>>> >>>> Hello, >>>> >>>> >>>> ARMv8.1 includes an extension to ARM which adds two Adv.SIMD >>>> instructions, vqrdmlah and vqrdmlsh. This patch set adds support for >>>> ARMv8.1 and for the new instructions, enabling the architecture with >>>> --march=armv8.1-a. The new instructions are enabled when both ARMv8.1 >>>> and a suitable fpu options are set, for instance with -march=armv8.1-a >>>> -mfpu=neon-fp-armv8 -mfloat-abi=hard. >>>> [..] >>>> gcc/ >>>> 2015-11-26 Matthew Wahab <matthew.wahab@arm.com> >>>> >>>> * config/arm/arm-arches.def: Add "armv8.1-a" and "armv8.1-a+crc". >>>> * config/arm/arm-protos.h (FL2_ARCH8_1): New. >>>> (FL2_FOR_ARCH8_1A): New. >>>> * config/arm/arm-tables.opt: Regenerate. >>>> * config/arm/arm.c (arm_arch8_1): New. >>>> (arm_option_override): Set arm_arch8_1. >>>> * config/arm/arm.h (TARGET_NEON_RDMA): New. >>>> (arm_arch8_1): Declare. >>>> * doc/invoke.texi (ARM Options, -march): Add "armv8.1-a" and >>>> "armv8.1-a+crc". >>>> (ARM Options, -mfpu): Fix a typo. >>> >>> >> >> OK. > > I couldn't find 0/7 but in addition here you need to update the output > for TAG_FP_SIMD_Arch to be 4. > > regards > Ramana After discussing this offline, it turns out that the relevant attribute (Tag_Advanced_SIMD_arch) is set by the assembler. Matthew
>> >> I couldn't find 0/7 but in addition here you need to update the output >> for TAG_FP_SIMD_Arch to be 4. >> >> regards >> Ramana > > After discussing this offline, it turns out that the relevant attribute (Tag_Advanced_SIMD_arch) is set by the assembler. Yep - sorry about the noise. The patch set is OK with the changes suggested. Ramana > > Matthew > > > >
From 65bcf9a875fd31f6201e64cbbd4fdfb0b8f4719e Mon Sep 17 00:00:00 2001 From: Matthew Wahab <matthew.wahab@arm.com> Date: Tue, 1 Sep 2015 11:31:25 +0100 Subject: [PATCH 1/7] [ARM] Add ARMv8.1 architecture flags and options. Change-Id: I6bb0c7f020613a1a17e40bccc28b00c30d644c70 --- gcc/config/arm/arm-arches.def | 5 +++++ gcc/config/arm/arm-protos.h | 3 +++ gcc/config/arm/arm-tables.opt | 10 ++++++++-- gcc/config/arm/arm.c | 4 ++++ gcc/config/arm/arm.h | 6 ++++++ gcc/doc/invoke.texi | 6 +++--- 6 files changed, 29 insertions(+), 5 deletions(-) diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/arm/arm-arches.def index ddf6c3c..6c83153 100644 --- a/gcc/config/arm/arm-arches.def +++ b/gcc/config/arm/arm-arches.def @@ -57,6 +57,11 @@ ARM_ARCH("armv7-m", cortexm3, 7M, ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_FOR_ ARM_ARCH("armv7e-m", cortexm4, 7EM, ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_FOR_ARCH7EM)) ARM_ARCH("armv8-a", cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_FOR_ARCH8A)) ARM_ARCH("armv8-a+crc",cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A)) +ARM_ARCH ("armv8.1-a", cortexa53, 8A, + ARM_FSET_MAKE (FL_CO_PROC | FL_FOR_ARCH8A, FL2_FOR_ARCH8_1A)) +ARM_ARCH ("armv8.1-a+crc",cortexa53, 8A, + ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A, + FL2_FOR_ARCH8_1A)) ARM_ARCH("iwmmxt", iwmmxt, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT)) ARM_ARCH("iwmmxt2", iwmmxt2, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2)) diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index e7328e7..d649e86 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -387,6 +387,8 @@ extern bool arm_is_constant_pool_ref (rtx); #define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */ #define FL_ARCH6KZ (1 << 31) /* ARMv6KZ architecture. */ +#define FL2_ARCH8_1 (1 << 0) /* Architecture 8.1. */ + /* Flags that only effect tuning, not available instructions. */ #define FL_TUNE (FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \ | FL_CO_PROC) @@ -415,6 +417,7 @@ extern bool arm_is_constant_pool_ref (rtx); #define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_THUMB_DIV) #define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM) #define FL_FOR_ARCH8A (FL_FOR_ARCH7VE | FL_ARCH8) +#define FL2_FOR_ARCH8_1A FL2_ARCH8_1 /* There are too many feature bits to fit in a single word so the set of cpu and fpu capabilities is a structure. A feature set is created and manipulated diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index 48aac41..db17f6e 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -416,10 +416,16 @@ EnumValue Enum(arm_arch) String(armv8-a+crc) Value(26) EnumValue -Enum(arm_arch) String(iwmmxt) Value(27) +Enum(arm_arch) String(armv8.1-a) Value(27) EnumValue -Enum(arm_arch) String(iwmmxt2) Value(28) +Enum(arm_arch) String(armv8.1-a+crc) Value(28) + +EnumValue +Enum(arm_arch) String(iwmmxt) Value(29) + +EnumValue +Enum(arm_arch) String(iwmmxt2) Value(30) Enum Name(arm_fpu) Type(int) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 3588b83..f89411e 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -817,6 +817,9 @@ int arm_arch7em = 0; /* Nonzero if instructions present in ARMv8 can be used. */ int arm_arch8 = 0; +/* Nonzero if this chip supports the ARMv8.1 extensions. */ +int arm_arch8_1 = 0; + /* Nonzero if this chip can benefit from load scheduling. */ int arm_ld_sched = 0; @@ -3154,6 +3157,7 @@ arm_option_override (void) arm_arch7 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH7); arm_arch7em = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH7EM); arm_arch8 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH8); + arm_arch8_1 = ARM_FSET_HAS_CPU2 (insn_flags, FL2_ARCH8_1); arm_arch_thumb2 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB2); arm_arch_xscale = ARM_FSET_HAS_CPU1 (insn_flags, FL_XSCALE); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index fd999dd..f3c5e11 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -218,6 +218,9 @@ extern void (*arm_lang_output_object_attributes_hook)(void); (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP \ && ARM_FPU_FSET_HAS (TARGET_FPU_FEATURES, FPU_FL_NEON)) +/* FPU supports ARMv8.1 Adv.SIMD extensions. */ +#define TARGET_NEON_RDMA (TARGET_NEON && arm_arch8_1) + /* Q-bit is present. */ #define TARGET_ARM_QBIT \ (TARGET_32BIT && arm_arch5e && (arm_arch_notm || arm_arch7)) @@ -437,6 +440,9 @@ extern int arm_arch7em; /* Nonzero if this chip supports the ARM Architecture 8 extensions. */ extern int arm_arch8; +/* Nonzero if this chip supports the ARM Architecture 8.1 extensions. */ +extern int arm_arch8_1; + /* Nonzero if this chip can benefit from load scheduling. */ extern int arm_ld_sched; diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 33f579f..f479b4b 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -13534,8 +13534,8 @@ of the @option{-mcpu=} option. Permissible names are: @samp{armv2}, @samp{armv6}, @samp{armv6j}, @samp{armv6t2}, @samp{armv6z}, @samp{armv6kz}, @samp{armv6-m}, @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m}, -@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc}, -@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. +@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc}, @samp{armv8.1-a}, +@samp{armv8.1-a+crc}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. @option{-march=armv7ve} is the armv7-a architecture with virtualization extensions. @@ -13638,7 +13638,7 @@ available on the target. Permissible names are: @samp{vfp}, @samp{vfpv3}, @samp{vfpv3xd-fp16}, @samp{neon}, @samp{neon-fp16}, @samp{vfpv4}, @samp{vfpv4-d16}, @samp{fpv4-sp-d16}, @samp{neon-vfpv4}, @samp{fpv5-d16}, @samp{fpv5-sp-d16}, -@samp{fp-armv8}, @samp{neon-fp-armv8}, and @samp{crypto-neon-fp-armv8}. +@samp{fp-armv8}, @samp{neon-fp-armv8} and @samp{crypto-neon-fp-armv8}. If @option{-msoft-float} is specified this specifies the format of floating-point values. -- 2.1.4