diff mbox

target-tilegx: Implement prefetch instructions in pipe y2

Message ID COL130-W56950691CBA8EE93D0DB07B9390@phx.gbl
State New
Headers show

Commit Message

Chen Gang Oct. 20, 2015, 3:26 p.m. UTC 
From 14fe2a651b3f5729f1d402dfcd6eb5f7da0f42b1 Mon Sep 17 00:00:00 2001
From: Chen Gang <gang.chen.5i5j@gmail.com>
Date: Tue, 20 Oct 2015 23:19:02 +0800
Subject: [PATCH] target-tilegx: Implement prefetch instructions in pipe y2

Originally, tilegx qemu only implement prefetch instructions in pipe x1,
did not implement them in pipe y2.

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
---
 target-tilegx/translate.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

-- 
1.9.3

Comments

Richard Henderson Oct. 22, 2015, 5:53 p.m. UTC | #1 
On 10/20/2015 05:26 AM, Chen Gang wrote:
>>From 14fe2a651b3f5729f1d402dfcd6eb5f7da0f42b1 Mon Sep 17 00:00:00 2001
> From: Chen Gang <gang.chen.5i5j@gmail.com>
> Date: Tue, 20 Oct 2015 23:19:02 +0800
> Subject: [PATCH] target-tilegx: Implement prefetch instructions in pipe y2
>
> Originally, tilegx qemu only implement prefetch instructions in pipe x1,
> did not implement them in pipe y2.
>
> Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>

Applied.


r~
Chen Gang Oct. 22, 2015, 9:57 p.m. UTC | #2 
On 10/23/15 01:53, Richard Henderson wrote:
> On 10/20/2015 05:26 AM, Chen Gang wrote:
>>> From 14fe2a651b3f5729f1d402dfcd6eb5f7da0f42b1 Mon Sep 17 00:00:00 2001
>> From: Chen Gang <gang.chen.5i5j@gmail.com>
>> Date: Tue, 20 Oct 2015 23:19:02 +0800
>> Subject: [PATCH] target-tilegx: Implement prefetch instructions in pipe y2
>>
>> Originally, tilegx qemu only implement prefetch instructions in pipe x1,
>> did not implement them in pipe y2.
>>
>> Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
>
> Applied.
>

OK, thanks. And at present, I am trying to implement floating point
insns within this month. Hope I can succeed.

Welcome any members' additional ideas, suggestions, and completions.

Thanks.
--
Chen Gang (陈刚)

Open, share, and attitude like air, water, and life which God blessed
diff mbox

Patch

diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 34d45f8..b8ca401 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -2105,6 +2105,7 @@  static TileExcp decode_y2(DisasContext *dc, tilegx_bundle_bits bundle)
     unsigned srcbdest = get_SrcBDest_Y2(bundle);
     const char *mnemonic;
     TCGMemOp memop;
+    bool prefetch_nofault = false;
 
     switch (OEY2(opc, mode)) {
     case OEY2(LD1S_OPCODE_Y2, MODE_OPCODE_YA2):
@@ -2114,6 +2115,7 @@  static TileExcp decode_y2(DisasContext *dc, tilegx_bundle_bits bundle)
     case OEY2(LD1U_OPCODE_Y2, MODE_OPCODE_YA2):
         memop = MO_UB;
         mnemonic = "ld1u";
+        prefetch_nofault = (srcbdest == TILEGX_R_ZERO);
         goto do_load;
     case OEY2(LD2S_OPCODE_Y2, MODE_OPCODE_YA2):
         memop = MO_TESW;
@@ -2122,6 +2124,7 @@  static TileExcp decode_y2(DisasContext *dc, tilegx_bundle_bits bundle)
     case OEY2(LD2U_OPCODE_Y2, MODE_OPCODE_YA2):
         memop = MO_TEUW;
         mnemonic = "ld2u";
+        prefetch_nofault = (srcbdest == TILEGX_R_ZERO);
         goto do_load;
     case OEY2(LD4S_OPCODE_Y2, MODE_OPCODE_YB2):
         memop = MO_TESL;
@@ -2130,13 +2133,16 @@  static TileExcp decode_y2(DisasContext *dc, tilegx_bundle_bits bundle)
     case OEY2(LD4U_OPCODE_Y2, MODE_OPCODE_YB2):
         memop = MO_TEUL;
         mnemonic = "ld4u";
+        prefetch_nofault = (srcbdest == TILEGX_R_ZERO);
         goto do_load;
     case OEY2(LD_OPCODE_Y2, MODE_OPCODE_YB2):
         memop = MO_TEQ;
         mnemonic = "ld";
     do_load:
-        tcg_gen_qemu_ld_tl(dest_gr(dc, srcbdest), load_gr(dc, srca),
-                           dc->mmuidx, memop);
+        if (!prefetch_nofault) {
+            tcg_gen_qemu_ld_tl(dest_gr(dc, srcbdest), load_gr(dc, srca),
+                               dc->mmuidx, memop);
+        }
         qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s %s, %s", mnemonic,
                       reg_names[srcbdest], reg_names[srca]);
         return TILEGX_EXCP_NONE;