| Message ID | 1439042292-19912-1-git-send-email-kwizart@gmail.com |
|---|---|
| State | Accepted |
| Headers | show |
On Sat, 8 Aug 2015, Nicolas Chauvet wrote: > Current base address is wrong by 0x04 bytes for AHB bus device as shown in dmesg: > tegra-ahb 6000c004.ahb: incorrect AHB base address in DT data - enabling workaround > > To correct old dtbs, the commit ce7a10b0ff3db63 checks for the low bit > of the base address and removes theses 0x04 bytes at runtime. > > This patch fix the original dts, so upstream version doesn't need > the workaround of the base address. > > As both addresses are valid, this patch doesn't break compatibility > > Tested on tegra20-paz00 (aka ac100) > > Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Sat, Aug 08, 2015 at 03:58:12PM +0200, Nicolas Chauvet wrote: > Current base address is wrong by 0x04 bytes for AHB bus device as shown in dmesg: > tegra-ahb 6000c004.ahb: incorrect AHB base address in DT data - enabling workaround > > To correct old dtbs, the commit ce7a10b0ff3db63 checks for the low bit > of the base address and removes theses 0x04 bytes at runtime. > > This patch fix the original dts, so upstream version doesn't need > the workaround of the base address. > > As both addresses are valid, this patch doesn't break compatibility > > Tested on tegra20-paz00 (aka ac100) > > Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> > --- > arch/arm/boot/dts/tegra114.dtsi | 4 ++-- > arch/arm/boot/dts/tegra20.dtsi | 4 ++-- > arch/arm/boot/dts/tegra30.dtsi | 4 ++-- > 3 files changed, 6 insertions(+), 6 deletions(-) Applied, thanks. Thierry
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index f58a3d9..4bdf8f9 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -214,9 +214,9 @@ #dma-cells = <1>; }; - ahb: ahb@6000c004 { + ahb: ahb@6000c000 { compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb"; - reg = <0x6000c004 0x14c>; + reg = <0x6000c000 0x150>; }; gpio: gpio@6000d000 { diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index f444b67..f6f1461 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -225,9 +225,9 @@ #dma-cells = <1>; }; - ahb@6000c004 { + ahb@6000c000 { compatible = "nvidia,tegra20-ahb"; - reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ + reg = <0x6000c000 0x110>; /* AHB Arbitration + Gizmo Controller */ }; gpio: gpio@6000d000 { diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 782b11b..559763e 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -329,9 +329,9 @@ #dma-cells = <1>; }; - ahb: ahb@6000c004 { + ahb: ahb@6000c000 { compatible = "nvidia,tegra30-ahb"; - reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ + reg = <0x6000c000 0x150>; /* AHB Arbitration + Gizmo Controller */ }; gpio: gpio@6000d000 {
Current base address is wrong by 0x04 bytes for AHB bus device as shown in dmesg: tegra-ahb 6000c004.ahb: incorrect AHB base address in DT data - enabling workaround To correct old dtbs, the commit ce7a10b0ff3db63 checks for the low bit of the base address and removes theses 0x04 bytes at runtime. This patch fix the original dts, so upstream version doesn't need the workaround of the base address. As both addresses are valid, this patch doesn't break compatibility Tested on tegra20-paz00 (aka ac100) Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> --- arch/arm/boot/dts/tegra114.dtsi | 4 ++-- arch/arm/boot/dts/tegra20.dtsi | 4 ++-- arch/arm/boot/dts/tegra30.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-)