Series Detail

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{
    "id": 502631,
    "url": "http://patchwork.ozlabs.org/api/series/502631/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=502631",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "name": "[v2,1/2] riscv: Make RISCV_ACLINT visible",
    "date": "2026-05-04T09:26:28",
    "submitter": {
        "id": 84271,
        "url": "http://patchwork.ozlabs.org/api/people/84271/?format=api",
        "name": "Michal Simek",
        "email": "michal.simek@amd.com"
    },
    "version": 2,
    "total": 2,
    "received_total": 2,
    "received_all": true,
    "mbox": "http://patchwork.ozlabs.org/series/502631/mbox/",
    "cover_letter": null,
    "patches": [
        {
            "id": 2232296,
            "url": "http://patchwork.ozlabs.org/api/patches/2232296/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/7e80b87009b327aa618117baf223973e10c5b611.1777886786.git.michal.simek@amd.com/",
            "msgid": "<7e80b87009b327aa618117baf223973e10c5b611.1777886786.git.michal.simek@amd.com>",
            "list_archive_url": null,
            "date": "2026-05-04T09:26:28",
            "name": "[v2,1/2] riscv: Make RISCV_ACLINT visible",
            "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/7e80b87009b327aa618117baf223973e10c5b611.1777886786.git.michal.simek@amd.com/mbox/"
        },
        {
            "id": 2232297,
            "url": "http://patchwork.ozlabs.org/api/patches/2232297/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/7a4d125075572c0a9a87eb34b25628263c0a3cc1.1777886786.git.michal.simek@amd.com/",
            "msgid": "<7a4d125075572c0a9a87eb34b25628263c0a3cc1.1777886786.git.michal.simek@amd.com>",
            "list_archive_url": null,
            "date": "2026-05-04T09:26:29",
            "name": "[v2,2/2] riscv: Exclude ACLINT for TARGET_XILINX_MBV",
            "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/7a4d125075572c0a9a87eb34b25628263c0a3cc1.1777886786.git.michal.simek@amd.com/mbox/"
        }
    ]
}