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GET /api/patches/989742/?format=api
{ "id": 989742, "url": "http://patchwork.ozlabs.org/api/patches/989742/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20181026184447.13547-4-anirudh.venkataramanan@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20181026184447.13547-4-anirudh.venkataramanan@intel.com>", "list_archive_url": null, "date": "2018-10-26T18:44:35", "name": "[S9,03/15] ice: Fix to make VLAN priority tagged traffic to appear on all TCs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "53f4fdd42188cc5eca3ec5079e49f7e5df0d974f", "submitter": { "id": 73601, "url": "http://patchwork.ozlabs.org/api/people/73601/?format=api", "name": "Anirudh Venkataramanan", "email": "anirudh.venkataramanan@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20181026184447.13547-4-anirudh.venkataramanan@intel.com/mbox/", "series": [ { "id": 72801, "url": "http://patchwork.ozlabs.org/api/series/72801/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=72801", "date": "2018-10-26T18:44:32", "name": "Bug fixes for ice, set 2/2", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/72801/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/989742/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/989742/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.138; helo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 42hXws3qJLz9sMr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 27 Oct 2018 05:45:01 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 1533688677;\n\tFri, 26 Oct 2018 18:45:00 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id VoEp9kNJarzC; Fri, 26 Oct 2018 18:44:53 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 6421788640;\n\tFri, 26 Oct 2018 18:44:53 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id E02D31BF30E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 26 Oct 2018 18:44:50 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id DDA828852E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 26 Oct 2018 18:44:50 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id DrcCMnv1W7bg for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 26 Oct 2018 18:44:50 +0000 (UTC)", "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id EC491882F7\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 26 Oct 2018 18:44:49 +0000 (UTC)", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t26 Oct 2018 11:44:47 -0700", "from shasta.jf.intel.com ([10.166.241.11])\n\tby orsmga005.jf.intel.com with ESMTP; 26 Oct 2018 11:44:47 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.54,428,1534834800\"; d=\"scan'208\";a=\"269078852\"", "From": "Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 26 Oct 2018 11:44:35 -0700", "Message-Id": "<20181026184447.13547-4-anirudh.venkataramanan@intel.com>", "X-Mailer": "git-send-email 2.14.3", "In-Reply-To": "<20181026184447.13547-1-anirudh.venkataramanan@intel.com>", "References": "<20181026184447.13547-1-anirudh.venkataramanan@intel.com>", "Subject": "[Intel-wired-lan] [PATCH S9 03/15] ice: Fix to make VLAN priority\n\ttagged traffic to appear on all TCs", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Usha Ketineni <usha.k.ketineni@intel.com>\n\nThis patch includes below changes to resolve the issue of ETS bandwidth\nshaping to work.\n\n1. Allocation of Tx queues is accounted for based on the enabled TC's\n in ice_vsi_setup_q_map() and enabled the Tx queues on those TC's via\n ice_vsi_cfg_txqs()\n\n2. Get the mapped netdev TC # for the user priority and set the priority\n to TC mapping for the VSI.\n\nSigned-off-by: Usha Ketineni <usha.k.ketineni@intel.com>\nSigned-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>\n---\n[Anirudh Venkataramanan <anirudh.venkataramanan@intel.com> cleaned up commit message]\n---\n drivers/net/ethernet/intel/ice/ice.h | 4 +-\n drivers/net/ethernet/intel/ice/ice_lib.c | 121 +++++++++++++++++------------\n drivers/net/ethernet/intel/ice/ice_main.c | 4 +-\n drivers/net/ethernet/intel/ice/ice_sched.c | 2 +-\n drivers/net/ethernet/intel/ice/ice_sched.h | 1 +\n 5 files changed, 81 insertions(+), 51 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h\nindex ba03cbd3638e..7d8575d11786 100644\n--- a/drivers/net/ethernet/intel/ice/ice.h\n+++ b/drivers/net/ethernet/intel/ice/ice.h\n@@ -112,7 +112,9 @@ extern const char ice_drv_ver[];\n \n struct ice_tc_info {\n \tu16 qoffset;\n-\tu16 qcount;\n+\tu16 qcount_tx;\n+\tu16 qcount_rx;\n+\tu8 netdev_tc;\n };\n \n struct ice_tc_cfg {\ndiff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c\nindex f6e21363c8d6..597005f39919 100644\n--- a/drivers/net/ethernet/intel/ice/ice_lib.c\n+++ b/drivers/net/ethernet/intel/ice/ice_lib.c\n@@ -774,11 +774,13 @@ static void ice_set_dflt_vsi_ctx(struct ice_vsi_ctx *ctxt)\n */\n static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)\n {\n-\tu16 offset = 0, qmap = 0, numq_tc;\n-\tu16 pow = 0, max_rss = 0, qcount;\n+\tu16 offset = 0, qmap = 0, tx_count = 0;\n \tu16 qcount_tx = vsi->alloc_txq;\n \tu16 qcount_rx = vsi->alloc_rxq;\n+\tu16 tx_numq_tc, rx_numq_tc;\n+\tu16 pow = 0, max_rss = 0;\n \tbool ena_tc0 = false;\n+\tu8 netdev_tc = 0;\n \tint i;\n \n \t/* at least TC0 should be enabled by default */\n@@ -794,7 +796,12 @@ static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)\n \t\tvsi->tc_cfg.ena_tc |= 1;\n \t}\n \n-\tnumq_tc = qcount_rx / vsi->tc_cfg.numtc;\n+\trx_numq_tc = qcount_rx / vsi->tc_cfg.numtc;\n+\tif (!rx_numq_tc)\n+\t\trx_numq_tc = 1;\n+\ttx_numq_tc = qcount_tx / vsi->tc_cfg.numtc;\n+\tif (!tx_numq_tc)\n+\t\ttx_numq_tc = 1;\n \n \t/* TC mapping is a function of the number of Rx queues assigned to the\n \t * VSI for each traffic class and the offset of these queues.\n@@ -808,7 +815,8 @@ static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)\n \t * Setup number and offset of Rx queues for all TCs for the VSI\n \t */\n \n-\tqcount = numq_tc;\n+\tqcount_rx = rx_numq_tc;\n+\n \t/* qcount will change if RSS is enabled */\n \tif (test_bit(ICE_FLAG_RSS_ENA, vsi->back->flags)) {\n \t\tif (vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF) {\n@@ -816,37 +824,41 @@ static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)\n \t\t\t\tmax_rss = ICE_MAX_LG_RSS_QS;\n \t\t\telse\n \t\t\t\tmax_rss = ICE_MAX_SMALL_RSS_QS;\n-\t\t\tqcount = min_t(int, numq_tc, max_rss);\n-\t\t\tqcount = min_t(int, qcount, vsi->rss_size);\n+\t\t\tqcount_rx = min_t(int, rx_numq_tc, max_rss);\n+\t\t\tqcount_rx = min_t(int, qcount_rx, vsi->rss_size);\n \t\t}\n \t}\n \n \t/* find the (rounded up) power-of-2 of qcount */\n-\tpow = order_base_2(qcount);\n+\tpow = order_base_2(qcount_rx);\n \n \tfor (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {\n \t\tif (!(vsi->tc_cfg.ena_tc & BIT(i))) {\n \t\t\t/* TC is not enabled */\n \t\t\tvsi->tc_cfg.tc_info[i].qoffset = 0;\n-\t\t\tvsi->tc_cfg.tc_info[i].qcount = 1;\n+\t\t\tvsi->tc_cfg.tc_info[i].qcount_rx = 1;\n+\t\t\tvsi->tc_cfg.tc_info[i].qcount_tx = 1;\n+\t\t\tvsi->tc_cfg.tc_info[i].netdev_tc = 0;\n \t\t\tctxt->info.tc_mapping[i] = 0;\n \t\t\tcontinue;\n \t\t}\n \n \t\t/* TC is enabled */\n \t\tvsi->tc_cfg.tc_info[i].qoffset = offset;\n-\t\tvsi->tc_cfg.tc_info[i].qcount = qcount;\n+\t\tvsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;\n+\t\tvsi->tc_cfg.tc_info[i].qcount_tx = tx_numq_tc;\n+\t\tvsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;\n \n \t\tqmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &\n \t\t\tICE_AQ_VSI_TC_Q_OFFSET_M) |\n \t\t\t((pow << ICE_AQ_VSI_TC_Q_NUM_S) &\n \t\t\t ICE_AQ_VSI_TC_Q_NUM_M);\n-\t\toffset += qcount;\n+\t\toffset += qcount_rx;\n+\t\ttx_count += tx_numq_tc;\n \t\tctxt->info.tc_mapping[i] = cpu_to_le16(qmap);\n \t}\n-\n-\tvsi->num_txq = qcount_tx;\n \tvsi->num_rxq = offset;\n+\tvsi->num_txq = tx_count;\n \n \tif (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {\n \t\tdev_dbg(&vsi->back->pdev->dev, \"VF VSI should have same number of Tx and Rx queues. Hence making them equal\\n\");\n@@ -1611,10 +1623,10 @@ int ice_vsi_cfg_txqs(struct ice_vsi *vsi)\n \tstruct ice_aqc_add_tx_qgrp *qg_buf;\n \tstruct ice_aqc_add_txqs_perq *txq;\n \tstruct ice_pf *pf = vsi->back;\n+\tu8 num_q_grps, q_idx = 0;\n \tenum ice_status status;\n \tu16 buf_len, i, pf_q;\n \tint err = 0, tc = 0;\n-\tu8 num_q_grps;\n \n \tbuf_len = sizeof(struct ice_aqc_add_tx_qgrp);\n \tqg_buf = devm_kzalloc(&pf->pdev->dev, buf_len, GFP_KERNEL);\n@@ -1628,38 +1640,49 @@ int ice_vsi_cfg_txqs(struct ice_vsi *vsi)\n \tqg_buf->num_txqs = 1;\n \tnum_q_grps = 1;\n \n-\t/* set up and configure the Tx queues */\n-\tice_for_each_txq(vsi, i) {\n-\t\tstruct ice_tlan_ctx tlan_ctx = { 0 };\n+\t/* set up and configure the Tx queues for each enabled TC */\n+\tfor (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {\n+\t\tif (!(vsi->tc_cfg.ena_tc & BIT(tc)))\n+\t\t\tbreak;\n \n-\t\tpf_q = vsi->txq_map[i];\n-\t\tice_setup_tx_ctx(vsi->tx_rings[i], &tlan_ctx, pf_q);\n-\t\t/* copy context contents into the qg_buf */\n-\t\tqg_buf->txqs[0].txq_id = cpu_to_le16(pf_q);\n-\t\tice_set_ctx((u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx,\n-\t\t\t ice_tlan_ctx_info);\n+\t\tfor (i = 0; i < vsi->tc_cfg.tc_info[tc].qcount_tx; i++) {\n+\t\t\tstruct ice_tlan_ctx tlan_ctx = { 0 };\n+\n+\t\t\tpf_q = vsi->txq_map[q_idx];\n+\t\t\tice_setup_tx_ctx(vsi->tx_rings[q_idx], &tlan_ctx,\n+\t\t\t\t\t pf_q);\n+\t\t\t/* copy context contents into the qg_buf */\n+\t\t\tqg_buf->txqs[0].txq_id = cpu_to_le16(pf_q);\n+\t\t\tice_set_ctx((u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx,\n+\t\t\t\t ice_tlan_ctx_info);\n+\n+\t\t\t/* init queue specific tail reg. It is referred as\n+\t\t\t * transmit comm scheduler queue doorbell.\n+\t\t\t */\n+\t\t\tvsi->tx_rings[q_idx]->tail =\n+\t\t\t\tpf->hw.hw_addr + QTX_COMM_DBELL(pf_q);\n+\t\t\tstatus = ice_ena_vsi_txq(vsi->port_info, vsi->idx, tc,\n+\t\t\t\t\t\t num_q_grps, qg_buf, buf_len,\n+\t\t\t\t\t\t NULL);\n+\t\t\tif (status) {\n+\t\t\t\tdev_err(&vsi->back->pdev->dev,\n+\t\t\t\t\t\"Failed to set LAN Tx queue context, error: %d\\n\",\n+\t\t\t\t\tstatus);\n+\t\t\t\terr = -ENODEV;\n+\t\t\t\tgoto err_cfg_txqs;\n+\t\t\t}\n \n-\t\t/* init queue specific tail reg. It is referred as transmit\n-\t\t * comm scheduler queue doorbell.\n-\t\t */\n-\t\tvsi->tx_rings[i]->tail = pf->hw.hw_addr + QTX_COMM_DBELL(pf_q);\n-\t\tstatus = ice_ena_vsi_txq(vsi->port_info, vsi->idx, tc,\n-\t\t\t\t\t num_q_grps, qg_buf, buf_len, NULL);\n-\t\tif (status) {\n-\t\t\tdev_err(&vsi->back->pdev->dev,\n-\t\t\t\t\"Failed to set LAN Tx queue context, error: %d\\n\",\n-\t\t\t\tstatus);\n-\t\t\terr = -ENODEV;\n-\t\t\tgoto err_cfg_txqs;\n-\t\t}\n+\t\t\t/* Add Tx Queue TEID into the VSI Tx ring from the\n+\t\t\t * response. This will complete configuring and\n+\t\t\t * enabling the queue.\n+\t\t\t */\n+\t\t\ttxq = &qg_buf->txqs[0];\n+\t\t\tif (pf_q == le16_to_cpu(txq->txq_id))\n+\t\t\t\tvsi->tx_rings[q_idx]->txq_teid =\n+\t\t\t\t\tle32_to_cpu(txq->q_teid);\n \n-\t\t/* Add Tx Queue TEID into the VSI Tx ring from the response\n-\t\t * This will complete configuring and enabling the queue.\n-\t\t */\n-\t\ttxq = &qg_buf->txqs[0];\n-\t\tif (pf_q == le16_to_cpu(txq->txq_id))\n-\t\t\tvsi->tx_rings[i]->txq_teid =\n-\t\t\t\tle32_to_cpu(txq->q_teid);\n+\t\t\tq_idx++;\n+\t\t}\n \t}\n err_cfg_txqs:\n \tdevm_kfree(&pf->pdev->dev, qg_buf);\n@@ -2057,6 +2080,9 @@ ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,\n \t/* set RSS capabilities */\n \tice_vsi_set_rss_params(vsi);\n \n+\t/* set tc configuration */\n+\tice_vsi_set_tc_cfg(vsi);\n+\n \t/* create the VSI */\n \tret = ice_vsi_init(vsi);\n \tif (ret)\n@@ -2120,11 +2146,9 @@ ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,\n \t\tgoto unroll_vsi_init;\n \t}\n \n-\tice_vsi_set_tc_cfg(vsi);\n-\n \t/* configure VSI nodes based on number of queues and TC's */\n \tfor (i = 0; i < vsi->tc_cfg.numtc; i++)\n-\t\tmax_txqs[i] = vsi->num_txq;\n+\t\tmax_txqs[i] = pf->num_lan_tx;\n \n \tret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,\n \t\t\t max_txqs);\n@@ -2520,11 +2544,13 @@ int ice_vsi_release(struct ice_vsi *vsi)\n int ice_vsi_rebuild(struct ice_vsi *vsi)\n {\n \tu16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };\n+\tstruct ice_pf *pf;\n \tint ret, i;\n \n \tif (!vsi)\n \t\treturn -EINVAL;\n \n+\tpf = vsi->back;\n \tice_vsi_free_q_vectors(vsi);\n \tice_free_res(vsi->back->sw_irq_tracker, vsi->sw_base_vector, vsi->idx);\n \tice_free_res(vsi->back->hw_irq_tracker, vsi->hw_base_vector, vsi->idx);\n@@ -2534,6 +2560,7 @@ int ice_vsi_rebuild(struct ice_vsi *vsi)\n \tice_vsi_free_arrays(vsi, false);\n \tice_dev_onetime_setup(&vsi->back->hw);\n \tice_vsi_set_num_qs(vsi);\n+\tice_vsi_set_tc_cfg(vsi);\n \n \t/* Initialize VSI struct elements and create VSI in FW */\n \tret = ice_vsi_init(vsi);\n@@ -2580,11 +2607,9 @@ int ice_vsi_rebuild(struct ice_vsi *vsi)\n \t\tbreak;\n \t}\n \n-\tice_vsi_set_tc_cfg(vsi);\n-\n \t/* configure VSI nodes based on number of queues and TC's */\n \tfor (i = 0; i < vsi->tc_cfg.numtc; i++)\n-\t\tmax_txqs[i] = vsi->num_txq;\n+\t\tmax_txqs[i] = pf->num_lan_tx;\n \n \tret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,\n \t\t\t max_txqs);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c\nindex 089b0f0b2e71..292d19e65af0 100644\n--- a/drivers/net/ethernet/intel/ice/ice_main.c\n+++ b/drivers/net/ethernet/intel/ice/ice_main.c\n@@ -349,6 +349,9 @@ ice_prepare_for_reset(struct ice_pf *pf)\n \t/* disable the VSIs and their queues that are not already DOWN */\n \tice_pf_dis_all_vsi(pf);\n \n+\tif (hw->port_info)\n+\t\tice_sched_clear_port(hw->port_info);\n+\n \tice_shutdown_all_ctrlq(hw);\n \n \tset_bit(__ICE_PREPARED_FOR_RESET, pf->state);\n@@ -2543,7 +2546,6 @@ static int ice_vsi_cfg(struct ice_vsi *vsi)\n \t\tif (err)\n \t\t\treturn err;\n \t}\n-\n \terr = ice_vsi_cfg_txqs(vsi);\n \tif (!err)\n \t\terr = ice_vsi_cfg_rxqs(vsi);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_sched.c b/drivers/net/ethernet/intel/ice/ice_sched.c\nindex 3d57f5b4834d..c950ebc11d98 100644\n--- a/drivers/net/ethernet/intel/ice/ice_sched.c\n+++ b/drivers/net/ethernet/intel/ice/ice_sched.c\n@@ -630,7 +630,7 @@ static void ice_sched_clear_tx_topo(struct ice_port_info *pi)\n *\n * Cleanup scheduling elements from SW DB\n */\n-static void ice_sched_clear_port(struct ice_port_info *pi)\n+void ice_sched_clear_port(struct ice_port_info *pi)\n {\n \tif (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)\n \t\treturn;\ndiff --git a/drivers/net/ethernet/intel/ice/ice_sched.h b/drivers/net/ethernet/intel/ice/ice_sched.h\nindex dc59fbac7dde..da5b4c166da8 100644\n--- a/drivers/net/ethernet/intel/ice/ice_sched.h\n+++ b/drivers/net/ethernet/intel/ice/ice_sched.h\n@@ -26,6 +26,7 @@ struct ice_sched_agg_info {\n /* FW AQ command calls */\n enum ice_status ice_sched_init_port(struct ice_port_info *pi);\n enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);\n+void ice_sched_clear_port(struct ice_port_info *pi);\n void ice_sched_cleanup_all(struct ice_hw *hw);\n struct ice_sched_node *\n ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);\n", "prefixes": [ "S9", "03/15" ] }