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{
    "id": 980,
    "url": "http://patchwork.ozlabs.org/api/patches/980/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/200809222152.m8MLqFwW031958@imap1.linux-foundation.org/",
    "project": {
        "id": 7,
        "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api",
        "name": "Linux network development",
        "link_name": "netdev",
        "list_id": "netdev.vger.kernel.org",
        "list_email": "netdev@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<200809222152.m8MLqFwW031958@imap1.linux-foundation.org>",
    "list_archive_url": null,
    "date": "2008-09-22T21:52:15",
    "name": "[08/21] the overdue eepro100 removal",
    "commit_ref": null,
    "pull_url": null,
    "state": "rfc",
    "archived": true,
    "hash": "05fe78d62a7b37aebb5c1e8efc02fbe3d64f2803",
    "submitter": {
        "id": 107,
        "url": "http://patchwork.ozlabs.org/api/people/107/?format=api",
        "name": "Andrew Morton",
        "email": "akpm@linux-foundation.org"
    },
    "delegate": {
        "id": 36,
        "url": "http://patchwork.ozlabs.org/api/users/36/?format=api",
        "username": "jgarzik",
        "first_name": "Jeff",
        "last_name": "Garzik",
        "email": "jgarzik@pobox.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/200809222152.m8MLqFwW031958@imap1.linux-foundation.org/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/980/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/980/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<netdev-owner@vger.kernel.org>",
        "X-Original-To": "patchwork-incoming@ozlabs.org",
        "Delivered-To": "patchwork-incoming@ozlabs.org",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.176.167])\n\tby ozlabs.org (Postfix) with ESMTP id CB129DDE1C\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 23 Sep 2008 07:59:29 +1000 (EST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754591AbYIVV7U (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tMon, 22 Sep 2008 17:59:20 -0400",
            "(majordomo@vger.kernel.org) by vger.kernel.org id S1754585AbYIVV7T\n\t(ORCPT <rfc822; netdev-outgoing>); Mon, 22 Sep 2008 17:59:19 -0400",
            "from smtp1.linux-foundation.org ([140.211.169.13]:55910 \"EHLO\n\tsmtp1.linux-foundation.org\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1754178AbYIVV7K (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Mon, 22 Sep 2008 17:59:10 -0400",
            "from imap1.linux-foundation.org (imap1.linux-foundation.org\n\t[140.211.169.55])\n\tby smtp1.linux-foundation.org (8.14.2/8.13.5/Debian-3ubuntu1.1) with\n\tESMTP id m8MLrDOJ018507\n\t(version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO);\n\tMon, 22 Sep 2008 14:57:36 -0700",
            "from localhost.localdomain (localhost [127.0.0.1])\n\tby imap1.linux-foundation.org\n\t(8.13.5.20060308/8.13.5/Debian-3ubuntu1.1) with ESMTP id\n\tm8MLqFwW031958; Mon, 22 Sep 2008 14:52:15 -0700"
        ],
        "Message-Id": "<200809222152.m8MLqFwW031958@imap1.linux-foundation.org>",
        "Subject": "[patch 08/21] the overdue eepro100 removal",
        "To": "jeff@garzik.org",
        "Cc": "netdev@vger.kernel.org, akpm@linux-foundation.org, bunk@kernel.org",
        "From": "akpm@linux-foundation.org",
        "Date": "Mon, 22 Sep 2008 14:52:15 -0700",
        "X-Spam-Status": "No, hits=-3.359 required=5 tests=AWL, BAYES_00,\n\tOSDL_HEADER_SUBJECT_BRACKETED",
        "X-Spam-Checker-Version": "SpamAssassin 3.2.4-osdl_revision__1.47__",
        "X-MIMEDefang-Filter": "lf$Revision: 1.188 $",
        "X-Scanned-By": "MIMEDefang 2.63 on 140.211.169.13",
        "Sender": "netdev-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<netdev.vger.kernel.org>",
        "X-Mailing-List": "netdev@vger.kernel.org"
    },
    "content": "From: Adrian Bunk <bunk@kernel.org>\n\nThe overdue eepro100 removal.\n\nSigned-off-by: Adrian Bunk <bunk@kernel.org>\nCc: Jeff Garzik <jeff@garzik.org>\nSigned-off-by: Andrew Morton <akpm@linux-foundation.org>\n---\n\n Documentation/feature-removal-schedule.txt |    7 \n MAINTAINERS                                |    5 \n drivers/net/Kconfig                        |   13 \n drivers/net/Makefile                       |    1 \n drivers/net/eepro100.c                     | 2401 -------------------\n 5 files changed, 2427 deletions(-)",
    "diff": "diff -puN Documentation/feature-removal-schedule.txt~the-overdue-eepro100-removal Documentation/feature-removal-schedule.txt\n--- a/Documentation/feature-removal-schedule.txt~the-overdue-eepro100-removal\n+++ a/Documentation/feature-removal-schedule.txt\n@@ -144,13 +144,6 @@ Who:\tChristoph Hellwig <hch@lst.de>\n \n ---------------------------\n \n-What:   eepro100 network driver\n-When:   January 2007\n-Why:    replaced by the e100 driver\n-Who:    Adrian Bunk <bunk@stusta.de>\n-\n----------------------------\n-\n What:\tUnused EXPORT_SYMBOL/EXPORT_SYMBOL_GPL exports\n \t(temporary transition config option provided until then)\n \tThe transition config option will also be removed at the same time.\ndiff -puN MAINTAINERS~the-overdue-eepro100-removal MAINTAINERS\n--- a/MAINTAINERS~the-overdue-eepro100-removal\n+++ a/MAINTAINERS\n@@ -1598,11 +1598,6 @@ L:\tacpi4asus-user@lists.sourceforge.net\n W:\thttp://sourceforge.net/projects/acpi4asus\n S:\tMaintained\n \n-EEPRO100 NETWORK DRIVER\n-P:\tAndrey V. Savochkin\n-M:\tsaw@saw.sw.com.sg\n-S:\tMaintained\n-\n EFS FILESYSTEM\n W:\thttp://aeschi.ch.eu.org/efs/\n S:\tOrphan\ndiff -puN drivers/net/Kconfig~the-overdue-eepro100-removal drivers/net/Kconfig\n--- a/drivers/net/Kconfig~the-overdue-eepro100-removal\n+++ a/drivers/net/Kconfig\n@@ -1402,19 +1402,6 @@ config TC35815\n \tdepends on NET_PCI && PCI && MIPS\n \tselect PHYLIB\n \n-config EEPRO100\n-\ttristate \"EtherExpressPro/100 support (eepro100, original Becker driver)\"\n-\tdepends on NET_PCI && PCI\n-\tselect MII\n-\thelp\n-\t  If you have an Intel EtherExpress PRO/100 PCI network (Ethernet)\n-\t  card, say Y and read the Ethernet-HOWTO, available from\n-\t  <http://www.tldp.org/docs.html#howto>.\n-\n-\t  To compile this driver as a module, choose M here. The module\n-\t  will be called eepro100.\n-\n-\n config E100\n \ttristate \"Intel(R) PRO/100+ support\"\n \tdepends on NET_PCI && PCI\ndiff -puN drivers/net/Makefile~the-overdue-eepro100-removal drivers/net/Makefile\n--- a/drivers/net/Makefile~the-overdue-eepro100-removal\n+++ a/drivers/net/Makefile\n@@ -50,7 +50,6 @@ obj-$(CONFIG_VORTEX) += 3c59x.o\n obj-$(CONFIG_TYPHOON) += typhoon.o\n obj-$(CONFIG_NE2K_PCI) += ne2k-pci.o 8390.o\n obj-$(CONFIG_PCNET32) += pcnet32.o\n-obj-$(CONFIG_EEPRO100) += eepro100.o\n obj-$(CONFIG_E100) += e100.o\n obj-$(CONFIG_TLAN) += tlan.o\n obj-$(CONFIG_EPIC100) += epic100.o\ndiff -puN drivers/net/eepro100.c~the-overdue-eepro100-removal /dev/null\n--- a/drivers/net/eepro100.c\n+++ /dev/null\n@@ -1,2401 +0,0 @@\n-/* drivers/net/eepro100.c: An Intel i82557-559 Ethernet driver for Linux. */\n-/*\n-\tWritten 1996-1999 by Donald Becker.\n-\n-\tThe driver also contains updates by different kernel developers\n-\t(see incomplete list below).\n-\tCurrent maintainer is Andrey V. Savochkin <saw@saw.sw.com.sg>.\n-\tPlease use this email address and linux-kernel mailing list for bug reports.\n-\n-\tThis software may be used and distributed according to the terms\n-\tof the GNU General Public License, incorporated herein by reference.\n-\n-\tThis driver is for the Intel EtherExpress Pro100 (Speedo3) design.\n-\tIt should work with all i82557/558/559 boards.\n-\n-\tVersion history:\n-\t1998 Apr - 2000 Feb  Andrey V. Savochkin <saw@saw.sw.com.sg>\n-\t\tSerious fixes for multicast filter list setting, TX timeout routine;\n-\t\tRX ring refilling logic;  other stuff\n-\t2000 Feb  Jeff Garzik <jgarzik@pobox.com>\n-\t\tConvert to new PCI driver interface\n-\t2000 Mar 24  Dragan Stancevic <visitor@valinux.com>\n-\t\tDisabled FC and ER, to avoid lockups when when we get FCP interrupts.\n-\t2000 Jul 17 Goutham Rao <goutham.rao@intel.com>\n-\t\tPCI DMA API fixes, adding pci_dma_sync_single calls where neccesary\n-\t2000 Aug 31 David Mosberger <davidm@hpl.hp.com>\n-\t\trx_align support: enables rx DMA without causing unaligned accesses.\n-*/\n-\n-static const char * const version =\n-\"eepro100.c:v1.09j-t 9/29/99 Donald Becker\\n\"\n-\"eepro100.c: $Revision: 1.36 $ 2000/11/17 Modified by Andrey V. Savochkin <saw@saw.sw.com.sg> and others\\n\";\n-\n-/* A few user-configurable values that apply to all boards.\n-   First set is undocumented and spelled per Intel recommendations. */\n-\n-static int congenb /* = 0 */; /* Enable congestion control in the DP83840. */\n-static int txfifo = 8;\t\t/* Tx FIFO threshold in 4 byte units, 0-15 */\n-static int rxfifo = 8;\t\t/* Rx FIFO threshold, default 32 bytes. */\n-/* Tx/Rx DMA burst length, 0-127, 0 == no preemption, tx==128 -> disabled. */\n-static int txdmacount = 128;\n-static int rxdmacount /* = 0 */;\n-\n-#if defined(__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__mips__) || \\\n-\tdefined(__arm__)\n-  /* align rx buffers to 2 bytes so that IP header is aligned */\n-# define rx_align(skb)\t\tskb_reserve((skb), 2)\n-# define RxFD_ALIGNMENT\t\t__attribute__ ((aligned (2), packed))\n-#else\n-# define rx_align(skb)\n-# define RxFD_ALIGNMENT\n-#endif\n-\n-/* Set the copy breakpoint for the copy-only-tiny-buffer Rx method.\n-   Lower values use more memory, but are faster. */\n-static int rx_copybreak = 200;\n-\n-/* Maximum events (Rx packets, etc.) to handle at each interrupt. */\n-static int max_interrupt_work = 20;\n-\n-/* Maximum number of multicast addresses to filter (vs. rx-all-multicast) */\n-static int multicast_filter_limit = 64;\n-\n-/* 'options' is used to pass a transceiver override or full-duplex flag\n-   e.g. \"options=16\" for FD, \"options=32\" for 100mbps-only. */\n-static int full_duplex[] = {-1, -1, -1, -1, -1, -1, -1, -1};\n-static int options[] = {-1, -1, -1, -1, -1, -1, -1, -1};\n-\n-/* A few values that may be tweaked. */\n-/* The ring sizes should be a power of two for efficiency. */\n-#define TX_RING_SIZE\t64\n-#define RX_RING_SIZE\t64\n-/* How much slots multicast filter setup may take.\n-   Do not descrease without changing set_rx_mode() implementaion. */\n-#define TX_MULTICAST_SIZE   2\n-#define TX_MULTICAST_RESERV (TX_MULTICAST_SIZE*2)\n-/* Actual number of TX packets queued, must be\n-   <= TX_RING_SIZE-TX_MULTICAST_RESERV. */\n-#define TX_QUEUE_LIMIT  (TX_RING_SIZE-TX_MULTICAST_RESERV)\n-/* Hysteresis marking queue as no longer full. */\n-#define TX_QUEUE_UNFULL (TX_QUEUE_LIMIT-4)\n-\n-/* Operational parameters that usually are not changed. */\n-\n-/* Time in jiffies before concluding the transmitter is hung. */\n-#define TX_TIMEOUT\t\t(2*HZ)\n-/* Size of an pre-allocated Rx buffer: <Ethernet MTU> + slack.*/\n-#define PKT_BUF_SZ\t\t1536\n-\n-#include <linux/module.h>\n-\n-#include <linux/kernel.h>\n-#include <linux/string.h>\n-#include <linux/errno.h>\n-#include <linux/ioport.h>\n-#include <linux/slab.h>\n-#include <linux/interrupt.h>\n-#include <linux/timer.h>\n-#include <linux/pci.h>\n-#include <linux/spinlock.h>\n-#include <linux/init.h>\n-#include <linux/mii.h>\n-#include <linux/delay.h>\n-#include <linux/bitops.h>\n-\n-#include <asm/io.h>\n-#include <asm/uaccess.h>\n-#include <asm/irq.h>\n-\n-#include <linux/netdevice.h>\n-#include <linux/etherdevice.h>\n-#include <linux/rtnetlink.h>\n-#include <linux/skbuff.h>\n-#include <linux/ethtool.h>\n-\n-static int use_io;\n-static int debug = -1;\n-#define DEBUG_DEFAULT\t\t(NETIF_MSG_DRV\t\t| \\\n-\t\t\t\t NETIF_MSG_HW\t\t| \\\n-\t\t\t\t NETIF_MSG_RX_ERR\t| \\\n-\t\t\t\t NETIF_MSG_TX_ERR)\n-#define DEBUG\t\t\t((debug >= 0) ? (1<<debug)-1 : DEBUG_DEFAULT)\n-\n-\n-MODULE_AUTHOR(\"Maintainer: Andrey V. Savochkin <saw@saw.sw.com.sg>\");\n-MODULE_DESCRIPTION(\"Intel i82557/i82558/i82559 PCI EtherExpressPro driver\");\n-MODULE_LICENSE(\"GPL\");\n-module_param(use_io, int, 0);\n-module_param(debug, int, 0);\n-module_param_array(options, int, NULL, 0);\n-module_param_array(full_duplex, int, NULL, 0);\n-module_param(congenb, int, 0);\n-module_param(txfifo, int, 0);\n-module_param(rxfifo, int, 0);\n-module_param(txdmacount, int, 0);\n-module_param(rxdmacount, int, 0);\n-module_param(rx_copybreak, int, 0);\n-module_param(max_interrupt_work, int, 0);\n-module_param(multicast_filter_limit, int, 0);\n-MODULE_PARM_DESC(debug, \"debug level (0-6)\");\n-MODULE_PARM_DESC(options, \"Bits 0-3: transceiver type, bit 4: full duplex, bit 5: 100Mbps\");\n-MODULE_PARM_DESC(full_duplex, \"full duplex setting(s) (1)\");\n-MODULE_PARM_DESC(congenb, \"Enable congestion control (1)\");\n-MODULE_PARM_DESC(txfifo, \"Tx FIFO threshold in 4 byte units, (0-15)\");\n-MODULE_PARM_DESC(rxfifo, \"Rx FIFO threshold in 4 byte units, (0-15)\");\n-MODULE_PARM_DESC(txdmacount, \"Tx DMA burst length; 128 - disable (0-128)\");\n-MODULE_PARM_DESC(rxdmacount, \"Rx DMA burst length; 128 - disable (0-128)\");\n-MODULE_PARM_DESC(rx_copybreak, \"copy breakpoint for copy-only-tiny-frames\");\n-MODULE_PARM_DESC(max_interrupt_work, \"maximum events handled per interrupt\");\n-MODULE_PARM_DESC(multicast_filter_limit, \"maximum number of filtered multicast addresses\");\n-\n-#define RUN_AT(x) (jiffies + (x))\n-\n-#define netdevice_start(dev)\n-#define netdevice_stop(dev)\n-#define netif_set_tx_timeout(dev, tf, tm) \\\n-\t\t\t\t\t\t\t\tdo { \\\n-\t\t\t\t\t\t\t\t\t(dev)->tx_timeout = (tf); \\\n-\t\t\t\t\t\t\t\t\t(dev)->watchdog_timeo = (tm); \\\n-\t\t\t\t\t\t\t\t} while(0)\n-\n-\n-\n-/*\n-\t\t\t\tTheory of Operation\n-\n-I. Board Compatibility\n-\n-This device driver is designed for the Intel i82557 \"Speedo3\" chip, Intel's\n-single-chip fast Ethernet controller for PCI, as used on the Intel\n-EtherExpress Pro 100 adapter.\n-\n-II. Board-specific settings\n-\n-PCI bus devices are configured by the system at boot time, so no jumpers\n-need to be set on the board.  The system BIOS should be set to assign the\n-PCI INTA signal to an otherwise unused system IRQ line.  While it's\n-possible to share PCI interrupt lines, it negatively impacts performance and\n-only recent kernels support it.\n-\n-III. Driver operation\n-\n-IIIA. General\n-The Speedo3 is very similar to other Intel network chips, that is to say\n-\"apparently designed on a different planet\".  This chips retains the complex\n-Rx and Tx descriptors and multiple buffers pointers as previous chips, but\n-also has simplified Tx and Rx buffer modes.  This driver uses the \"flexible\"\n-Tx mode, but in a simplified lower-overhead manner: it associates only a\n-single buffer descriptor with each frame descriptor.\n-\n-Despite the extra space overhead in each receive skbuff, the driver must use\n-the simplified Rx buffer mode to assure that only a single data buffer is\n-associated with each RxFD. The driver implements this by reserving space\n-for the Rx descriptor at the head of each Rx skbuff.\n-\n-The Speedo-3 has receive and command unit base addresses that are added to\n-almost all descriptor pointers.  The driver sets these to zero, so that all\n-pointer fields are absolute addresses.\n-\n-The System Control Block (SCB) of some previous Intel chips exists on the\n-chip in both PCI I/O and memory space.  This driver uses the I/O space\n-registers, but might switch to memory mapped mode to better support non-x86\n-processors.\n-\n-IIIB. Transmit structure\n-\n-The driver must use the complex Tx command+descriptor mode in order to\n-have a indirect pointer to the skbuff data section.  Each Tx command block\n-(TxCB) is associated with two immediately appended Tx Buffer Descriptor\n-(TxBD).  A fixed ring of these TxCB+TxBD pairs are kept as part of the\n-speedo_private data structure for each adapter instance.\n-\n-The newer i82558 explicitly supports this structure, and can read the two\n-TxBDs in the same PCI burst as the TxCB.\n-\n-This ring structure is used for all normal transmit packets, but the\n-transmit packet descriptors aren't long enough for most non-Tx commands such\n-as CmdConfigure.  This is complicated by the possibility that the chip has\n-already loaded the link address in the previous descriptor.  So for these\n-commands we convert the next free descriptor on the ring to a NoOp, and point\n-that descriptor's link to the complex command.\n-\n-An additional complexity of these non-transmit commands are that they may be\n-added asynchronous to the normal transmit queue, so we disable interrupts\n-whenever the Tx descriptor ring is manipulated.\n-\n-A notable aspect of these special configure commands is that they do\n-work with the normal Tx ring entry scavenge method.  The Tx ring scavenge\n-is done at interrupt time using the 'dirty_tx' index, and checking for the\n-command-complete bit.  While the setup frames may have the NoOp command on the\n-Tx ring marked as complete, but not have completed the setup command, this\n-is not a problem.  The tx_ring entry can be still safely reused, as the\n-tx_skbuff[] entry is always empty for config_cmd and mc_setup frames.\n-\n-Commands may have bits set e.g. CmdSuspend in the command word to either\n-suspend or stop the transmit/command unit.  This driver always flags the last\n-command with CmdSuspend, erases the CmdSuspend in the previous command, and\n-then issues a CU_RESUME.\n-Note: Watch out for the potential race condition here: imagine\n-\terasing the previous suspend\n-\t\tthe chip processes the previous command\n-\t\tthe chip processes the final command, and suspends\n-\tdoing the CU_RESUME\n-\t\tthe chip processes the next-yet-valid post-final-command.\n-So blindly sending a CU_RESUME is only safe if we do it immediately after\n-after erasing the previous CmdSuspend, without the possibility of an\n-intervening delay.  Thus the resume command is always within the\n-interrupts-disabled region.  This is a timing dependence, but handling this\n-condition in a timing-independent way would considerably complicate the code.\n-\n-Note: In previous generation Intel chips, restarting the command unit was a\n-notoriously slow process.  This is presumably no longer true.\n-\n-IIIC. Receive structure\n-\n-Because of the bus-master support on the Speedo3 this driver uses the new\n-SKBUFF_RX_COPYBREAK scheme, rather than a fixed intermediate receive buffer.\n-This scheme allocates full-sized skbuffs as receive buffers.  The value\n-SKBUFF_RX_COPYBREAK is used as the copying breakpoint: it is chosen to\n-trade-off the memory wasted by passing the full-sized skbuff to the queue\n-layer for all frames vs. the copying cost of copying a frame to a\n-correctly-sized skbuff.\n-\n-For small frames the copying cost is negligible (esp. considering that we\n-are pre-loading the cache with immediately useful header information), so we\n-allocate a new, minimally-sized skbuff.  For large frames the copying cost\n-is non-trivial, and the larger copy might flush the cache of useful data, so\n-we pass up the skbuff the packet was received into.\n-\n-IV. Notes\n-\n-Thanks to Steve Williams of Intel for arranging the non-disclosure agreement\n-that stated that I could disclose the information.  But I still resent\n-having to sign an Intel NDA when I'm helping Intel sell their own product!\n-\n-*/\n-\n-static int speedo_found1(struct pci_dev *pdev, void __iomem *ioaddr, int fnd_cnt, int acpi_idle_state);\n-\n-/* Offsets to the various registers.\n-   All accesses need not be longword aligned. */\n-enum speedo_offsets {\n-\tSCBStatus = 0, SCBCmd = 2,\t/* Rx/Command Unit command and status. */\n-\tSCBIntmask = 3,\n-\tSCBPointer = 4,\t\t\t\t/* General purpose pointer. */\n-\tSCBPort = 8,\t\t\t\t/* Misc. commands and operands.  */\n-\tSCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */\n-\tSCBCtrlMDI = 16,\t\t\t/* MDI interface control. */\n-\tSCBEarlyRx = 20,\t\t\t/* Early receive byte count. */\n-};\n-/* Commands that can be put in a command list entry. */\n-enum commands {\n-\tCmdNOp = 0, CmdIASetup = 0x10000, CmdConfigure = 0x20000,\n-\tCmdMulticastList = 0x30000, CmdTx = 0x40000, CmdTDR = 0x50000,\n-\tCmdDump = 0x60000, CmdDiagnose = 0x70000,\n-\tCmdSuspend = 0x40000000,\t/* Suspend after completion. */\n-\tCmdIntr = 0x20000000,\t\t/* Interrupt after completion. */\n-\tCmdTxFlex = 0x00080000,\t\t/* Use \"Flexible mode\" for CmdTx command. */\n-};\n-/* Clear CmdSuspend (1<<30) avoiding interference with the card access to the\n-   status bits.  Previous driver versions used separate 16 bit fields for\n-   commands and statuses.  --SAW\n- */\n-#if defined(__alpha__)\n-# define clear_suspend(cmd)  clear_bit(30, &(cmd)->cmd_status);\n-#else\n-# define clear_suspend(cmd)  ((__le16 *)&(cmd)->cmd_status)[1] &= ~cpu_to_le16(1<<14)\n-#endif\n-\n-enum SCBCmdBits {\n-\tSCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000,\n-\tSCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400,\n-\tSCBTriggerIntr=0x0200, SCBMaskAll=0x0100,\n-\t/* The rest are Rx and Tx commands. */\n-\tCUStart=0x0010, CUResume=0x0020, CUStatsAddr=0x0040, CUShowStats=0x0050,\n-\tCUCmdBase=0x0060,\t/* CU Base address (set to zero) . */\n-\tCUDumpStats=0x0070, /* Dump then reset stats counters. */\n-\tRxStart=0x0001, RxResume=0x0002, RxAbort=0x0004, RxAddrLoad=0x0006,\n-\tRxResumeNoResources=0x0007,\n-};\n-\n-enum SCBPort_cmds {\n-\tPortReset=0, PortSelfTest=1, PortPartialReset=2, PortDump=3,\n-};\n-\n-/* The Speedo3 Rx and Tx frame/buffer descriptors. */\n-struct descriptor {\t\t\t    /* A generic descriptor. */\n-\tvolatile __le32 cmd_status;\t/* All command and status fields. */\n-\t__le32 link;\t\t\t\t    /* struct descriptor *  */\n-\tunsigned char params[0];\n-};\n-\n-/* The Speedo3 Rx and Tx buffer descriptors. */\n-struct RxFD {\t\t\t\t\t/* Receive frame descriptor. */\n-\tvolatile __le32 status;\n-\t__le32 link;\t\t\t\t\t/* struct RxFD * */\n-\t__le32 rx_buf_addr;\t\t\t/* void * */\n-\t__le32 count;\n-} RxFD_ALIGNMENT;\n-\n-/* Selected elements of the Tx/RxFD.status word. */\n-enum RxFD_bits {\n-\tRxComplete=0x8000, RxOK=0x2000,\n-\tRxErrCRC=0x0800, RxErrAlign=0x0400, RxErrTooBig=0x0200, RxErrSymbol=0x0010,\n-\tRxEth2Type=0x0020, RxNoMatch=0x0004, RxNoIAMatch=0x0002,\n-\tTxUnderrun=0x1000,  StatusComplete=0x8000,\n-};\n-\n-#define CONFIG_DATA_SIZE 22\n-struct TxFD {\t\t\t\t\t/* Transmit frame descriptor set. */\n-\t__le32 status;\n-\t__le32 link;\t\t\t\t\t/* void * */\n-\t__le32 tx_desc_addr;\t\t\t/* Always points to the tx_buf_addr element. */\n-\t__le32 count;\t\t\t\t\t/* # of TBD (=1), Tx start thresh., etc. */\n-\t/* This constitutes two \"TBD\" entries -- we only use one. */\n-#define TX_DESCR_BUF_OFFSET 16\n-\t__le32 tx_buf_addr0;\t\t\t/* void *, frame to be transmitted.  */\n-\t__le32 tx_buf_size0;\t\t\t/* Length of Tx frame. */\n-\t__le32 tx_buf_addr1;\t\t\t/* void *, frame to be transmitted.  */\n-\t__le32 tx_buf_size1;\t\t\t/* Length of Tx frame. */\n-\t/* the structure must have space for at least CONFIG_DATA_SIZE starting\n-\t * from tx_desc_addr field */\n-};\n-\n-/* Multicast filter setting block.  --SAW */\n-struct speedo_mc_block {\n-\tstruct speedo_mc_block *next;\n-\tunsigned int tx;\n-\tdma_addr_t frame_dma;\n-\tunsigned int len;\n-\tstruct descriptor frame __attribute__ ((__aligned__(16)));\n-};\n-\n-/* Elements of the dump_statistics block. This block must be lword aligned. */\n-struct speedo_stats {\n-\t__le32 tx_good_frames;\n-\t__le32 tx_coll16_errs;\n-\t__le32 tx_late_colls;\n-\t__le32 tx_underruns;\n-\t__le32 tx_lost_carrier;\n-\t__le32 tx_deferred;\n-\t__le32 tx_one_colls;\n-\t__le32 tx_multi_colls;\n-\t__le32 tx_total_colls;\n-\t__le32 rx_good_frames;\n-\t__le32 rx_crc_errs;\n-\t__le32 rx_align_errs;\n-\t__le32 rx_resource_errs;\n-\t__le32 rx_overrun_errs;\n-\t__le32 rx_colls_errs;\n-\t__le32 rx_runt_errs;\n-\t__le32 done_marker;\n-};\n-\n-enum Rx_ring_state_bits {\n-\tRrNoMem=1, RrPostponed=2, RrNoResources=4, RrOOMReported=8,\n-};\n-\n-/* Do not change the position (alignment) of the first few elements!\n-   The later elements are grouped for cache locality.\n-\n-   Unfortunately, all the positions have been shifted since there.\n-   A new re-alignment is required.  2000/03/06  SAW */\n-struct speedo_private {\n-    void __iomem *regs;\n-\tstruct TxFD\t*tx_ring;\t\t/* Commands (usually CmdTxPacket). */\n-\tstruct RxFD *rx_ringp[RX_RING_SIZE];\t/* Rx descriptor, used as ring. */\n-\t/* The addresses of a Tx/Rx-in-place packets/buffers. */\n-\tstruct sk_buff *tx_skbuff[TX_RING_SIZE];\n-\tstruct sk_buff *rx_skbuff[RX_RING_SIZE];\n-\t/* Mapped addresses of the rings. */\n-\tdma_addr_t tx_ring_dma;\n-#define TX_RING_ELEM_DMA(sp, n) ((sp)->tx_ring_dma + (n)*sizeof(struct TxFD))\n-\tdma_addr_t rx_ring_dma[RX_RING_SIZE];\n-\tstruct descriptor *last_cmd;\t\t/* Last command sent. */\n-\tunsigned int cur_tx, dirty_tx;\t\t/* The ring entries to be free()ed. */\n-\tspinlock_t lock;\t\t\t/* Group with Tx control cache line. */\n-\tu32 tx_threshold;\t\t\t/* The value for txdesc.count. */\n-\tstruct RxFD *last_rxf;\t\t\t/* Last filled RX buffer. */\n-\tdma_addr_t last_rxf_dma;\n-\tunsigned int cur_rx, dirty_rx;\t\t/* The next free ring entry */\n-\tlong last_rx_time;\t\t\t/* Last Rx, in jiffies, to handle Rx hang. */\n-\tstruct net_device_stats stats;\n-\tstruct speedo_stats *lstats;\n-\tdma_addr_t lstats_dma;\n-\tint chip_id;\n-\tstruct pci_dev *pdev;\n-\tstruct timer_list timer;\t\t/* Media selection timer. */\n-\tstruct speedo_mc_block *mc_setup_head;\t/* Multicast setup frame list head. */\n-\tstruct speedo_mc_block *mc_setup_tail;\t/* Multicast setup frame list tail. */\n-\tlong in_interrupt;\t\t\t/* Word-aligned dev->interrupt */\n-\tunsigned char acpi_pwr;\n-\tsigned char rx_mode;\t\t\t/* Current PROMISC/ALLMULTI setting. */\n-\tunsigned int tx_full:1;\t\t\t/* The Tx queue is full. */\n-\tunsigned int flow_ctrl:1;\t\t/* Use 802.3x flow control. */\n-\tunsigned int rx_bug:1;\t\t\t/* Work around receiver hang errata. */\n-\tunsigned char default_port:8;\t\t/* Last dev->if_port value. */\n-\tunsigned char rx_ring_state;\t\t/* RX ring status flags. */\n-\tunsigned short phy[2];\t\t\t/* PHY media interfaces available. */\n-\tunsigned short partner;\t\t\t/* Link partner caps. */\n-\tstruct mii_if_info mii_if;\t\t/* MII API hooks, info */\n-\tu32 msg_enable;\t\t\t\t/* debug message level */\n-};\n-\n-/* The parameters for a CmdConfigure operation.\n-   There are so many options that it would be difficult to document each bit.\n-   We mostly use the default or recommended settings. */\n-static const char i82557_config_cmd[CONFIG_DATA_SIZE] = {\n-\t22, 0x08, 0, 0,  0, 0, 0x32, 0x03,  1, /* 1=Use MII  0=Use AUI */\n-\t0, 0x2E, 0,  0x60, 0,\n-\t0xf2, 0x48,   0, 0x40, 0xf2, 0x80, \t\t/* 0x40=Force full-duplex */\n-\t0x3f, 0x05, };\n-static const char i82558_config_cmd[CONFIG_DATA_SIZE] = {\n-\t22, 0x08, 0, 1,  0, 0, 0x22, 0x03,  1, /* 1=Use MII  0=Use AUI */\n-\t0, 0x2E, 0,  0x60, 0x08, 0x88,\n-\t0x68, 0, 0x40, 0xf2, 0x84,\t\t/* Disable FC */\n-\t0x31, 0x05, };\n-\n-/* PHY media interface chips. */\n-static const char * const phys[] = {\n-\t\"None\", \"i82553-A/B\", \"i82553-C\", \"i82503\",\n-\t\"DP83840\", \"80c240\", \"80c24\", \"i82555\",\n-\t\"unknown-8\", \"unknown-9\", \"DP83840A\", \"unknown-11\",\n-\t\"unknown-12\", \"unknown-13\", \"unknown-14\", \"unknown-15\", };\n-enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240,\n-\t\t\t\t\t S80C24, I82555, DP83840A=10, };\n-static const char is_mii[] = { 0, 1, 1, 0, 1, 1, 0, 1 };\n-#define EE_READ_CMD\t\t(6)\n-\n-static int eepro100_init_one(struct pci_dev *pdev,\n-\t\tconst struct pci_device_id *ent);\n-\n-static int do_eeprom_cmd(void __iomem *ioaddr, int cmd, int cmd_len);\n-static int mdio_read(struct net_device *dev, int phy_id, int location);\n-static void mdio_write(struct net_device *dev, int phy_id, int location, int value);\n-static int speedo_open(struct net_device *dev);\n-static void speedo_resume(struct net_device *dev);\n-static void speedo_timer(unsigned long data);\n-static void speedo_init_rx_ring(struct net_device *dev);\n-static void speedo_tx_timeout(struct net_device *dev);\n-static int speedo_start_xmit(struct sk_buff *skb, struct net_device *dev);\n-static void speedo_refill_rx_buffers(struct net_device *dev, int force);\n-static int speedo_rx(struct net_device *dev);\n-static void speedo_tx_buffer_gc(struct net_device *dev);\n-static irqreturn_t speedo_interrupt(int irq, void *dev_instance);\n-static int speedo_close(struct net_device *dev);\n-static struct net_device_stats *speedo_get_stats(struct net_device *dev);\n-static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);\n-static void set_rx_mode(struct net_device *dev);\n-static void speedo_show_state(struct net_device *dev);\n-static const struct ethtool_ops ethtool_ops;\n-\n-\n-\n-#ifdef honor_default_port\n-/* Optional driver feature to allow forcing the transceiver setting.\n-   Not recommended. */\n-static int mii_ctrl[8] = { 0x3300, 0x3100, 0x0000, 0x0100,\n-\t\t\t\t\t\t   0x2000, 0x2100, 0x0400, 0x3100};\n-#endif\n-\n-/* How to wait for the command unit to accept a command.\n-   Typically this takes 0 ticks. */\n-static inline unsigned char wait_for_cmd_done(struct net_device *dev,\n-\t\t\t\t\t\t\t\t\t\t\t  \tstruct speedo_private *sp)\n-{\n-\tint wait = 1000;\n-\tvoid __iomem *cmd_ioaddr = sp->regs + SCBCmd;\n-\tunsigned char r;\n-\n-\tdo  {\n-\t\tudelay(1);\n-\t\tr = ioread8(cmd_ioaddr);\n-\t} while(r && --wait >= 0);\n-\n-\tif (wait < 0)\n-\t\tprintk(KERN_ALERT \"%s: wait_for_cmd_done timeout!\\n\", dev->name);\n-\treturn r;\n-}\n-\n-static int __devinit eepro100_init_one (struct pci_dev *pdev,\n-\t\tconst struct pci_device_id *ent)\n-{\n-\tvoid __iomem *ioaddr;\n-\tint irq, pci_bar;\n-\tint acpi_idle_state = 0, pm;\n-\tstatic int cards_found /* = 0 */;\n-\tunsigned long pci_base;\n-\n-#ifndef MODULE\n-\t/* when built-in, we only print version if device is found */\n-\tstatic int did_version;\n-\tif (did_version++ == 0)\n-\t\tprintk(version);\n-#endif\n-\n-\t/* save power state before pci_enable_device overwrites it */\n-\tpm = pci_find_capability(pdev, PCI_CAP_ID_PM);\n-\tif (pm) {\n-\t\tu16 pwr_command;\n-\t\tpci_read_config_word(pdev, pm + PCI_PM_CTRL, &pwr_command);\n-\t\tacpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;\n-\t}\n-\n-\tif (pci_enable_device(pdev))\n-\t\tgoto err_out_free_mmio_region;\n-\n-\tpci_set_master(pdev);\n-\n-\tif (!request_region(pci_resource_start(pdev, 1),\n-\t\t\tpci_resource_len(pdev, 1), \"eepro100\")) {\n-\t\tdev_err(&pdev->dev, \"eepro100: cannot reserve I/O ports\\n\");\n-\t\tgoto err_out_none;\n-\t}\n-\tif (!request_mem_region(pci_resource_start(pdev, 0),\n-\t\t\tpci_resource_len(pdev, 0), \"eepro100\")) {\n-\t\tdev_err(&pdev->dev, \"eepro100: cannot reserve MMIO region\\n\");\n-\t\tgoto err_out_free_pio_region;\n-\t}\n-\n-\tirq = pdev->irq;\n-\tpci_bar = use_io ? 1 : 0;\n-\tpci_base = pci_resource_start(pdev, pci_bar);\n-\tif (DEBUG & NETIF_MSG_PROBE)\n-\t\tprintk(\"Found Intel i82557 PCI Speedo at %#lx, IRQ %d.\\n\",\n-\t\t       pci_base, irq);\n-\n-\tioaddr = pci_iomap(pdev, pci_bar, 0);\n-\tif (!ioaddr) {\n-\t\tdev_err(&pdev->dev, \"eepro100: cannot remap IO\\n\");\n-\t\tgoto err_out_free_mmio_region;\n-\t}\n-\n-\tif (speedo_found1(pdev, ioaddr, cards_found, acpi_idle_state) == 0)\n-\t\tcards_found++;\n-\telse\n-\t\tgoto err_out_iounmap;\n-\n-\treturn 0;\n-\n-err_out_iounmap: ;\n-\tpci_iounmap(pdev, ioaddr);\n-err_out_free_mmio_region:\n-\trelease_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));\n-err_out_free_pio_region:\n-\trelease_region(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));\n-err_out_none:\n-\treturn -ENODEV;\n-}\n-\n-#ifdef CONFIG_NET_POLL_CONTROLLER\n-/*\n- * Polling 'interrupt' - used by things like netconsole to send skbs\n- * without having to re-enable interrupts. It's not called while\n- * the interrupt routine is executing.\n- */\n-\n-static void poll_speedo (struct net_device *dev)\n-{\n-\t/* disable_irq is not very nice, but with the funny lockless design\n-\t   we have no other choice. */\n-\tdisable_irq(dev->irq);\n-\tspeedo_interrupt (dev->irq, dev);\n-\tenable_irq(dev->irq);\n-}\n-#endif\n-\n-static int __devinit speedo_found1(struct pci_dev *pdev,\n-\t\tvoid __iomem *ioaddr, int card_idx, int acpi_idle_state)\n-{\n-\tstruct net_device *dev;\n-\tstruct speedo_private *sp;\n-\tconst char *product;\n-\tint i, option;\n-\tu16 eeprom[0x100];\n-\tint size;\n-\tvoid *tx_ring_space;\n-\tdma_addr_t tx_ring_dma;\n-\tDECLARE_MAC_BUF(mac);\n-\n-\tsize = TX_RING_SIZE * sizeof(struct TxFD) + sizeof(struct speedo_stats);\n-\ttx_ring_space = pci_alloc_consistent(pdev, size, &tx_ring_dma);\n-\tif (tx_ring_space == NULL)\n-\t\treturn -1;\n-\n-\tdev = alloc_etherdev(sizeof(struct speedo_private));\n-\tif (dev == NULL) {\n-\t\tprintk(KERN_ERR \"eepro100: Could not allocate ethernet device.\\n\");\n-\t\tpci_free_consistent(pdev, size, tx_ring_space, tx_ring_dma);\n-\t\treturn -1;\n-\t}\n-\n-\tSET_NETDEV_DEV(dev, &pdev->dev);\n-\n-\tif (dev->mem_start > 0)\n-\t\toption = dev->mem_start;\n-\telse if (card_idx >= 0  &&  options[card_idx] >= 0)\n-\t\toption = options[card_idx];\n-\telse\n-\t\toption = 0;\n-\n-\trtnl_lock();\n-\tif (dev_alloc_name(dev, dev->name) < 0)\n-\t\tgoto err_free_unlock;\n-\n-\t/* Read the station address EEPROM before doing the reset.\n-\t   Nominally his should even be done before accepting the device, but\n-\t   then we wouldn't have a device name with which to report the error.\n-\t   The size test is for 6 bit vs. 8 bit address serial EEPROMs.\n-\t*/\n-\t{\n-\t\tvoid __iomem *iobase;\n-\t\tint read_cmd, ee_size;\n-\t\tu16 sum;\n-\t\tint j;\n-\n-\t\t/* Use IO only to avoid postponed writes and satisfy EEPROM timing\n-\t\t   requirements. */\n-\t\tiobase = pci_iomap(pdev, 1, pci_resource_len(pdev, 1));\n-\t\tif (!iobase)\n-\t\t\tgoto err_free_unlock;\n-\t\tif ((do_eeprom_cmd(iobase, EE_READ_CMD << 24, 27) & 0xffe0000)\n-\t\t\t== 0xffe0000) {\n-\t\t\tee_size = 0x100;\n-\t\t\tread_cmd = EE_READ_CMD << 24;\n-\t\t} else {\n-\t\t\tee_size = 0x40;\n-\t\t\tread_cmd = EE_READ_CMD << 22;\n-\t\t}\n-\n-\t\tfor (j = 0, i = 0, sum = 0; i < ee_size; i++) {\n-\t\t\tu16 value = do_eeprom_cmd(iobase, read_cmd | (i << 16), 27);\n-\t\t\teeprom[i] = value;\n-\t\t\tsum += value;\n-\t\t\tif (i < 3) {\n-\t\t\t\tdev->dev_addr[j++] = value;\n-\t\t\t\tdev->dev_addr[j++] = value >> 8;\n-\t\t\t}\n-\t\t}\n-\t\tif (sum != 0xBABA)\n-\t\t\tprintk(KERN_WARNING \"%s: Invalid EEPROM checksum %#4.4x, \"\n-\t\t\t\t   \"check settings before activating this device!\\n\",\n-\t\t\t\t   dev->name, sum);\n-\t\t/* Don't  unregister_netdev(dev);  as the EEPro may actually be\n-\t\t   usable, especially if the MAC address is set later.\n-\t\t   On the other hand, it may be unusable if MDI data is corrupted. */\n-\n-\t\tpci_iounmap(pdev, iobase);\n-\t}\n-\n-\t/* Reset the chip: stop Tx and Rx processes and clear counters.\n-\t   This takes less than 10usec and will easily finish before the next\n-\t   action. */\n-\tiowrite32(PortReset, ioaddr + SCBPort);\n-\tioread32(ioaddr + SCBPort);\n-\tudelay(10);\n-\n-\tif (eeprom[3] & 0x0100)\n-\t\tproduct = \"OEM i82557/i82558 10/100 Ethernet\";\n-\telse\n-\t\tproduct = pci_name(pdev);\n-\n-\tprintk(KERN_INFO \"%s: %s, %s, IRQ %d.\\n\", dev->name, product,\n-\t\t   print_mac(mac, dev->dev_addr), pdev->irq);\n-\n-\tsp = netdev_priv(dev);\n-\n-\t/* we must initialize this early, for mdio_{read,write} */\n-\tsp->regs = ioaddr;\n-\n-#if 1 || defined(kernel_bloat)\n-\t/* OK, this is pure kernel bloat.  I don't like it when other drivers\n-\t   waste non-pageable kernel space to emit similar messages, but I need\n-\t   them for bug reports. */\n-\t{\n-\t\tconst char *connectors[] = {\" RJ45\", \" BNC\", \" AUI\", \" MII\"};\n-\t\t/* The self-test results must be paragraph aligned. */\n-\t\tvolatile s32 *self_test_results;\n-\t\tint boguscnt = 16000;\t/* Timeout for set-test. */\n-\t\tif ((eeprom[3] & 0x03) != 0x03)\n-\t\t\tprintk(KERN_INFO \"  Receiver lock-up bug exists -- enabling\"\n-\t\t\t\t   \" work-around.\\n\");\n-\t\tprintk(KERN_INFO \"  Board assembly %4.4x%2.2x-%3.3d, Physical\"\n-\t\t\t   \" connectors present:\",\n-\t\t\t   eeprom[8], eeprom[9]>>8, eeprom[9] & 0xff);\n-\t\tfor (i = 0; i < 4; i++)\n-\t\t\tif (eeprom[5] & (1<<i))\n-\t\t\t\tprintk(connectors[i]);\n-\t\tprintk(\"\\n\"KERN_INFO\"  Primary interface chip %s PHY #%d.\\n\",\n-\t\t\t   phys[(eeprom[6]>>8)&15], eeprom[6] & 0x1f);\n-\t\tif (eeprom[7] & 0x0700)\n-\t\t\tprintk(KERN_INFO \"    Secondary interface chip %s.\\n\",\n-\t\t\t\t   phys[(eeprom[7]>>8)&7]);\n-\t\tif (((eeprom[6]>>8) & 0x3f) == DP83840\n-\t\t\t||  ((eeprom[6]>>8) & 0x3f) == DP83840A) {\n-\t\t\tint mdi_reg23 = mdio_read(dev, eeprom[6] & 0x1f, 23) | 0x0422;\n-\t\t\tif (congenb)\n-\t\t\t  mdi_reg23 |= 0x0100;\n-\t\t\tprintk(KERN_INFO\"  DP83840 specific setup, setting register 23 to %4.4x.\\n\",\n-\t\t\t\t   mdi_reg23);\n-\t\t\tmdio_write(dev, eeprom[6] & 0x1f, 23, mdi_reg23);\n-\t\t}\n-\t\tif ((option >= 0) && (option & 0x70)) {\n-\t\t\tprintk(KERN_INFO \"  Forcing %dMbs %s-duplex operation.\\n\",\n-\t\t\t\t   (option & 0x20 ? 100 : 10),\n-\t\t\t\t   (option & 0x10 ? \"full\" : \"half\"));\n-\t\t\tmdio_write(dev, eeprom[6] & 0x1f, MII_BMCR,\n-\t\t\t\t\t   ((option & 0x20) ? 0x2000 : 0) | \t/* 100mbps? */\n-\t\t\t\t\t   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */\n-\t\t}\n-\n-\t\t/* Perform a system self-test. */\n-\t\tself_test_results = (s32*) ((((long) tx_ring_space) + 15) & ~0xf);\n-\t\tself_test_results[0] = 0;\n-\t\tself_test_results[1] = -1;\n-\t\tiowrite32(tx_ring_dma | PortSelfTest, ioaddr + SCBPort);\n-\t\tdo {\n-\t\t\tudelay(10);\n-\t\t} while (self_test_results[1] == -1  &&  --boguscnt >= 0);\n-\n-\t\tif (boguscnt < 0) {\t\t/* Test optimized out. */\n-\t\t\tprintk(KERN_ERR \"Self test failed, status %8.8x:\\n\"\n-\t\t\t\t   KERN_ERR \" Failure to initialize the i82557.\\n\"\n-\t\t\t\t   KERN_ERR \" Verify that the card is a bus-master\"\n-\t\t\t\t   \" capable slot.\\n\",\n-\t\t\t\t   self_test_results[1]);\n-\t\t} else\n-\t\t\tprintk(KERN_INFO \"  General self-test: %s.\\n\"\n-\t\t\t\t   KERN_INFO \"  Serial sub-system self-test: %s.\\n\"\n-\t\t\t\t   KERN_INFO \"  Internal registers self-test: %s.\\n\"\n-\t\t\t\t   KERN_INFO \"  ROM checksum self-test: %s (%#8.8x).\\n\",\n-\t\t\t\t   self_test_results[1] & 0x1000 ? \"failed\" : \"passed\",\n-\t\t\t\t   self_test_results[1] & 0x0020 ? \"failed\" : \"passed\",\n-\t\t\t\t   self_test_results[1] & 0x0008 ? \"failed\" : \"passed\",\n-\t\t\t\t   self_test_results[1] & 0x0004 ? \"failed\" : \"passed\",\n-\t\t\t\t   self_test_results[0]);\n-\t}\n-#endif  /* kernel_bloat */\n-\n-\tiowrite32(PortReset, ioaddr + SCBPort);\n-\tioread32(ioaddr + SCBPort);\n-\tudelay(10);\n-\n-\t/* Return the chip to its original power state. */\n-\tpci_set_power_state(pdev, acpi_idle_state);\n-\n-\tpci_set_drvdata (pdev, dev);\n-\tSET_NETDEV_DEV(dev, &pdev->dev);\n-\n-\tdev->irq = pdev->irq;\n-\n-\tsp->pdev = pdev;\n-\tsp->msg_enable = DEBUG;\n-\tsp->acpi_pwr = acpi_idle_state;\n-\tsp->tx_ring = tx_ring_space;\n-\tsp->tx_ring_dma = tx_ring_dma;\n-\tsp->lstats = (struct speedo_stats *)(sp->tx_ring + TX_RING_SIZE);\n-\tsp->lstats_dma = TX_RING_ELEM_DMA(sp, TX_RING_SIZE);\n-\tinit_timer(&sp->timer); /* used in ioctl() */\n-\tspin_lock_init(&sp->lock);\n-\n-\tsp->mii_if.full_duplex = option >= 0 && (option & 0x10) ? 1 : 0;\n-\tif (card_idx >= 0) {\n-\t\tif (full_duplex[card_idx] >= 0)\n-\t\t\tsp->mii_if.full_duplex = full_duplex[card_idx];\n-\t}\n-\tsp->default_port = option >= 0 ? (option & 0x0f) : 0;\n-\n-\tsp->phy[0] = eeprom[6];\n-\tsp->phy[1] = eeprom[7];\n-\n-\tsp->mii_if.phy_id = eeprom[6] & 0x1f;\n-\tsp->mii_if.phy_id_mask = 0x1f;\n-\tsp->mii_if.reg_num_mask = 0x1f;\n-\tsp->mii_if.dev = dev;\n-\tsp->mii_if.mdio_read = mdio_read;\n-\tsp->mii_if.mdio_write = mdio_write;\n-\n-\tsp->rx_bug = (eeprom[3] & 0x03) == 3 ? 0 : 1;\n-\tif (((pdev->device > 0x1030 && (pdev->device < 0x103F)))\n-\t    || (pdev->device == 0x2449) || (pdev->device == 0x2459)\n-            || (pdev->device == 0x245D)) {\n-\t    \tsp->chip_id = 1;\n-\t}\n-\n-\tif (sp->rx_bug)\n-\t\tprintk(KERN_INFO \"  Receiver lock-up workaround activated.\\n\");\n-\n-\t/* The Speedo-specific entries in the device structure. */\n-\tdev->open = &speedo_open;\n-\tdev->hard_start_xmit = &speedo_start_xmit;\n-\tnetif_set_tx_timeout(dev, &speedo_tx_timeout, TX_TIMEOUT);\n-\tdev->stop = &speedo_close;\n-\tdev->get_stats = &speedo_get_stats;\n-\tdev->set_multicast_list = &set_rx_mode;\n-\tdev->do_ioctl = &speedo_ioctl;\n-\tSET_ETHTOOL_OPS(dev, &ethtool_ops);\n-#ifdef CONFIG_NET_POLL_CONTROLLER\n-\tdev->poll_controller = &poll_speedo;\n-#endif\n-\n-\tif (register_netdevice(dev))\n-\t\tgoto err_free_unlock;\n-\trtnl_unlock();\n-\n-\treturn 0;\n-\n- err_free_unlock:\n-\trtnl_unlock();\n-\tfree_netdev(dev);\n-\treturn -1;\n-}\n-\n-static void do_slow_command(struct net_device *dev, struct speedo_private *sp, int cmd)\n-{\n-\tvoid __iomem *cmd_ioaddr = sp->regs + SCBCmd;\n-\tint wait = 0;\n-\tdo\n-\t\tif (ioread8(cmd_ioaddr) == 0) break;\n-\twhile(++wait <= 200);\n-\tif (wait > 100)\n-\t\tprintk(KERN_ERR \"Command %4.4x never accepted (%d polls)!\\n\",\n-\t\t       ioread8(cmd_ioaddr), wait);\n-\n-\tiowrite8(cmd, cmd_ioaddr);\n-\n-\tfor (wait = 0; wait <= 100; wait++)\n-\t\tif (ioread8(cmd_ioaddr) == 0) return;\n-\tfor (; wait <= 20000; wait++)\n-\t\tif (ioread8(cmd_ioaddr) == 0) return;\n-\t\telse udelay(1);\n-\tprintk(KERN_ERR \"Command %4.4x was not accepted after %d polls!\"\n-\t       \"  Current status %8.8x.\\n\",\n-\t       cmd, wait, ioread32(sp->regs + SCBStatus));\n-}\n-\n-/* Serial EEPROM section.\n-   A \"bit\" grungy, but we work our way through bit-by-bit :->. */\n-/*  EEPROM_Ctrl bits. */\n-#define EE_SHIFT_CLK\t0x01\t/* EEPROM shift clock. */\n-#define EE_CS\t\t\t0x02\t/* EEPROM chip select. */\n-#define EE_DATA_WRITE\t0x04\t/* EEPROM chip data in. */\n-#define EE_DATA_READ\t0x08\t/* EEPROM chip data out. */\n-#define EE_ENB\t\t\t(0x4800 | EE_CS)\n-#define EE_WRITE_0\t\t0x4802\n-#define EE_WRITE_1\t\t0x4806\n-#define EE_OFFSET\t\tSCBeeprom\n-\n-/* The fixes for the code were kindly provided by Dragan Stancevic\n-   <visitor@valinux.com> to strictly follow Intel specifications of EEPROM\n-   access timing.\n-   The publicly available sheet 64486302 (sec. 3.1) specifies 1us access\n-   interval for serial EEPROM.  However, it looks like that there is an\n-   additional requirement dictating larger udelay's in the code below.\n-   2000/05/24  SAW */\n-static int __devinit do_eeprom_cmd(void __iomem *ioaddr, int cmd, int cmd_len)\n-{\n-\tunsigned retval = 0;\n-\tvoid __iomem *ee_addr = ioaddr + SCBeeprom;\n-\n-\tiowrite16(EE_ENB, ee_addr); udelay(2);\n-\tiowrite16(EE_ENB | EE_SHIFT_CLK, ee_addr); udelay(2);\n-\n-\t/* Shift the command bits out. */\n-\tdo {\n-\t\tshort dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;\n-\t\tiowrite16(dataval, ee_addr); udelay(2);\n-\t\tiowrite16(dataval | EE_SHIFT_CLK, ee_addr); udelay(2);\n-\t\tretval = (retval << 1) | ((ioread16(ee_addr) & EE_DATA_READ) ? 1 : 0);\n-\t} while (--cmd_len >= 0);\n-\tiowrite16(EE_ENB, ee_addr); udelay(2);\n-\n-\t/* Terminate the EEPROM access. */\n-\tiowrite16(EE_ENB & ~EE_CS, ee_addr);\n-\treturn retval;\n-}\n-\n-static int mdio_read(struct net_device *dev, int phy_id, int location)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint val, boguscnt = 64*10;\t\t/* <64 usec. to complete, typ 27 ticks */\n-\tiowrite32(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI);\n-\tdo {\n-\t\tval = ioread32(ioaddr + SCBCtrlMDI);\n-\t\tif (--boguscnt < 0) {\n-\t\t\tprintk(KERN_ERR \" mdio_read() timed out with val = %8.8x.\\n\", val);\n-\t\t\tbreak;\n-\t\t}\n-\t} while (! (val & 0x10000000));\n-\treturn val & 0xffff;\n-}\n-\n-static void mdio_write(struct net_device *dev, int phy_id, int location, int value)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint val, boguscnt = 64*10;\t\t/* <64 usec. to complete, typ 27 ticks */\n-\tiowrite32(0x04000000 | (location<<16) | (phy_id<<21) | value,\n-\t\t ioaddr + SCBCtrlMDI);\n-\tdo {\n-\t\tval = ioread32(ioaddr + SCBCtrlMDI);\n-\t\tif (--boguscnt < 0) {\n-\t\t\tprintk(KERN_ERR\" mdio_write() timed out with val = %8.8x.\\n\", val);\n-\t\t\tbreak;\n-\t\t}\n-\t} while (! (val & 0x10000000));\n-}\n-\n-static int\n-speedo_open(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint retval;\n-\n-\tif (netif_msg_ifup(sp))\n-\t\tprintk(KERN_DEBUG \"%s: speedo_open() irq %d.\\n\", dev->name, dev->irq);\n-\n-\tpci_set_power_state(sp->pdev, PCI_D0);\n-\n-\t/* Set up the Tx queue early.. */\n-\tsp->cur_tx = 0;\n-\tsp->dirty_tx = 0;\n-\tsp->last_cmd = NULL;\n-\tsp->tx_full = 0;\n-\tsp->in_interrupt = 0;\n-\n-\t/* .. we can safely take handler calls during init. */\n-\tretval = request_irq(dev->irq, &speedo_interrupt, IRQF_SHARED, dev->name, dev);\n-\tif (retval) {\n-\t\treturn retval;\n-\t}\n-\n-\tdev->if_port = sp->default_port;\n-\n-#ifdef oh_no_you_dont_unless_you_honour_the_options_passed_in_to_us\n-\t/* Retrigger negotiation to reset previous errors. */\n-\tif ((sp->phy[0] & 0x8000) == 0) {\n-\t\tint phy_addr = sp->phy[0] & 0x1f ;\n-\t\t/* Use 0x3300 for restarting NWay, other values to force xcvr:\n-\t\t   0x0000 10-HD\n-\t\t   0x0100 10-FD\n-\t\t   0x2000 100-HD\n-\t\t   0x2100 100-FD\n-\t\t*/\n-#ifdef honor_default_port\n-\t\tmdio_write(dev, phy_addr, MII_BMCR, mii_ctrl[dev->default_port & 7]);\n-#else\n-\t\tmdio_write(dev, phy_addr, MII_BMCR, 0x3300);\n-#endif\n-\t}\n-#endif\n-\n-\tspeedo_init_rx_ring(dev);\n-\n-\t/* Fire up the hardware. */\n-\tiowrite16(SCBMaskAll, ioaddr + SCBCmd);\n-\tspeedo_resume(dev);\n-\n-\tnetdevice_start(dev);\n-\tnetif_start_queue(dev);\n-\n-\t/* Setup the chip and configure the multicast list. */\n-\tsp->mc_setup_head = NULL;\n-\tsp->mc_setup_tail = NULL;\n-\tsp->flow_ctrl = sp->partner = 0;\n-\tsp->rx_mode = -1;\t\t\t/* Invalid -> always reset the mode. */\n-\tset_rx_mode(dev);\n-\tif ((sp->phy[0] & 0x8000) == 0)\n-\t\tsp->mii_if.advertising = mdio_read(dev, sp->phy[0] & 0x1f, MII_ADVERTISE);\n-\n-\tmii_check_link(&sp->mii_if);\n-\n-\tif (netif_msg_ifup(sp)) {\n-\t\tprintk(KERN_DEBUG \"%s: Done speedo_open(), status %8.8x.\\n\",\n-\t\t\t   dev->name, ioread16(ioaddr + SCBStatus));\n-\t}\n-\n-\t/* Set the timer.  The timer serves a dual purpose:\n-\t   1) to monitor the media interface (e.g. link beat) and perhaps switch\n-\t   to an alternate media type\n-\t   2) to monitor Rx activity, and restart the Rx process if the receiver\n-\t   hangs. */\n-\tsp->timer.expires = RUN_AT((24*HZ)/10); \t\t\t/* 2.4 sec. */\n-\tsp->timer.data = (unsigned long)dev;\n-\tsp->timer.function = &speedo_timer;\t\t\t\t\t/* timer handler */\n-\tadd_timer(&sp->timer);\n-\n-\t/* No need to wait for the command unit to accept here. */\n-\tif ((sp->phy[0] & 0x8000) == 0)\n-\t\tmdio_read(dev, sp->phy[0] & 0x1f, MII_BMCR);\n-\n-\treturn 0;\n-}\n-\n-/* Start the chip hardware after a full reset. */\n-static void speedo_resume(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\n-\t/* Start with a Tx threshold of 256 (0x..20.... 8 byte units). */\n-\tsp->tx_threshold = 0x01208000;\n-\n-\t/* Set the segment registers to '0'. */\n-\tif (wait_for_cmd_done(dev, sp) != 0) {\n-\t\tiowrite32(PortPartialReset, ioaddr + SCBPort);\n-\t\tudelay(10);\n-\t}\n-\n-        iowrite32(0, ioaddr + SCBPointer);\n-        ioread32(ioaddr + SCBPointer);\t\t\t/* Flush to PCI. */\n-        udelay(10);\t\t\t/* Bogus, but it avoids the bug. */\n-\n-        /* Note: these next two operations can take a while. */\n-        do_slow_command(dev, sp, RxAddrLoad);\n-        do_slow_command(dev, sp, CUCmdBase);\n-\n-\t/* Load the statistics block and rx ring addresses. */\n-\tiowrite32(sp->lstats_dma, ioaddr + SCBPointer);\n-\tioread32(ioaddr + SCBPointer);\t\t\t/* Flush to PCI */\n-\n-\tiowrite8(CUStatsAddr, ioaddr + SCBCmd);\n-\tsp->lstats->done_marker = 0;\n-\twait_for_cmd_done(dev, sp);\n-\n-\tif (sp->rx_ringp[sp->cur_rx % RX_RING_SIZE] == NULL) {\n-\t\tif (netif_msg_rx_err(sp))\n-\t\t\tprintk(KERN_DEBUG \"%s: NULL cur_rx in speedo_resume().\\n\",\n-\t\t\t\t\tdev->name);\n-\t} else {\n-\t\tiowrite32(sp->rx_ring_dma[sp->cur_rx % RX_RING_SIZE],\n-\t\t\t ioaddr + SCBPointer);\n-\t\tioread32(ioaddr + SCBPointer);\t\t/* Flush to PCI */\n-\t}\n-\n-\t/* Note: RxStart should complete instantly. */\n-\tdo_slow_command(dev, sp, RxStart);\n-\tdo_slow_command(dev, sp, CUDumpStats);\n-\n-\t/* Fill the first command with our physical address. */\n-\t{\n-\t\tstruct descriptor *ias_cmd;\n-\n-\t\tias_cmd =\n-\t\t\t(struct descriptor *)&sp->tx_ring[sp->cur_tx++ % TX_RING_SIZE];\n-\t\t/* Avoid a bug(?!) here by marking the command already completed. */\n-\t\tias_cmd->cmd_status = cpu_to_le32((CmdSuspend | CmdIASetup) | 0xa000);\n-\t\tias_cmd->link =\n-\t\t\tcpu_to_le32(TX_RING_ELEM_DMA(sp, sp->cur_tx % TX_RING_SIZE));\n-\t\tmemcpy(ias_cmd->params, dev->dev_addr, 6);\n-\t\tif (sp->last_cmd)\n-\t\t\tclear_suspend(sp->last_cmd);\n-\t\tsp->last_cmd = ias_cmd;\n-\t}\n-\n-\t/* Start the chip's Tx process and unmask interrupts. */\n-\tiowrite32(TX_RING_ELEM_DMA(sp, sp->dirty_tx % TX_RING_SIZE),\n-\t\t ioaddr + SCBPointer);\n-\t/* We are not ACK-ing FCP and ER in the interrupt handler yet so they should\n-\t   remain masked --Dragan */\n-\tiowrite16(CUStart | SCBMaskEarlyRx | SCBMaskFlowCtl, ioaddr + SCBCmd);\n-}\n-\n-/*\n- * Sometimes the receiver stops making progress.  This routine knows how to\n- * get it going again, without losing packets or being otherwise nasty like\n- * a chip reset would be.  Previously the driver had a whole sequence\n- * of if RxSuspended, if it's no buffers do one thing, if it's no resources,\n- * do another, etc.  But those things don't really matter.  Separate logic\n- * in the ISR provides for allocating buffers--the other half of operation\n- * is just making sure the receiver is active.  speedo_rx_soft_reset does that.\n- * This problem with the old, more involved algorithm is shown up under\n- * ping floods on the order of 60K packets/second on a 100Mbps fdx network.\n- */\n-static void\n-speedo_rx_soft_reset(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tstruct RxFD *rfd;\n-\tvoid __iomem *ioaddr;\n-\n-\tioaddr = sp->regs;\n-\tif (wait_for_cmd_done(dev, sp) != 0) {\n-\t\tprintk(\"%s: previous command stalled\\n\", dev->name);\n-\t\treturn;\n-\t}\n-\t/*\n-\t* Put the hardware into a known state.\n-\t*/\n-\tiowrite8(RxAbort, ioaddr + SCBCmd);\n-\n-\trfd = sp->rx_ringp[sp->cur_rx % RX_RING_SIZE];\n-\n-\trfd->rx_buf_addr = cpu_to_le32(0xffffffff);\n-\n-\tif (wait_for_cmd_done(dev, sp) != 0) {\n-\t\tprintk(\"%s: RxAbort command stalled\\n\", dev->name);\n-\t\treturn;\n-\t}\n-\tiowrite32(sp->rx_ring_dma[sp->cur_rx % RX_RING_SIZE],\n-\t\tioaddr + SCBPointer);\n-\tiowrite8(RxStart, ioaddr + SCBCmd);\n-}\n-\n-\n-/* Media monitoring and control. */\n-static void speedo_timer(unsigned long data)\n-{\n-\tstruct net_device *dev = (struct net_device *)data;\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint phy_num = sp->phy[0] & 0x1f;\n-\n-\t/* We have MII and lost link beat. */\n-\tif ((sp->phy[0] & 0x8000) == 0) {\n-\t\tint partner = mdio_read(dev, phy_num, MII_LPA);\n-\t\tif (partner != sp->partner) {\n-\t\t\tint flow_ctrl = sp->mii_if.advertising & partner & 0x0400 ? 1 : 0;\n-\t\t\tif (netif_msg_link(sp)) {\n-\t\t\t\tprintk(KERN_DEBUG \"%s: Link status change.\\n\", dev->name);\n-\t\t\t\tprintk(KERN_DEBUG \"%s: Old partner %x, new %x, adv %x.\\n\",\n-\t\t\t\t\t   dev->name, sp->partner, partner, sp->mii_if.advertising);\n-\t\t\t}\n-\t\t\tsp->partner = partner;\n-\t\t\tif (flow_ctrl != sp->flow_ctrl) {\n-\t\t\t\tsp->flow_ctrl = flow_ctrl;\n-\t\t\t\tsp->rx_mode = -1;\t/* Trigger a reload. */\n-\t\t\t}\n-\t\t}\n-\t}\n-\tmii_check_link(&sp->mii_if);\n-\tif (netif_msg_timer(sp)) {\n-\t\tprintk(KERN_DEBUG \"%s: Media control tick, status %4.4x.\\n\",\n-\t\t\t   dev->name, ioread16(ioaddr + SCBStatus));\n-\t}\n-\tif (sp->rx_mode < 0  ||\n-\t\t(sp->rx_bug  && jiffies - sp->last_rx_time > 2*HZ)) {\n-\t\t/* We haven't received a packet in a Long Time.  We might have been\n-\t\t   bitten by the receiver hang bug.  This can be cleared by sending\n-\t\t   a set multicast list command. */\n-\t\tif (netif_msg_timer(sp))\n-\t\t\tprintk(KERN_DEBUG \"%s: Sending a multicast list set command\"\n-\t\t\t\t   \" from a timer routine,\"\n-\t\t\t\t   \" m=%d, j=%ld, l=%ld.\\n\",\n-\t\t\t\t   dev->name, sp->rx_mode, jiffies, sp->last_rx_time);\n-\t\tset_rx_mode(dev);\n-\t}\n-\t/* We must continue to monitor the media. */\n-\tsp->timer.expires = RUN_AT(2*HZ); \t\t\t/* 2.0 sec. */\n-\tadd_timer(&sp->timer);\n-}\n-\n-static void speedo_show_state(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tint i;\n-\n-\tif (netif_msg_pktdata(sp)) {\n-\t\tprintk(KERN_DEBUG \"%s: Tx ring dump,  Tx queue %u / %u:\\n\",\n-\t\t    dev->name, sp->cur_tx, sp->dirty_tx);\n-\t\tfor (i = 0; i < TX_RING_SIZE; i++)\n-\t\t\tprintk(KERN_DEBUG \"%s:  %c%c%2d %8.8x.\\n\", dev->name,\n-\t\t\t    i == sp->dirty_tx % TX_RING_SIZE ? '*' : ' ',\n-\t\t\t    i == sp->cur_tx % TX_RING_SIZE ? '=' : ' ',\n-\t\t\t    i, sp->tx_ring[i].status);\n-\n-\t\tprintk(KERN_DEBUG \"%s: Printing Rx ring\"\n-\t\t    \" (next to receive into %u, dirty index %u).\\n\",\n-\t\t    dev->name, sp->cur_rx, sp->dirty_rx);\n-\t\tfor (i = 0; i < RX_RING_SIZE; i++)\n-\t\t\tprintk(KERN_DEBUG \"%s: %c%c%c%2d %8.8x.\\n\", dev->name,\n-\t\t\t    sp->rx_ringp[i] == sp->last_rxf ? 'l' : ' ',\n-\t\t\t    i == sp->dirty_rx % RX_RING_SIZE ? '*' : ' ',\n-\t\t\t    i == sp->cur_rx % RX_RING_SIZE ? '=' : ' ',\n-\t\t\t    i, (sp->rx_ringp[i] != NULL) ?\n-\t\t\t    (unsigned)sp->rx_ringp[i]->status : 0);\n-\t}\n-\n-#if 0\n-\t{\n-\t\tvoid __iomem *ioaddr = sp->regs;\n-\t\tint phy_num = sp->phy[0] & 0x1f;\n-\t\tfor (i = 0; i < 16; i++) {\n-\t\t\t/* FIXME: what does it mean?  --SAW */\n-\t\t\tif (i == 6) i = 21;\n-\t\t\tprintk(KERN_DEBUG \"%s:  PHY index %d register %d is %4.4x.\\n\",\n-\t\t\t\t   dev->name, phy_num, i, mdio_read(dev, phy_num, i));\n-\t\t}\n-\t}\n-#endif\n-\n-}\n-\n-/* Initialize the Rx and Tx rings, along with various 'dev' bits. */\n-static void\n-speedo_init_rx_ring(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tstruct RxFD *rxf, *last_rxf = NULL;\n-\tdma_addr_t last_rxf_dma = 0 /* to shut up the compiler */;\n-\tint i;\n-\n-\tsp->cur_rx = 0;\n-\n-\tfor (i = 0; i < RX_RING_SIZE; i++) {\n-\t\tstruct sk_buff *skb;\n-\t\tskb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD));\n-\t\tif (skb)\n-\t\t\trx_align(skb);        /* Align IP on 16 byte boundary */\n-\t\tsp->rx_skbuff[i] = skb;\n-\t\tif (skb == NULL)\n-\t\t\tbreak;\t\t\t/* OK.  Just initially short of Rx bufs. */\n-\t\tskb->dev = dev;\t\t\t/* Mark as being used by this device. */\n-\t\trxf = (struct RxFD *)skb->data;\n-\t\tsp->rx_ringp[i] = rxf;\n-\t\tsp->rx_ring_dma[i] =\n-\t\t\tpci_map_single(sp->pdev, rxf,\n-\t\t\t\t\tPKT_BUF_SZ + sizeof(struct RxFD), PCI_DMA_BIDIRECTIONAL);\n-\t\tskb_reserve(skb, sizeof(struct RxFD));\n-\t\tif (last_rxf) {\n-\t\t\tlast_rxf->link = cpu_to_le32(sp->rx_ring_dma[i]);\n-\t\t\tpci_dma_sync_single_for_device(sp->pdev, last_rxf_dma,\n-\t\t\t\t\t\t\t\t\t\t   sizeof(struct RxFD), PCI_DMA_TODEVICE);\n-\t\t}\n-\t\tlast_rxf = rxf;\n-\t\tlast_rxf_dma = sp->rx_ring_dma[i];\n-\t\trxf->status = cpu_to_le32(0x00000001);\t/* '1' is flag value only. */\n-\t\trxf->link = 0;\t\t\t\t\t\t/* None yet. */\n-\t\t/* This field unused by i82557. */\n-\t\trxf->rx_buf_addr = cpu_to_le32(0xffffffff);\n-\t\trxf->count = cpu_to_le32(PKT_BUF_SZ << 16);\n-\t\tpci_dma_sync_single_for_device(sp->pdev, sp->rx_ring_dma[i],\n-\t\t\t\t\t\t\t\t\t   sizeof(struct RxFD), PCI_DMA_TODEVICE);\n-\t}\n-\tsp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);\n-\t/* Mark the last entry as end-of-list. */\n-\tlast_rxf->status = cpu_to_le32(0xC0000002);\t/* '2' is flag value only. */\n-\tpci_dma_sync_single_for_device(sp->pdev, sp->rx_ring_dma[RX_RING_SIZE-1],\n-\t\t\t\t\t\t\t\t   sizeof(struct RxFD), PCI_DMA_TODEVICE);\n-\tsp->last_rxf = last_rxf;\n-\tsp->last_rxf_dma = last_rxf_dma;\n-}\n-\n-static void speedo_purge_tx(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tint entry;\n-\n-\twhile ((int)(sp->cur_tx - sp->dirty_tx) > 0) {\n-\t\tentry = sp->dirty_tx % TX_RING_SIZE;\n-\t\tif (sp->tx_skbuff[entry]) {\n-\t\t\tsp->stats.tx_errors++;\n-\t\t\tpci_unmap_single(sp->pdev,\n-\t\t\t\t\tle32_to_cpu(sp->tx_ring[entry].tx_buf_addr0),\n-\t\t\t\t\tsp->tx_skbuff[entry]->len, PCI_DMA_TODEVICE);\n-\t\t\tdev_kfree_skb_irq(sp->tx_skbuff[entry]);\n-\t\t\tsp->tx_skbuff[entry] = NULL;\n-\t\t}\n-\t\tsp->dirty_tx++;\n-\t}\n-\twhile (sp->mc_setup_head != NULL) {\n-\t\tstruct speedo_mc_block *t;\n-\t\tif (netif_msg_tx_err(sp))\n-\t\t\tprintk(KERN_DEBUG \"%s: freeing mc frame.\\n\", dev->name);\n-\t\tpci_unmap_single(sp->pdev, sp->mc_setup_head->frame_dma,\n-\t\t\t\tsp->mc_setup_head->len, PCI_DMA_TODEVICE);\n-\t\tt = sp->mc_setup_head->next;\n-\t\tkfree(sp->mc_setup_head);\n-\t\tsp->mc_setup_head = t;\n-\t}\n-\tsp->mc_setup_tail = NULL;\n-\tsp->tx_full = 0;\n-\tnetif_wake_queue(dev);\n-}\n-\n-static void reset_mii(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\n-\t/* Reset the MII transceiver, suggested by Fred Young @ scalable.com. */\n-\tif ((sp->phy[0] & 0x8000) == 0) {\n-\t\tint phy_addr = sp->phy[0] & 0x1f;\n-\t\tint advertising = mdio_read(dev, phy_addr, MII_ADVERTISE);\n-\t\tint mii_bmcr = mdio_read(dev, phy_addr, MII_BMCR);\n-\t\tmdio_write(dev, phy_addr, MII_BMCR, 0x0400);\n-\t\tmdio_write(dev, phy_addr, MII_BMSR, 0x0000);\n-\t\tmdio_write(dev, phy_addr, MII_ADVERTISE, 0x0000);\n-\t\tmdio_write(dev, phy_addr, MII_BMCR, 0x8000);\n-#ifdef honor_default_port\n-\t\tmdio_write(dev, phy_addr, MII_BMCR, mii_ctrl[dev->default_port & 7]);\n-#else\n-\t\tmdio_read(dev, phy_addr, MII_BMCR);\n-\t\tmdio_write(dev, phy_addr, MII_BMCR, mii_bmcr);\n-\t\tmdio_write(dev, phy_addr, MII_ADVERTISE, advertising);\n-#endif\n-\t}\n-}\n-\n-static void speedo_tx_timeout(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint status = ioread16(ioaddr + SCBStatus);\n-\tunsigned long flags;\n-\n-\tif (netif_msg_tx_err(sp)) {\n-\t\tprintk(KERN_WARNING \"%s: Transmit timed out: status %4.4x \"\n-\t\t   \" %4.4x at %d/%d command %8.8x.\\n\",\n-\t\t   dev->name, status, ioread16(ioaddr + SCBCmd),\n-\t\t   sp->dirty_tx, sp->cur_tx,\n-\t\t   sp->tx_ring[sp->dirty_tx % TX_RING_SIZE].status);\n-\n-\t}\n-\tspeedo_show_state(dev);\n-#if 0\n-\tif ((status & 0x00C0) != 0x0080\n-\t\t&&  (status & 0x003C) == 0x0010) {\n-\t\t/* Only the command unit has stopped. */\n-\t\tprintk(KERN_WARNING \"%s: Trying to restart the transmitter...\\n\",\n-\t\t\t   dev->name);\n-\t\tiowrite32(TX_RING_ELEM_DMA(sp, dirty_tx % TX_RING_SIZE]),\n-\t\t\t ioaddr + SCBPointer);\n-\t\tiowrite16(CUStart, ioaddr + SCBCmd);\n-\t\treset_mii(dev);\n-\t} else {\n-#else\n-\t{\n-#endif\n-\t\tdel_timer_sync(&sp->timer);\n-\t\t/* Reset the Tx and Rx units. */\n-\t\tiowrite32(PortReset, ioaddr + SCBPort);\n-\t\t/* We may get spurious interrupts here.  But I don't think that they\n-\t\t   may do much harm.  1999/12/09 SAW */\n-\t\tudelay(10);\n-\t\t/* Disable interrupts. */\n-\t\tiowrite16(SCBMaskAll, ioaddr + SCBCmd);\n-\t\tsynchronize_irq(dev->irq);\n-\t\tspeedo_tx_buffer_gc(dev);\n-\t\t/* Free as much as possible.\n-\t\t   It helps to recover from a hang because of out-of-memory.\n-\t\t   It also simplifies speedo_resume() in case TX ring is full or\n-\t\t   close-to-be full. */\n-\t\tspeedo_purge_tx(dev);\n-\t\tspeedo_refill_rx_buffers(dev, 1);\n-\t\tspin_lock_irqsave(&sp->lock, flags);\n-\t\tspeedo_resume(dev);\n-\t\tsp->rx_mode = -1;\n-\t\tdev->trans_start = jiffies;\n-\t\tspin_unlock_irqrestore(&sp->lock, flags);\n-\t\tset_rx_mode(dev); /* it takes the spinlock itself --SAW */\n-\t\t/* Reset MII transceiver.  Do it before starting the timer to serialize\n-\t\t   mdio_xxx operations.  Yes, it's a paranoya :-)  2000/05/09 SAW */\n-\t\treset_mii(dev);\n-\t\tsp->timer.expires = RUN_AT(2*HZ);\n-\t\tadd_timer(&sp->timer);\n-\t}\n-\treturn;\n-}\n-\n-static int\n-speedo_start_xmit(struct sk_buff *skb, struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint entry;\n-\n-\t/* Prevent interrupts from changing the Tx ring from underneath us. */\n-\tunsigned long flags;\n-\n-\tspin_lock_irqsave(&sp->lock, flags);\n-\n-\t/* Check if there are enough space. */\n-\tif ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {\n-\t\tprintk(KERN_ERR \"%s: incorrect tbusy state, fixed.\\n\", dev->name);\n-\t\tnetif_stop_queue(dev);\n-\t\tsp->tx_full = 1;\n-\t\tspin_unlock_irqrestore(&sp->lock, flags);\n-\t\treturn 1;\n-\t}\n-\n-\t/* Calculate the Tx descriptor entry. */\n-\tentry = sp->cur_tx++ % TX_RING_SIZE;\n-\n-\tsp->tx_skbuff[entry] = skb;\n-\tsp->tx_ring[entry].status =\n-\t\tcpu_to_le32(CmdSuspend | CmdTx | CmdTxFlex);\n-\tif (!(entry & ((TX_RING_SIZE>>2)-1)))\n-\t\tsp->tx_ring[entry].status |= cpu_to_le32(CmdIntr);\n-\tsp->tx_ring[entry].link =\n-\t\tcpu_to_le32(TX_RING_ELEM_DMA(sp, sp->cur_tx % TX_RING_SIZE));\n-\tsp->tx_ring[entry].tx_desc_addr =\n-\t\tcpu_to_le32(TX_RING_ELEM_DMA(sp, entry) + TX_DESCR_BUF_OFFSET);\n-\t/* The data region is always in one buffer descriptor. */\n-\tsp->tx_ring[entry].count = cpu_to_le32(sp->tx_threshold);\n-\tsp->tx_ring[entry].tx_buf_addr0 =\n-\t\tcpu_to_le32(pci_map_single(sp->pdev, skb->data,\n-\t\t\t\t\t   skb->len, PCI_DMA_TODEVICE));\n-\tsp->tx_ring[entry].tx_buf_size0 = cpu_to_le32(skb->len);\n-\n-\t/* workaround for hardware bug on 10 mbit half duplex */\n-\n-\tif ((sp->partner == 0) && (sp->chip_id == 1)) {\n-\t\twait_for_cmd_done(dev, sp);\n-\t\tiowrite8(0 , ioaddr + SCBCmd);\n-\t\tudelay(1);\n-\t}\n-\n-\t/* Trigger the command unit resume. */\n-\twait_for_cmd_done(dev, sp);\n-\tclear_suspend(sp->last_cmd);\n-\t/* We want the time window between clearing suspend flag on the previous\n-\t   command and resuming CU to be as small as possible.\n-\t   Interrupts in between are very undesired.  --SAW */\n-\tiowrite8(CUResume, ioaddr + SCBCmd);\n-\tsp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];\n-\n-\t/* Leave room for set_rx_mode(). If there is no more space than reserved\n-\t   for multicast filter mark the ring as full. */\n-\tif ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {\n-\t\tnetif_stop_queue(dev);\n-\t\tsp->tx_full = 1;\n-\t}\n-\n-\tspin_unlock_irqrestore(&sp->lock, flags);\n-\n-\tdev->trans_start = jiffies;\n-\n-\treturn 0;\n-}\n-\n-static void speedo_tx_buffer_gc(struct net_device *dev)\n-{\n-\tunsigned int dirty_tx;\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\n-\tdirty_tx = sp->dirty_tx;\n-\twhile ((int)(sp->cur_tx - dirty_tx) > 0) {\n-\t\tint entry = dirty_tx % TX_RING_SIZE;\n-\t\tint status = le32_to_cpu(sp->tx_ring[entry].status);\n-\n-\t\tif (netif_msg_tx_done(sp))\n-\t\t\tprintk(KERN_DEBUG \" scavenge candidate %d status %4.4x.\\n\",\n-\t\t\t\t   entry, status);\n-\t\tif ((status & StatusComplete) == 0)\n-\t\t\tbreak;\t\t\t/* It still hasn't been processed. */\n-\t\tif (status & TxUnderrun)\n-\t\t\tif (sp->tx_threshold < 0x01e08000) {\n-\t\t\t\tif (netif_msg_tx_err(sp))\n-\t\t\t\t\tprintk(KERN_DEBUG \"%s: TX underrun, threshold adjusted.\\n\",\n-\t\t\t\t\t\t   dev->name);\n-\t\t\t\tsp->tx_threshold += 0x00040000;\n-\t\t\t}\n-\t\t/* Free the original skb. */\n-\t\tif (sp->tx_skbuff[entry]) {\n-\t\t\tsp->stats.tx_packets++;\t/* Count only user packets. */\n-\t\t\tsp->stats.tx_bytes += sp->tx_skbuff[entry]->len;\n-\t\t\tpci_unmap_single(sp->pdev,\n-\t\t\t\t\tle32_to_cpu(sp->tx_ring[entry].tx_buf_addr0),\n-\t\t\t\t\tsp->tx_skbuff[entry]->len, PCI_DMA_TODEVICE);\n-\t\t\tdev_kfree_skb_irq(sp->tx_skbuff[entry]);\n-\t\t\tsp->tx_skbuff[entry] = NULL;\n-\t\t}\n-\t\tdirty_tx++;\n-\t}\n-\n-\tif (netif_msg_tx_err(sp) && (int)(sp->cur_tx - dirty_tx) > TX_RING_SIZE) {\n-\t\tprintk(KERN_ERR \"out-of-sync dirty pointer, %d vs. %d,\"\n-\t\t\t   \" full=%d.\\n\",\n-\t\t\t   dirty_tx, sp->cur_tx, sp->tx_full);\n-\t\tdirty_tx += TX_RING_SIZE;\n-\t}\n-\n-\twhile (sp->mc_setup_head != NULL\n-\t\t   && (int)(dirty_tx - sp->mc_setup_head->tx - 1) > 0) {\n-\t\tstruct speedo_mc_block *t;\n-\t\tif (netif_msg_tx_err(sp))\n-\t\t\tprintk(KERN_DEBUG \"%s: freeing mc frame.\\n\", dev->name);\n-\t\tpci_unmap_single(sp->pdev, sp->mc_setup_head->frame_dma,\n-\t\t\t\tsp->mc_setup_head->len, PCI_DMA_TODEVICE);\n-\t\tt = sp->mc_setup_head->next;\n-\t\tkfree(sp->mc_setup_head);\n-\t\tsp->mc_setup_head = t;\n-\t}\n-\tif (sp->mc_setup_head == NULL)\n-\t\tsp->mc_setup_tail = NULL;\n-\n-\tsp->dirty_tx = dirty_tx;\n-}\n-\n-/* The interrupt handler does all of the Rx thread work and cleans up\n-   after the Tx thread. */\n-static irqreturn_t speedo_interrupt(int irq, void *dev_instance)\n-{\n-\tstruct net_device *dev = (struct net_device *)dev_instance;\n-\tstruct speedo_private *sp;\n-\tvoid __iomem *ioaddr;\n-\tlong boguscnt = max_interrupt_work;\n-\tunsigned short status;\n-\tunsigned int handled = 0;\n-\n-\tsp = netdev_priv(dev);\n-\tioaddr = sp->regs;\n-\n-#ifndef final_version\n-\t/* A lock to prevent simultaneous entry on SMP machines. */\n-\tif (test_and_set_bit(0, (void*)&sp->in_interrupt)) {\n-\t\tprintk(KERN_ERR\"%s: SMP simultaneous entry of an interrupt handler.\\n\",\n-\t\t\t   dev->name);\n-\t\tsp->in_interrupt = 0;\t/* Avoid halting machine. */\n-\t\treturn IRQ_NONE;\n-\t}\n-#endif\n-\n-\tdo {\n-\t\tstatus = ioread16(ioaddr + SCBStatus);\n-\t\t/* Acknowledge all of the current interrupt sources ASAP. */\n-\t\t/* Will change from 0xfc00 to 0xff00 when we start handling\n-\t\t   FCP and ER interrupts --Dragan */\n-\t\tiowrite16(status & 0xfc00, ioaddr + SCBStatus);\n-\n-\t\tif (netif_msg_intr(sp))\n-\t\t\tprintk(KERN_DEBUG \"%s: interrupt  status=%#4.4x.\\n\",\n-\t\t\t\t   dev->name, status);\n-\n-\t\tif ((status & 0xfc00) == 0)\n-\t\t\tbreak;\n-\t\thandled = 1;\n-\n-\n-\t\tif ((status & 0x5000) ||\t/* Packet received, or Rx error. */\n-\t\t\t(sp->rx_ring_state&(RrNoMem|RrPostponed)) == RrPostponed)\n-\t\t\t\t\t\t\t\t\t/* Need to gather the postponed packet. */\n-\t\t\tspeedo_rx(dev);\n-\n-\t\t/* Always check if all rx buffers are allocated.  --SAW */\n-\t\tspeedo_refill_rx_buffers(dev, 0);\n-\n-\t\tspin_lock(&sp->lock);\n-\t\t/*\n-\t\t * The chip may have suspended reception for various reasons.\n-\t\t * Check for that, and re-prime it should this be the case.\n-\t\t */\n-\t\tswitch ((status >> 2) & 0xf) {\n-\t\tcase 0: /* Idle */\n-\t\t\tbreak;\n-\t\tcase 1:\t/* Suspended */\n-\t\tcase 2:\t/* No resources (RxFDs) */\n-\t\tcase 9:\t/* Suspended with no more RBDs */\n-\t\tcase 10: /* No resources due to no RBDs */\n-\t\tcase 12: /* Ready with no RBDs */\n-\t\t\tspeedo_rx_soft_reset(dev);\n-\t\t\tbreak;\n-\t\tcase 3:  case 5:  case 6:  case 7:  case 8:\n-\t\tcase 11:  case 13:  case 14:  case 15:\n-\t\t\t/* these are all reserved values */\n-\t\t\tbreak;\n-\t\t}\n-\n-\n-\t\t/* User interrupt, Command/Tx unit interrupt or CU not active. */\n-\t\tif (status & 0xA400) {\n-\t\t\tspeedo_tx_buffer_gc(dev);\n-\t\t\tif (sp->tx_full\n-\t\t\t\t&& (int)(sp->cur_tx - sp->dirty_tx) < TX_QUEUE_UNFULL) {\n-\t\t\t\t/* The ring is no longer full. */\n-\t\t\t\tsp->tx_full = 0;\n-\t\t\t\tnetif_wake_queue(dev); /* Attention: under a spinlock.  --SAW */\n-\t\t\t}\n-\t\t}\n-\n-\t\tspin_unlock(&sp->lock);\n-\n-\t\tif (--boguscnt < 0) {\n-\t\t\tprintk(KERN_ERR \"%s: Too much work at interrupt, status=0x%4.4x.\\n\",\n-\t\t\t\t   dev->name, status);\n-\t\t\t/* Clear all interrupt sources. */\n-\t\t\t/* Will change from 0xfc00 to 0xff00 when we start handling\n-\t\t\t   FCP and ER interrupts --Dragan */\n-\t\t\tiowrite16(0xfc00, ioaddr + SCBStatus);\n-\t\t\tbreak;\n-\t\t}\n-\t} while (1);\n-\n-\tif (netif_msg_intr(sp))\n-\t\tprintk(KERN_DEBUG \"%s: exiting interrupt, status=%#4.4x.\\n\",\n-\t\t\t   dev->name, ioread16(ioaddr + SCBStatus));\n-\n-\tclear_bit(0, (void*)&sp->in_interrupt);\n-\treturn IRQ_RETVAL(handled);\n-}\n-\n-static inline struct RxFD *speedo_rx_alloc(struct net_device *dev, int entry)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tstruct RxFD *rxf;\n-\tstruct sk_buff *skb;\n-\t/* Get a fresh skbuff to replace the consumed one. */\n-\tskb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD));\n-\tif (skb)\n-\t\trx_align(skb);\t\t/* Align IP on 16 byte boundary */\n-\tsp->rx_skbuff[entry] = skb;\n-\tif (skb == NULL) {\n-\t\tsp->rx_ringp[entry] = NULL;\n-\t\treturn NULL;\n-\t}\n-\trxf = sp->rx_ringp[entry] = (struct RxFD *)skb->data;\n-\tsp->rx_ring_dma[entry] =\n-\t\tpci_map_single(sp->pdev, rxf,\n-\t\t\t\t\t   PKT_BUF_SZ + sizeof(struct RxFD), PCI_DMA_FROMDEVICE);\n-\tskb->dev = dev;\n-\tskb_reserve(skb, sizeof(struct RxFD));\n-\trxf->rx_buf_addr = cpu_to_le32(0xffffffff);\n-\tpci_dma_sync_single_for_device(sp->pdev, sp->rx_ring_dma[entry],\n-\t\t\t\t\t\t\t\t   sizeof(struct RxFD), PCI_DMA_TODEVICE);\n-\treturn rxf;\n-}\n-\n-static inline void speedo_rx_link(struct net_device *dev, int entry,\n-\t\t\t\t\t\t\t\t  struct RxFD *rxf, dma_addr_t rxf_dma)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\trxf->status = cpu_to_le32(0xC0000001); \t/* '1' for driver use only. */\n-\trxf->link = 0;\t\t\t/* None yet. */\n-\trxf->count = cpu_to_le32(PKT_BUF_SZ << 16);\n-\tsp->last_rxf->link = cpu_to_le32(rxf_dma);\n-\tsp->last_rxf->status &= cpu_to_le32(~0xC0000000);\n-\tpci_dma_sync_single_for_device(sp->pdev, sp->last_rxf_dma,\n-\t\t\t\t\t\t\t\t   sizeof(struct RxFD), PCI_DMA_TODEVICE);\n-\tsp->last_rxf = rxf;\n-\tsp->last_rxf_dma = rxf_dma;\n-}\n-\n-static int speedo_refill_rx_buf(struct net_device *dev, int force)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tint entry;\n-\tstruct RxFD *rxf;\n-\n-\tentry = sp->dirty_rx % RX_RING_SIZE;\n-\tif (sp->rx_skbuff[entry] == NULL) {\n-\t\trxf = speedo_rx_alloc(dev, entry);\n-\t\tif (rxf == NULL) {\n-\t\t\tunsigned int forw;\n-\t\t\tint forw_entry;\n-\t\t\tif (netif_msg_rx_err(sp) || !(sp->rx_ring_state & RrOOMReported)) {\n-\t\t\t\tprintk(KERN_WARNING \"%s: can't fill rx buffer (force %d)!\\n\",\n-\t\t\t\t\t\tdev->name, force);\n-\t\t\t\tsp->rx_ring_state |= RrOOMReported;\n-\t\t\t}\n-\t\t\tspeedo_show_state(dev);\n-\t\t\tif (!force)\n-\t\t\t\treturn -1;\t/* Better luck next time!  */\n-\t\t\t/* Borrow an skb from one of next entries. */\n-\t\t\tfor (forw = sp->dirty_rx + 1; forw != sp->cur_rx; forw++)\n-\t\t\t\tif (sp->rx_skbuff[forw % RX_RING_SIZE] != NULL)\n-\t\t\t\t\tbreak;\n-\t\t\tif (forw == sp->cur_rx)\n-\t\t\t\treturn -1;\n-\t\t\tforw_entry = forw % RX_RING_SIZE;\n-\t\t\tsp->rx_skbuff[entry] = sp->rx_skbuff[forw_entry];\n-\t\t\tsp->rx_skbuff[forw_entry] = NULL;\n-\t\t\trxf = sp->rx_ringp[forw_entry];\n-\t\t\tsp->rx_ringp[forw_entry] = NULL;\n-\t\t\tsp->rx_ringp[entry] = rxf;\n-\t\t}\n-\t} else {\n-\t\trxf = sp->rx_ringp[entry];\n-\t}\n-\tspeedo_rx_link(dev, entry, rxf, sp->rx_ring_dma[entry]);\n-\tsp->dirty_rx++;\n-\tsp->rx_ring_state &= ~(RrNoMem|RrOOMReported); /* Mark the progress. */\n-\treturn 0;\n-}\n-\n-static void speedo_refill_rx_buffers(struct net_device *dev, int force)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\n-\t/* Refill the RX ring. */\n-\twhile ((int)(sp->cur_rx - sp->dirty_rx) > 0 &&\n-\t\t\tspeedo_refill_rx_buf(dev, force) != -1);\n-}\n-\n-static int\n-speedo_rx(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tint entry = sp->cur_rx % RX_RING_SIZE;\n-\tint rx_work_limit = sp->dirty_rx + RX_RING_SIZE - sp->cur_rx;\n-\tint alloc_ok = 1;\n-\tint npkts = 0;\n-\n-\tif (netif_msg_intr(sp))\n-\t\tprintk(KERN_DEBUG \" In speedo_rx().\\n\");\n-\t/* If we own the next entry, it's a new packet. Send it up. */\n-\twhile (sp->rx_ringp[entry] != NULL) {\n-\t\tint status;\n-\t\tint pkt_len;\n-\n-\t\tpci_dma_sync_single_for_cpu(sp->pdev, sp->rx_ring_dma[entry],\n-\t\t\t\t\t\t\t\t\tsizeof(struct RxFD), PCI_DMA_FROMDEVICE);\n-\t\tstatus = le32_to_cpu(sp->rx_ringp[entry]->status);\n-\t\tpkt_len = le32_to_cpu(sp->rx_ringp[entry]->count) & 0x3fff;\n-\n-\t\tif (!(status & RxComplete))\n-\t\t\tbreak;\n-\n-\t\tif (--rx_work_limit < 0)\n-\t\t\tbreak;\n-\n-\t\t/* Check for a rare out-of-memory case: the current buffer is\n-\t\t   the last buffer allocated in the RX ring.  --SAW */\n-\t\tif (sp->last_rxf == sp->rx_ringp[entry]) {\n-\t\t\t/* Postpone the packet.  It'll be reaped at an interrupt when this\n-\t\t\t   packet is no longer the last packet in the ring. */\n-\t\t\tif (netif_msg_rx_err(sp))\n-\t\t\t\tprintk(KERN_DEBUG \"%s: RX packet postponed!\\n\",\n-\t\t\t\t\t   dev->name);\n-\t\t\tsp->rx_ring_state |= RrPostponed;\n-\t\t\tbreak;\n-\t\t}\n-\n-\t\tif (netif_msg_rx_status(sp))\n-\t\t\tprintk(KERN_DEBUG \"  speedo_rx() status %8.8x len %d.\\n\", status,\n-\t\t\t\t   pkt_len);\n-\t\tif ((status & (RxErrTooBig|RxOK|0x0f90)) != RxOK) {\n-\t\t\tif (status & RxErrTooBig)\n-\t\t\t\tprintk(KERN_ERR \"%s: Ethernet frame overran the Rx buffer, \"\n-\t\t\t\t\t   \"status %8.8x!\\n\", dev->name, status);\n-\t\t\telse if (! (status & RxOK)) {\n-\t\t\t\t/* There was a fatal error.  This *should* be impossible. */\n-\t\t\t\tsp->stats.rx_errors++;\n-\t\t\t\tprintk(KERN_ERR \"%s: Anomalous event in speedo_rx(), \"\n-\t\t\t\t\t   \"status %8.8x.\\n\",\n-\t\t\t\t\t   dev->name, status);\n-\t\t\t}\n-\t\t} else {\n-\t\t\tstruct sk_buff *skb;\n-\n-\t\t\t/* Check if the packet is long enough to just accept without\n-\t\t\t   copying to a properly sized skbuff. */\n-\t\t\tif (pkt_len < rx_copybreak\n-\t\t\t\t&& (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {\n-\t\t\t\tskb_reserve(skb, 2);\t/* Align IP on 16 byte boundaries */\n-\t\t\t\t/* 'skb_put()' points to the start of sk_buff data area. */\n-\t\t\t\tpci_dma_sync_single_for_cpu(sp->pdev, sp->rx_ring_dma[entry],\n-\t\t\t\t\t\t\t\t\t\t\tsizeof(struct RxFD) + pkt_len,\n-\t\t\t\t\t\t\t\t\t\t\tPCI_DMA_FROMDEVICE);\n-\n-#if 1 || USE_IP_CSUM\n-\t\t\t\t/* Packet is in one chunk -- we can copy + cksum. */\n-\t\t\t\tskb_copy_to_linear_data(skb, sp->rx_skbuff[entry]->data, pkt_len);\n-\t\t\t\tskb_put(skb, pkt_len);\n-#else\n-\t\t\t\tskb_copy_from_linear_data(sp->rx_skbuff[entry],\n-\t\t\t\t\t\t\t  skb_put(skb, pkt_len),\n-\t\t\t\t\t\t\t  pkt_len);\n-#endif\n-\t\t\t\tpci_dma_sync_single_for_device(sp->pdev, sp->rx_ring_dma[entry],\n-\t\t\t\t\t\t\t\t\t\t\t   sizeof(struct RxFD) + pkt_len,\n-\t\t\t\t\t\t\t\t\t\t\t   PCI_DMA_FROMDEVICE);\n-\t\t\t\tnpkts++;\n-\t\t\t} else {\n-\t\t\t\t/* Pass up the already-filled skbuff. */\n-\t\t\t\tskb = sp->rx_skbuff[entry];\n-\t\t\t\tif (skb == NULL) {\n-\t\t\t\t\tprintk(KERN_ERR \"%s: Inconsistent Rx descriptor chain.\\n\",\n-\t\t\t\t\t\t   dev->name);\n-\t\t\t\t\tbreak;\n-\t\t\t\t}\n-\t\t\t\tsp->rx_skbuff[entry] = NULL;\n-\t\t\t\tskb_put(skb, pkt_len);\n-\t\t\t\tnpkts++;\n-\t\t\t\tsp->rx_ringp[entry] = NULL;\n-\t\t\t\tpci_unmap_single(sp->pdev, sp->rx_ring_dma[entry],\n-\t\t\t\t\t\t\t\t PKT_BUF_SZ + sizeof(struct RxFD),\n-\t\t\t\t\t\t\t\t PCI_DMA_FROMDEVICE);\n-\t\t\t}\n-\t\t\tskb->protocol = eth_type_trans(skb, dev);\n-\t\t\tnetif_rx(skb);\n-\t\t\tdev->last_rx = jiffies;\n-\t\t\tsp->stats.rx_packets++;\n-\t\t\tsp->stats.rx_bytes += pkt_len;\n-\t\t}\n-\t\tentry = (++sp->cur_rx) % RX_RING_SIZE;\n-\t\tsp->rx_ring_state &= ~RrPostponed;\n-\t\t/* Refill the recently taken buffers.\n-\t\t   Do it one-by-one to handle traffic bursts better. */\n-\t\tif (alloc_ok && speedo_refill_rx_buf(dev, 0) == -1)\n-\t\t\talloc_ok = 0;\n-\t}\n-\n-\t/* Try hard to refill the recently taken buffers. */\n-\tspeedo_refill_rx_buffers(dev, 1);\n-\n-\tif (npkts)\n-\t\tsp->last_rx_time = jiffies;\n-\n-\treturn 0;\n-}\n-\n-static int\n-speedo_close(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint i;\n-\n-\tnetdevice_stop(dev);\n-\tnetif_stop_queue(dev);\n-\n-\tif (netif_msg_ifdown(sp))\n-\t\tprintk(KERN_DEBUG \"%s: Shutting down ethercard, status was %4.4x.\\n\",\n-\t\t\t   dev->name, ioread16(ioaddr + SCBStatus));\n-\n-\t/* Shut off the media monitoring timer. */\n-\tdel_timer_sync(&sp->timer);\n-\n-\tiowrite16(SCBMaskAll, ioaddr + SCBCmd);\n-\n-\t/* Shutting down the chip nicely fails to disable flow control. So.. */\n-\tiowrite32(PortPartialReset, ioaddr + SCBPort);\n-\tioread32(ioaddr + SCBPort); /* flush posted write */\n-\t/*\n-\t * The chip requires a 10 microsecond quiet period.  Wait here!\n-\t */\n-\tudelay(10);\n-\n-\tfree_irq(dev->irq, dev);\n-\tspeedo_show_state(dev);\n-\n-    /* Free all the skbuffs in the Rx and Tx queues. */\n-\tfor (i = 0; i < RX_RING_SIZE; i++) {\n-\t\tstruct sk_buff *skb = sp->rx_skbuff[i];\n-\t\tsp->rx_skbuff[i] = NULL;\n-\t\t/* Clear the Rx descriptors. */\n-\t\tif (skb) {\n-\t\t\tpci_unmap_single(sp->pdev,\n-\t\t\t\t\t sp->rx_ring_dma[i],\n-\t\t\t\t\t PKT_BUF_SZ + sizeof(struct RxFD), PCI_DMA_FROMDEVICE);\n-\t\t\tdev_kfree_skb(skb);\n-\t\t}\n-\t}\n-\n-\tfor (i = 0; i < TX_RING_SIZE; i++) {\n-\t\tstruct sk_buff *skb = sp->tx_skbuff[i];\n-\t\tsp->tx_skbuff[i] = NULL;\n-\t\t/* Clear the Tx descriptors. */\n-\t\tif (skb) {\n-\t\t\tpci_unmap_single(sp->pdev,\n-\t\t\t\t\t le32_to_cpu(sp->tx_ring[i].tx_buf_addr0),\n-\t\t\t\t\t skb->len, PCI_DMA_TODEVICE);\n-\t\t\tdev_kfree_skb(skb);\n-\t\t}\n-\t}\n-\n-\t/* Free multicast setting blocks. */\n-\tfor (i = 0; sp->mc_setup_head != NULL; i++) {\n-\t\tstruct speedo_mc_block *t;\n-\t\tt = sp->mc_setup_head->next;\n-\t\tkfree(sp->mc_setup_head);\n-\t\tsp->mc_setup_head = t;\n-\t}\n-\tsp->mc_setup_tail = NULL;\n-\tif (netif_msg_ifdown(sp))\n-\t\tprintk(KERN_DEBUG \"%s: %d multicast blocks dropped.\\n\", dev->name, i);\n-\n-\tpci_set_power_state(sp->pdev, PCI_D2);\n-\n-\treturn 0;\n-}\n-\n-/* The Speedo-3 has an especially awkward and unusable method of getting\n-   statistics out of the chip.  It takes an unpredictable length of time\n-   for the dump-stats command to complete.  To avoid a busy-wait loop we\n-   update the stats with the previous dump results, and then trigger a\n-   new dump.\n-\n-   Oh, and incoming frames are dropped while executing dump-stats!\n-   */\n-static struct net_device_stats *\n-speedo_get_stats(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\n-\t/* Update only if the previous dump finished. */\n-\tif (sp->lstats->done_marker == cpu_to_le32(0xA007)) {\n-\t\tsp->stats.tx_aborted_errors += le32_to_cpu(sp->lstats->tx_coll16_errs);\n-\t\tsp->stats.tx_window_errors += le32_to_cpu(sp->lstats->tx_late_colls);\n-\t\tsp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats->tx_underruns);\n-\t\tsp->stats.tx_fifo_errors += le32_to_cpu(sp->lstats->tx_lost_carrier);\n-\t\t/*sp->stats.tx_deferred += le32_to_cpu(sp->lstats->tx_deferred);*/\n-\t\tsp->stats.collisions += le32_to_cpu(sp->lstats->tx_total_colls);\n-\t\tsp->stats.rx_crc_errors += le32_to_cpu(sp->lstats->rx_crc_errs);\n-\t\tsp->stats.rx_frame_errors += le32_to_cpu(sp->lstats->rx_align_errs);\n-\t\tsp->stats.rx_over_errors += le32_to_cpu(sp->lstats->rx_resource_errs);\n-\t\tsp->stats.rx_fifo_errors += le32_to_cpu(sp->lstats->rx_overrun_errs);\n-\t\tsp->stats.rx_length_errors += le32_to_cpu(sp->lstats->rx_runt_errs);\n-\t\tsp->lstats->done_marker = 0x0000;\n-\t\tif (netif_running(dev)) {\n-\t\t\tunsigned long flags;\n-\t\t\t/* Take a spinlock to make wait_for_cmd_done and sending the\n-\t\t\t   command atomic.  --SAW */\n-\t\t\tspin_lock_irqsave(&sp->lock, flags);\n-\t\t\twait_for_cmd_done(dev, sp);\n-\t\t\tiowrite8(CUDumpStats, ioaddr + SCBCmd);\n-\t\t\tspin_unlock_irqrestore(&sp->lock, flags);\n-\t\t}\n-\t}\n-\treturn &sp->stats;\n-}\n-\n-static void speedo_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tstrncpy(info->driver, \"eepro100\", sizeof(info->driver)-1);\n-\tstrncpy(info->version, version, sizeof(info->version)-1);\n-\tif (sp->pdev)\n-\t\tstrcpy(info->bus_info, pci_name(sp->pdev));\n-}\n-\n-static int speedo_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tspin_lock_irq(&sp->lock);\n-\tmii_ethtool_gset(&sp->mii_if, ecmd);\n-\tspin_unlock_irq(&sp->lock);\n-\treturn 0;\n-}\n-\n-static int speedo_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tint res;\n-\tspin_lock_irq(&sp->lock);\n-\tres = mii_ethtool_sset(&sp->mii_if, ecmd);\n-\tspin_unlock_irq(&sp->lock);\n-\treturn res;\n-}\n-\n-static int speedo_nway_reset(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\treturn mii_nway_restart(&sp->mii_if);\n-}\n-\n-static u32 speedo_get_link(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\treturn mii_link_ok(&sp->mii_if);\n-}\n-\n-static u32 speedo_get_msglevel(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\treturn sp->msg_enable;\n-}\n-\n-static void speedo_set_msglevel(struct net_device *dev, u32 v)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tsp->msg_enable = v;\n-}\n-\n-static const struct ethtool_ops ethtool_ops = {\n-\t.get_drvinfo = speedo_get_drvinfo,\n-\t.get_settings = speedo_get_settings,\n-\t.set_settings = speedo_set_settings,\n-\t.nway_reset = speedo_nway_reset,\n-\t.get_link = speedo_get_link,\n-\t.get_msglevel = speedo_get_msglevel,\n-\t.set_msglevel = speedo_set_msglevel,\n-};\n-\n-static int speedo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tstruct mii_ioctl_data *data = if_mii(rq);\n-\tint phy = sp->phy[0] & 0x1f;\n-\tint saved_acpi;\n-\tint t;\n-\n-    switch(cmd) {\n-\tcase SIOCGMIIPHY:\t\t/* Get address of MII PHY in use. */\n-\t\tdata->phy_id = phy;\n-\n-\tcase SIOCGMIIREG:\t\t/* Read MII PHY register. */\n-\t\t/* FIXME: these operations need to be serialized with MDIO\n-\t\t   access from the timeout handler.\n-\t\t   They are currently serialized only with MDIO access from the\n-\t\t   timer routine.  2000/05/09 SAW */\n-\t\tsaved_acpi = pci_set_power_state(sp->pdev, PCI_D0);\n-\t\tt = del_timer_sync(&sp->timer);\n-\t\tdata->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);\n-\t\tif (t)\n-\t\t\tadd_timer(&sp->timer); /* may be set to the past  --SAW */\n-\t\tpci_set_power_state(sp->pdev, saved_acpi);\n-\t\treturn 0;\n-\n-\tcase SIOCSMIIREG:\t\t/* Write MII PHY register. */\n-\t\tif (!capable(CAP_NET_ADMIN))\n-\t\t\treturn -EPERM;\n-\t\tsaved_acpi = pci_set_power_state(sp->pdev, PCI_D0);\n-\t\tt = del_timer_sync(&sp->timer);\n-\t\tmdio_write(dev, data->phy_id, data->reg_num, data->val_in);\n-\t\tif (t)\n-\t\t\tadd_timer(&sp->timer); /* may be set to the past  --SAW */\n-\t\tpci_set_power_state(sp->pdev, saved_acpi);\n-\t\treturn 0;\n-\tdefault:\n-\t\treturn -EOPNOTSUPP;\n-\t}\n-}\n-\n-/* Set or clear the multicast filter for this adaptor.\n-   This is very ugly with Intel chips -- we usually have to execute an\n-   entire configuration command, plus process a multicast command.\n-   This is complicated.  We must put a large configuration command and\n-   an arbitrarily-sized multicast command in the transmit list.\n-   To minimize the disruption -- the previous command might have already\n-   loaded the link -- we convert the current command block, normally a Tx\n-   command, into a no-op and link it to the new command.\n-*/\n-static void set_rx_mode(struct net_device *dev)\n-{\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tstruct descriptor *last_cmd;\n-\tchar new_rx_mode;\n-\tunsigned long flags;\n-\tint entry, i;\n-\n-\tif (dev->flags & IFF_PROMISC) {\t\t\t/* Set promiscuous. */\n-\t\tnew_rx_mode = 3;\n-\t} else if ((dev->flags & IFF_ALLMULTI)  ||\n-\t\t\t   dev->mc_count > multicast_filter_limit) {\n-\t\tnew_rx_mode = 1;\n-\t} else\n-\t\tnew_rx_mode = 0;\n-\n-\tif (netif_msg_rx_status(sp))\n-\t\tprintk(KERN_DEBUG \"%s: set_rx_mode %d -> %d\\n\", dev->name,\n-\t\t\t\tsp->rx_mode, new_rx_mode);\n-\n-\tif ((int)(sp->cur_tx - sp->dirty_tx) > TX_RING_SIZE - TX_MULTICAST_SIZE) {\n-\t    /* The Tx ring is full -- don't add anything!  Hope the mode will be\n-\t\t * set again later. */\n-\t\tsp->rx_mode = -1;\n-\t\treturn;\n-\t}\n-\n-\tif (new_rx_mode != sp->rx_mode) {\n-\t\tu8 *config_cmd_data;\n-\n-\t\tspin_lock_irqsave(&sp->lock, flags);\n-\t\tentry = sp->cur_tx++ % TX_RING_SIZE;\n-\t\tlast_cmd = sp->last_cmd;\n-\t\tsp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];\n-\n-\t\tsp->tx_skbuff[entry] = NULL;\t\t\t/* Redundant. */\n-\t\tsp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdConfigure);\n-\t\tsp->tx_ring[entry].link =\n-\t\t\tcpu_to_le32(TX_RING_ELEM_DMA(sp, (entry + 1) % TX_RING_SIZE));\n-\t\tconfig_cmd_data = (void *)&sp->tx_ring[entry].tx_desc_addr;\n-\t\t/* Construct a full CmdConfig frame. */\n-\t\tmemcpy(config_cmd_data, i82558_config_cmd, CONFIG_DATA_SIZE);\n-\t\tconfig_cmd_data[1] = (txfifo << 4) | rxfifo;\n-\t\tconfig_cmd_data[4] = rxdmacount;\n-\t\tconfig_cmd_data[5] = txdmacount + 0x80;\n-\t\tconfig_cmd_data[15] |= (new_rx_mode & 2) ? 1 : 0;\n-\t\t/* 0x80 doesn't disable FC 0x84 does.\n-\t\t   Disable Flow control since we are not ACK-ing any FC interrupts\n-\t\t   for now. --Dragan */\n-\t\tconfig_cmd_data[19] = 0x84;\n-\t\tconfig_cmd_data[19] |= sp->mii_if.full_duplex ? 0x40 : 0;\n-\t\tconfig_cmd_data[21] = (new_rx_mode & 1) ? 0x0D : 0x05;\n-\t\tif (sp->phy[0] & 0x8000) {\t\t\t/* Use the AUI port instead. */\n-\t\t\tconfig_cmd_data[15] |= 0x80;\n-\t\t\tconfig_cmd_data[8] = 0;\n-\t\t}\n-\t\t/* Trigger the command unit resume. */\n-\t\twait_for_cmd_done(dev, sp);\n-\t\tclear_suspend(last_cmd);\n-\t\tiowrite8(CUResume, ioaddr + SCBCmd);\n-\t\tif ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {\n-\t\t\tnetif_stop_queue(dev);\n-\t\t\tsp->tx_full = 1;\n-\t\t}\n-\t\tspin_unlock_irqrestore(&sp->lock, flags);\n-\t}\n-\n-\tif (new_rx_mode == 0  &&  dev->mc_count < 4) {\n-\t\t/* The simple case of 0-3 multicast list entries occurs often, and\n-\t\t   fits within one tx_ring[] entry. */\n-\t\tstruct dev_mc_list *mclist;\n-\t\t__le16 *setup_params, *eaddrs;\n-\n-\t\tspin_lock_irqsave(&sp->lock, flags);\n-\t\tentry = sp->cur_tx++ % TX_RING_SIZE;\n-\t\tlast_cmd = sp->last_cmd;\n-\t\tsp->last_cmd = (struct descriptor *)&sp->tx_ring[entry];\n-\n-\t\tsp->tx_skbuff[entry] = NULL;\n-\t\tsp->tx_ring[entry].status = cpu_to_le32(CmdSuspend | CmdMulticastList);\n-\t\tsp->tx_ring[entry].link =\n-\t\t\tcpu_to_le32(TX_RING_ELEM_DMA(sp, (entry + 1) % TX_RING_SIZE));\n-\t\tsp->tx_ring[entry].tx_desc_addr = 0; /* Really MC list count. */\n-\t\tsetup_params = (__le16 *)&sp->tx_ring[entry].tx_desc_addr;\n-\t\t*setup_params++ = cpu_to_le16(dev->mc_count*6);\n-\t\t/* Fill in the multicast addresses. */\n-\t\tfor (i = 0, mclist = dev->mc_list; i < dev->mc_count;\n-\t\t\t i++, mclist = mclist->next) {\n-\t\t\teaddrs = (__le16 *)mclist->dmi_addr;\n-\t\t\t*setup_params++ = *eaddrs++;\n-\t\t\t*setup_params++ = *eaddrs++;\n-\t\t\t*setup_params++ = *eaddrs++;\n-\t\t}\n-\n-\t\twait_for_cmd_done(dev, sp);\n-\t\tclear_suspend(last_cmd);\n-\t\t/* Immediately trigger the command unit resume. */\n-\t\tiowrite8(CUResume, ioaddr + SCBCmd);\n-\n-\t\tif ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {\n-\t\t\tnetif_stop_queue(dev);\n-\t\t\tsp->tx_full = 1;\n-\t\t}\n-\t\tspin_unlock_irqrestore(&sp->lock, flags);\n-\t} else if (new_rx_mode == 0) {\n-\t\tstruct dev_mc_list *mclist;\n-\t\t__le16 *setup_params, *eaddrs;\n-\t\tstruct speedo_mc_block *mc_blk;\n-\t\tstruct descriptor *mc_setup_frm;\n-\t\tint i;\n-\n-\t\tmc_blk = kmalloc(sizeof(*mc_blk) + 2 + multicast_filter_limit*6,\n-\t\t\t\t\t\t GFP_ATOMIC);\n-\t\tif (mc_blk == NULL) {\n-\t\t\tprintk(KERN_ERR \"%s: Failed to allocate a setup frame.\\n\",\n-\t\t\t\t   dev->name);\n-\t\t\tsp->rx_mode = -1; /* We failed, try again. */\n-\t\t\treturn;\n-\t\t}\n-\t\tmc_blk->next = NULL;\n-\t\tmc_blk->len = 2 + multicast_filter_limit*6;\n-\t\tmc_blk->frame_dma =\n-\t\t\tpci_map_single(sp->pdev, &mc_blk->frame, mc_blk->len,\n-\t\t\t\t\tPCI_DMA_TODEVICE);\n-\t\tmc_setup_frm = &mc_blk->frame;\n-\n-\t\t/* Fill the setup frame. */\n-\t\tif (netif_msg_ifup(sp))\n-\t\t\tprintk(KERN_DEBUG \"%s: Constructing a setup frame at %p.\\n\",\n-\t\t\t\t   dev->name, mc_setup_frm);\n-\t\tmc_setup_frm->cmd_status =\n-\t\t\tcpu_to_le32(CmdSuspend | CmdIntr | CmdMulticastList);\n-\t\t/* Link set below. */\n-\t\tsetup_params = (__le16 *)&mc_setup_frm->params;\n-\t\t*setup_params++ = cpu_to_le16(dev->mc_count*6);\n-\t\t/* Fill in the multicast addresses. */\n-\t\tfor (i = 0, mclist = dev->mc_list; i < dev->mc_count;\n-\t\t\t i++, mclist = mclist->next) {\n-\t\t\teaddrs = (__le16 *)mclist->dmi_addr;\n-\t\t\t*setup_params++ = *eaddrs++;\n-\t\t\t*setup_params++ = *eaddrs++;\n-\t\t\t*setup_params++ = *eaddrs++;\n-\t\t}\n-\n-\t\t/* Disable interrupts while playing with the Tx Cmd list. */\n-\t\tspin_lock_irqsave(&sp->lock, flags);\n-\n-\t\tif (sp->mc_setup_tail)\n-\t\t\tsp->mc_setup_tail->next = mc_blk;\n-\t\telse\n-\t\t\tsp->mc_setup_head = mc_blk;\n-\t\tsp->mc_setup_tail = mc_blk;\n-\t\tmc_blk->tx = sp->cur_tx;\n-\n-\t\tentry = sp->cur_tx++ % TX_RING_SIZE;\n-\t\tlast_cmd = sp->last_cmd;\n-\t\tsp->last_cmd = mc_setup_frm;\n-\n-\t\t/* Change the command to a NoOp, pointing to the CmdMulti command. */\n-\t\tsp->tx_skbuff[entry] = NULL;\n-\t\tsp->tx_ring[entry].status = cpu_to_le32(CmdNOp);\n-\t\tsp->tx_ring[entry].link = cpu_to_le32(mc_blk->frame_dma);\n-\n-\t\t/* Set the link in the setup frame. */\n-\t\tmc_setup_frm->link =\n-\t\t\tcpu_to_le32(TX_RING_ELEM_DMA(sp, (entry + 1) % TX_RING_SIZE));\n-\n-\t\tpci_dma_sync_single_for_device(sp->pdev, mc_blk->frame_dma,\n-\t\t\t\t\t\t\t\t\t   mc_blk->len, PCI_DMA_TODEVICE);\n-\n-\t\twait_for_cmd_done(dev, sp);\n-\t\tclear_suspend(last_cmd);\n-\t\t/* Immediately trigger the command unit resume. */\n-\t\tiowrite8(CUResume, ioaddr + SCBCmd);\n-\n-\t\tif ((int)(sp->cur_tx - sp->dirty_tx) >= TX_QUEUE_LIMIT) {\n-\t\t\tnetif_stop_queue(dev);\n-\t\t\tsp->tx_full = 1;\n-\t\t}\n-\t\tspin_unlock_irqrestore(&sp->lock, flags);\n-\n-\t\tif (netif_msg_rx_status(sp))\n-\t\t\tprintk(\" CmdMCSetup frame length %d in entry %d.\\n\",\n-\t\t\t\t   dev->mc_count, entry);\n-\t}\n-\n-\tsp->rx_mode = new_rx_mode;\n-}\n-\n-#ifdef CONFIG_PM\n-static int eepro100_suspend(struct pci_dev *pdev, pm_message_t state)\n-{\n-\tstruct net_device *dev = pci_get_drvdata (pdev);\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\n-\tpci_save_state(pdev);\n-\n-\tif (!netif_running(dev))\n-\t\treturn 0;\n-\n-\tdel_timer_sync(&sp->timer);\n-\n-\tnetif_device_detach(dev);\n-\tiowrite32(PortPartialReset, ioaddr + SCBPort);\n-\n-\t/* XXX call pci_set_power_state ()? */\n-\tpci_disable_device(pdev);\n-\tpci_set_power_state (pdev, PCI_D3hot);\n-\treturn 0;\n-}\n-\n-static int eepro100_resume(struct pci_dev *pdev)\n-{\n-\tstruct net_device *dev = pci_get_drvdata (pdev);\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\tvoid __iomem *ioaddr = sp->regs;\n-\tint rc;\n-\n-\tpci_set_power_state(pdev, PCI_D0);\n-\tpci_restore_state(pdev);\n-\n-\trc = pci_enable_device(pdev);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\tpci_set_master(pdev);\n-\n-\tif (!netif_running(dev))\n-\t\treturn 0;\n-\n-\t/* I'm absolutely uncertain if this part of code may work.\n-\t   The problems are:\n-\t    - correct hardware reinitialization;\n-\t\t- correct driver behavior between different steps of the\n-\t\t  reinitialization;\n-\t\t- serialization with other driver calls.\n-\t   2000/03/08  SAW */\n-\tiowrite16(SCBMaskAll, ioaddr + SCBCmd);\n-\tspeedo_resume(dev);\n-\tnetif_device_attach(dev);\n-\tsp->rx_mode = -1;\n-\tsp->flow_ctrl = sp->partner = 0;\n-\tset_rx_mode(dev);\n-\tsp->timer.expires = RUN_AT(2*HZ);\n-\tadd_timer(&sp->timer);\n-\treturn 0;\n-}\n-#endif /* CONFIG_PM */\n-\n-static void __devexit eepro100_remove_one (struct pci_dev *pdev)\n-{\n-\tstruct net_device *dev = pci_get_drvdata (pdev);\n-\tstruct speedo_private *sp = netdev_priv(dev);\n-\n-\tunregister_netdev(dev);\n-\n-\trelease_region(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));\n-\trelease_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));\n-\n-\tpci_iounmap(pdev, sp->regs);\n-\tpci_free_consistent(pdev, TX_RING_SIZE * sizeof(struct TxFD)\n-\t\t\t\t\t\t\t\t+ sizeof(struct speedo_stats),\n-\t\t\t\t\t\tsp->tx_ring, sp->tx_ring_dma);\n-\tpci_disable_device(pdev);\n-\tfree_netdev(dev);\n-}\n-\n-static struct pci_device_id eepro100_pci_tbl[] = {\n-\t{ PCI_VENDOR_ID_INTEL, 0x1229, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1209, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1029, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1030, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1031, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1032, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1033, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1034, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1035, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1036, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1037, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1038, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1039, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x103A, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x103B, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x103C, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x103D, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x103E, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1050, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1059, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x1227, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x2449, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x2459, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x245D, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x5200, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ PCI_VENDOR_ID_INTEL, 0x5201, PCI_ANY_ID, PCI_ANY_ID, },\n-\t{ 0,}\n-};\n-MODULE_DEVICE_TABLE(pci, eepro100_pci_tbl);\n-\n-static struct pci_driver eepro100_driver = {\n-\t.name\t\t= \"eepro100\",\n-\t.id_table\t= eepro100_pci_tbl,\n-\t.probe\t\t= eepro100_init_one,\n-\t.remove\t\t= __devexit_p(eepro100_remove_one),\n-#ifdef CONFIG_PM\n-\t.suspend\t= eepro100_suspend,\n-\t.resume\t\t= eepro100_resume,\n-#endif /* CONFIG_PM */\n-};\n-\n-static int __init eepro100_init_module(void)\n-{\n-#ifdef MODULE\n-\tprintk(version);\n-#endif\n-\treturn pci_register_driver(&eepro100_driver);\n-}\n-\n-static void __exit eepro100_cleanup_module(void)\n-{\n-\tpci_unregister_driver(&eepro100_driver);\n-}\n-\n-module_init(eepro100_init_module);\n-module_exit(eepro100_cleanup_module);\n-\n-/*\n- * Local variables:\n- *  compile-command: \"gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c eepro100.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`\"\n- *  c-indent-level: 4\n- *  c-basic-offset: 4\n- *  tab-width: 4\n- * End:\n- */\n",
    "prefixes": [
        "08/21"
    ]
}