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GET /api/patches/971356/?format=api
{ "id": 971356, "url": "http://patchwork.ozlabs.org/api/patches/971356/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20180918235702.26573-11-keith.busch@intel.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180918235702.26573-11-keith.busch@intel.com>", "list_archive_url": null, "date": "2018-09-18T23:57:02", "name": "[PATCHv3,10/10] PCI: Make link active reporting detection generic", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "da13901ee25b321a0320283b1387328dad5592a6", "submitter": { "id": 19950, "url": "http://patchwork.ozlabs.org/api/people/19950/?format=api", "name": "Keith Busch", "email": "keith.busch@intel.com" }, "delegate": { "id": 6763, "url": "http://patchwork.ozlabs.org/api/users/6763/?format=api", "username": "bhelgaas", "first_name": "Bjorn", "last_name": "Helgaas", "email": "bhelgaas@google.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20180918235702.26573-11-keith.busch@intel.com/mbox/", "series": [ { "id": 66288, "url": "http://patchwork.ozlabs.org/api/series/66288/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=66288", "date": "2018-09-18T23:56:52", "name": "PCI error handling", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/66288/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/971356/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/971356/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-pci-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 42FKcn4VVJz9sCS\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 19 Sep 2018 09:55:37 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1730689AbeISFah (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 19 Sep 2018 01:30:37 -0400", "from mga02.intel.com ([134.134.136.20]:47647 \"EHLO mga02.intel.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1730679AbeISFah (ORCPT <rfc822;linux-pci@vger.kernel.org>);\n\tWed, 19 Sep 2018 01:30:37 -0400", "from orsmga008.jf.intel.com ([10.7.209.65])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t18 Sep 2018 16:55:36 -0700", "from unknown (HELO localhost.lm.intel.com) ([10.232.112.44])\n\tby orsmga008.jf.intel.com with ESMTP; 18 Sep 2018 16:55:35 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.53,391,1531810800\"; d=\"scan'208\";a=\"74357550\"", "From": "Keith Busch <keith.busch@intel.com>", "To": "Linux PCI <linux-pci@vger.kernel.org>,\n\tBjorn Helgaas <bhelgaas@google.com>", "Cc": "Benjamin Herrenschmidt <benh@kernel.crashing.org>,\n\tSinan Kaya <okaya@kernel.org>,\n\tThomas Tai <thomas.tai@oracle.com>, poza@codeaurora.org,\n\tLukas Wunner <lukas@wunner.de>, Christoph Hellwig <hch@lst.de>,\n\tMika Westerberg <mika.westerberg@linux.intel.com>,\n\tKeith Busch <keith.busch@intel.com>", "Subject": "[PATCHv3 10/10] PCI: Make link active reporting detection generic", "Date": "Tue, 18 Sep 2018 17:57:02 -0600", "Message-Id": "<20180918235702.26573-11-keith.busch@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20180918235702.26573-1-keith.busch@intel.com>", "References": "<20180918235702.26573-1-keith.busch@intel.com>", "Sender": "linux-pci-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-pci.vger.kernel.org>", "X-Mailing-List": "linux-pci@vger.kernel.org" }, "content": "The spec has timing requirements when waiting for a link to become\nactive after a conventional reset. This patch implements those hard\ndelays when waiting for an active link so pciehp and dpc drivers don't\nneed to duplicate this.\n\nSince downstream ports that are HPC and DPC capable exist that do not\nimplement data link layer active reporting, the pci driver will wait\na fixed recommend time if the device reports it does not have link\nreporing capabilities.\n\nSigned-off-by: Keith Busch <keith.busch@intel.com>\n---\n drivers/pci/hotplug/pciehp.h | 6 ------\n drivers/pci/hotplug/pciehp_hpc.c | 22 ++--------------------\n drivers/pci/pci.c | 33 +++++++++++++++++++++++++++------\n drivers/pci/pcie/dpc.c | 4 +++-\n drivers/pci/probe.c | 1 +\n include/linux/pci.h | 1 +\n 6 files changed, 34 insertions(+), 33 deletions(-)", "diff": "diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h\nindex 8131c08b21e5..38177878cf10 100644\n--- a/drivers/pci/hotplug/pciehp.h\n+++ b/drivers/pci/hotplug/pciehp.h\n@@ -95,11 +95,6 @@ struct slot {\n *\tinterrupt (PCIe r4.0, sec 6.7.3.2)\n * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler\n *\ton reception of a Command Completed event\n- * @link_active_reporting: cached copy of Data Link Layer Link Active Reporting\n- *\tCapable bit in Link Capabilities register; if this bit is zero, the\n- *\tData Link Layer Link Active bit in the Link Status register will never\n- *\tbe set and the driver is thus confined to wait 1 second before assuming\n- *\tthe link to a hotplugged device is up and accessing it\n * @notification_enabled: whether the IRQ was requested successfully\n * @power_fault_detected: whether a power fault was detected by the hardware\n *\tthat has not yet been cleared by the user\n@@ -120,7 +115,6 @@ struct controller {\n \tstruct task_struct *poll_thread;\n \tunsigned long cmd_started;\t/* jiffies */\n \tunsigned int cmd_busy:1;\n-\tunsigned int link_active_reporting:1;\n \tunsigned int notification_enabled:1;\n \tunsigned int power_fault_detected;\n \tatomic_t pending_events;\ndiff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c\nindex 93003ff81166..13650f079188 100644\n--- a/drivers/pci/hotplug/pciehp_hpc.c\n+++ b/drivers/pci/hotplug/pciehp_hpc.c\n@@ -214,13 +214,6 @@ bool pciehp_check_link_active(struct controller *ctrl)\n \treturn ret;\n }\n \n-static void pcie_wait_link_active(struct controller *ctrl)\n-{\n-\tstruct pci_dev *pdev = ctrl_dev(ctrl);\n-\n-\tpcie_wait_for_link(pdev, true);\n-}\n-\n static bool pci_bus_check_dev(struct pci_bus *bus, int devfn)\n {\n \tu32 l;\n@@ -253,18 +246,9 @@ int pciehp_check_link_status(struct controller *ctrl)\n \tbool found;\n \tu16 lnk_status;\n \n-\t/*\n-\t * Data Link Layer Link Active Reporting must be capable for\n-\t * hot-plug capable downstream port. But old controller might\n-\t * not implement it. In this case, we wait for 1000 ms.\n-\t*/\n-\tif (ctrl->link_active_reporting)\n-\t\tpcie_wait_link_active(ctrl);\n-\telse\n-\t\tmsleep(1000);\n+\tif (!pcie_wait_for_link(pdev, true))\n+\t\treturn -1;\n \n-\t/* wait 100ms before read pci conf, and try in 1s */\n-\tmsleep(100);\n \tfound = pci_bus_check_dev(ctrl->pcie->port->subordinate,\n \t\t\t\t\tPCI_DEVFN(0, 0));\n \n@@ -887,8 +871,6 @@ struct controller *pcie_init(struct pcie_device *dev)\n \n \t/* Check if Data Link Layer Link Active Reporting is implemented */\n \tpcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);\n-\tif (link_cap & PCI_EXP_LNKCAP_DLLLARC)\n-\t\tctrl->link_active_reporting = 1;\n \n \t/* Clear all remaining event bits in Slot Status register. */\n \tpcie_capability_write_word(pdev, PCI_EXP_SLTSTA,\ndiff --git a/drivers/pci/pci.c b/drivers/pci/pci.c\nindex f538873f495c..4b2daded8bcf 100644\n--- a/drivers/pci/pci.c\n+++ b/drivers/pci/pci.c\n@@ -4496,21 +4496,42 @@ bool pcie_wait_for_link(struct pci_dev *pdev, bool active)\n \tbool ret;\n \tu16 lnk_status;\n \n+\t/*\n+\t * Some controllers might not implement link active reporting. In this\n+\t * case, we wait for 1000 + 100 ms.\n+\t */\n+\tif (!pdev->link_active_reporting) {\n+\t\tmsleep(1100);\n+\t\treturn true;\n+\t}\n+\n+\t/*\n+\t * PCIe 4.0r1 6.6.1, a component must enter LTSSM Detect within 20ms,\n+\t * after which we should expect an link active if the reset was\n+\t * successful. If so, software must wait a minimum 100ms before sending\n+\t * configuration requests to devices downstream this port.\n+\t *\n+\t * If the link fails to activate, either the device was physically\n+\t * removed or the link is permanently failed.\n+\t */\n+\tif (active)\n+\t\tmsleep(20);\n \tfor (;;) {\n \t\tpcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);\n \t\tret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA);\n \t\tif (ret == active)\n-\t\t\treturn true;\n+\t\t\tbreak;\n \t\tif (timeout <= 0)\n \t\t\tbreak;\n \t\tmsleep(10);\n \t\ttimeout -= 10;\n \t}\n-\n-\tpci_info(pdev, \"Data Link Layer Link Active not %s in 1000 msec\\n\",\n-\t\t active ? \"set\" : \"cleared\");\n-\n-\treturn false;\n+\tif (active && ret)\n+\t\tmsleep(100);\n+\telse if (ret != active)\n+\t\tpci_info(pdev, \"Data Link Layer Link Active not %s in 1000 msec\\n\",\n+\t\t\tactive ? \"set\" : \"cleared\");\n+\treturn ret == active;\n }\n \n void pci_reset_secondary_bus(struct pci_dev *dev)\ndiff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c\nindex 1ed07db8ea7d..cfc6463c28cc 100644\n--- a/drivers/pci/pcie/dpc.c\n+++ b/drivers/pci/pcie/dpc.c\n@@ -93,10 +93,12 @@ static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)\n \tpci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,\n \t\t\t PCI_EXP_DPC_STATUS_TRIGGER);\n \n+\tif (!pcie_wait_for_link(pdev, true))\n+\t\treturn PCI_ERS_RESULT_DISCONNECT;\n+\n \treturn PCI_ERS_RESULT_RECOVERED;\n }\n \n-\n static void dpc_process_rp_pio_error(struct dpc_dev *dpc)\n {\n \tstruct device *dev = &dpc->dev->device;\ndiff --git a/drivers/pci/probe.c b/drivers/pci/probe.c\nindex 7c422ccbf9b4..ea2a6289e513 100644\n--- a/drivers/pci/probe.c\n+++ b/drivers/pci/probe.c\n@@ -713,6 +713,7 @@ static void pci_set_bus_speed(struct pci_bus *bus)\n \n \t\tpcie_capability_read_dword(bridge, PCI_EXP_LNKCAP, &linkcap);\n \t\tbus->max_bus_speed = pcie_link_speed[linkcap & PCI_EXP_LNKCAP_SLS];\n+\t\tbridge->link_active_reporting = !!(linkcap & PCI_EXP_LNKCAP_DLLLARC);\n \n \t\tpcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta);\n \t\tpcie_update_link_speed(bus, linksta);\ndiff --git a/include/linux/pci.h b/include/linux/pci.h\nindex 6925828f9f25..896b42032ec5 100644\n--- a/include/linux/pci.h\n+++ b/include/linux/pci.h\n@@ -402,6 +402,7 @@ struct pci_dev {\n \tunsigned int\thas_secondary_link:1;\n \tunsigned int\tnon_compliant_bars:1;\t/* Broken BARs; ignore them */\n \tunsigned int\tis_probed:1;\t\t/* Device probing in progress */\n+\tunsigned int\tlink_active_reporting:1;/* Device capable of reporting link active */\n \tpci_dev_flags_t dev_flags;\n \tatomic_t\tenable_cnt;\t/* pci_enable_device has been called */\n \n", "prefixes": [ "PATCHv3", "10/10" ] }