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GET /api/patches/971351/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 971351,
    "url": "http://patchwork.ozlabs.org/api/patches/971351/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20180918235702.26573-5-keith.busch@intel.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20180918235702.26573-5-keith.busch@intel.com>",
    "list_archive_url": null,
    "date": "2018-09-18T23:56:56",
    "name": "[PATCHv3,04/10] PCI/ERR: Use slot reset if available",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "f7abc081ec51df654696db065fb7216a16010d24",
    "submitter": {
        "id": 19950,
        "url": "http://patchwork.ozlabs.org/api/people/19950/?format=api",
        "name": "Keith Busch",
        "email": "keith.busch@intel.com"
    },
    "delegate": {
        "id": 6763,
        "url": "http://patchwork.ozlabs.org/api/users/6763/?format=api",
        "username": "bhelgaas",
        "first_name": "Bjorn",
        "last_name": "Helgaas",
        "email": "bhelgaas@google.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20180918235702.26573-5-keith.busch@intel.com/mbox/",
    "series": [
        {
            "id": 66288,
            "url": "http://patchwork.ozlabs.org/api/series/66288/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=66288",
            "date": "2018-09-18T23:56:52",
            "name": "PCI error handling",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/66288/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/971351/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/971351/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-pci-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": [
            "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
            "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com"
        ],
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 42FKck2HnYz9sCR\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 19 Sep 2018 09:55:34 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1730673AbeISFac (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 19 Sep 2018 01:30:32 -0400",
            "from mga02.intel.com ([134.134.136.20]:47633 \"EHLO mga02.intel.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1730670AbeISFac (ORCPT <rfc822;linux-pci@vger.kernel.org>);\n\tWed, 19 Sep 2018 01:30:32 -0400",
            "from orsmga008.jf.intel.com ([10.7.209.65])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t18 Sep 2018 16:55:31 -0700",
            "from unknown (HELO localhost.lm.intel.com) ([10.232.112.44])\n\tby orsmga008.jf.intel.com with ESMTP; 18 Sep 2018 16:55:30 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.53,391,1531810800\"; d=\"scan'208\";a=\"74357523\"",
        "From": "Keith Busch <keith.busch@intel.com>",
        "To": "Linux PCI <linux-pci@vger.kernel.org>,\n\tBjorn Helgaas <bhelgaas@google.com>",
        "Cc": "Benjamin Herrenschmidt <benh@kernel.crashing.org>,\n\tSinan Kaya <okaya@kernel.org>,\n\tThomas Tai <thomas.tai@oracle.com>, poza@codeaurora.org,\n\tLukas Wunner <lukas@wunner.de>, Christoph Hellwig <hch@lst.de>,\n\tMika Westerberg <mika.westerberg@linux.intel.com>,\n\tKeith Busch <keith.busch@intel.com>",
        "Subject": "[PATCHv3 04/10] PCI/ERR: Use slot reset if available",
        "Date": "Tue, 18 Sep 2018 17:56:56 -0600",
        "Message-Id": "<20180918235702.26573-5-keith.busch@intel.com>",
        "X-Mailer": "git-send-email 2.13.6",
        "In-Reply-To": "<20180918235702.26573-1-keith.busch@intel.com>",
        "References": "<20180918235702.26573-1-keith.busch@intel.com>",
        "Sender": "linux-pci-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-pci.vger.kernel.org>",
        "X-Mailing-List": "linux-pci@vger.kernel.org"
    },
    "content": "The secondary bus reset may have link side effects that a hot plug\ncapable port may incorrectly react to. This patch will use the slot\nspecific reset for hotplug ports, fixing the undesirable link down-up\nhandling during error recovering.\n\nSigned-off-by: Keith Busch <keith.busch@intel.com>\n---\n drivers/pci/pci.c      | 33 +++++++++++++++++++++++++++++++++\n drivers/pci/pci.h      |  2 ++\n drivers/pci/pcie/aer.c |  2 +-\n drivers/pci/pcie/err.c |  2 +-\n drivers/pci/slot.c     |  2 +-\n 5 files changed, 38 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c\nindex 70fbab06db40..f538873f495c 100644\n--- a/drivers/pci/pci.c\n+++ b/drivers/pci/pci.c\n@@ -5164,6 +5164,39 @@ static int pci_bus_reset(struct pci_bus *bus, int probe)\n \treturn ret;\n }\n \n+/**\n+ * pci_bus_error_reset - reset the bridge's subordinate bus\n+ * @bridge: The parent device that connects to the bus to reset\n+ *\n+ * This function will first try to reset the slots on this bus if the method is\n+ * available. If slot reset fails or is not available, this will fall back to a\n+ * secondary bus reset.\n+ */\n+int pci_bus_error_reset(struct pci_dev *bridge)\n+{\n+\tstruct pci_bus *bus = bridge->subordinate;\n+\n+\tif (!bus)\n+\t\treturn -ENOTTY;\n+\n+\tmutex_lock(&pci_slot_mutex);\n+\tif (!list_empty(&bus->slots)) {\n+\t\tstruct pci_slot *slot;\n+\n+\t\tlist_for_each_entry(slot, &bus->slots, list)\n+\t\t\tif (pci_probe_reset_slot(slot))\n+\t\t\t\tgoto bus_reset;\n+\t\tlist_for_each_entry(slot, &bus->slots, list)\n+\t\t\tif (pci_slot_reset(slot, 0))\n+\t\t\t\tgoto bus_reset;\n+\t}\n+\tmutex_unlock(&pci_slot_mutex);\n+\treturn 0;\n+bus_reset:\n+\tmutex_unlock(&pci_slot_mutex);\n+\treturn pci_bus_reset(bridge->subordinate, 0);\n+}\n+\n /**\n  * pci_probe_reset_bus - probe whether a PCI bus can be reset\n  * @bus: PCI bus to probe\ndiff --git a/drivers/pci/pci.h b/drivers/pci/pci.h\nindex 6e0d1528d471..21bfa30db18d 100644\n--- a/drivers/pci/pci.h\n+++ b/drivers/pci/pci.h\n@@ -35,6 +35,7 @@ int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,\n \n int pci_probe_reset_function(struct pci_dev *dev);\n int pci_bridge_secondary_bus_reset(struct pci_dev *dev);\n+int pci_bus_error_reset(struct pci_dev *dev);\n \n /**\n  * struct pci_platform_pm_ops - Firmware PM callbacks\n@@ -136,6 +137,7 @@ static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }\n \n /* Lock for read/write access to pci device and bus lists */\n extern struct rw_semaphore pci_bus_sem;\n+extern struct mutex pci_slot_mutex;\n \n extern raw_spinlock_t pci_lock;\n \ndiff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c\nindex 35a0194e5b96..b4d14acee66d 100644\n--- a/drivers/pci/pcie/aer.c\n+++ b/drivers/pci/pcie/aer.c\n@@ -1527,7 +1527,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)\n \treg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;\n \tpci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);\n \n-\trc = pci_bridge_secondary_bus_reset(dev);\n+\trc = pci_bus_error_reset(dev);\n \tpci_printk(KERN_DEBUG, dev, \"Root Port link has been reset\\n\");\n \n \t/* Clear Root Error Status */\ndiff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c\nindex cac406b6e936..62ab665f0f03 100644\n--- a/drivers/pci/pcie/err.c\n+++ b/drivers/pci/pcie/err.c\n@@ -177,7 +177,7 @@ static pci_ers_result_t default_reset_link(struct pci_dev *dev)\n {\n \tint rc;\n \n-\trc = pci_bridge_secondary_bus_reset(dev);\n+\trc = pci_bus_error_reset(dev);\n \tpci_printk(KERN_DEBUG, dev, \"downstream link has been reset\\n\");\n \treturn rc ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;\n }\ndiff --git a/drivers/pci/slot.c b/drivers/pci/slot.c\nindex e634229ece89..193c909bdd45 100644\n--- a/drivers/pci/slot.c\n+++ b/drivers/pci/slot.c\n@@ -14,7 +14,7 @@\n \n struct kset *pci_slots_kset;\n EXPORT_SYMBOL_GPL(pci_slots_kset);\n-static DEFINE_MUTEX(pci_slot_mutex);\n+DEFINE_MUTEX(pci_slot_mutex);\n \n static ssize_t pci_slot_attr_show(struct kobject *kobj,\n \t\t\t\t\tstruct attribute *attr, char *buf)\n",
    "prefixes": [
        "PATCHv3",
        "04/10"
    ]
}