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GET /api/patches/955994/?format=api
{ "id": 955994, "url": "http://patchwork.ozlabs.org/api/patches/955994/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-47-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180810060711.6547-47-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2018-08-10T06:07:04", "name": "[U-Boot,v2,46/53] net: sun8i_emac: Retrieve GMAC clock via 'syscon' phandle", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "8671429373252a70db8cfff0c124eb991b3832be", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 17739, "url": "http://patchwork.ozlabs.org/api/users/17739/?format=api", "username": "jagan", "first_name": "Jagannadha Sutradharudu", "last_name": "Teki", "email": "jagannadh.teki@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-47-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 60190, "url": "http://patchwork.ozlabs.org/api/series/60190/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=60190", "date": "2018-08-10T06:06:18", "name": "clk: Add Allwinner CLK, RESET support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/60190/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/955994/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/955994/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"qTaFQwD+\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 41mwR54jhyz9s7Q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 10 Aug 2018 16:37:37 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 5CED2C21C51; Fri, 10 Aug 2018 06:29:16 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 99BDAC21F1A;\n\tFri, 10 Aug 2018 06:18:57 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 9FA6EC21F1A; Fri, 10 Aug 2018 06:10:52 +0000 (UTC)", "from mail-pf1-f194.google.com (mail-pf1-f194.google.com\n\t[209.85.210.194])\n\tby lists.denx.de (Postfix) with ESMTPS id A9BF6C21E4E\n\tfor <u-boot@lists.denx.de>; Fri, 10 Aug 2018 06:10:36 +0000 (UTC)", "by mail-pf1-f194.google.com with SMTP id b11-v6so4020521pfo.3\n\tfor <u-boot@lists.denx.de>; Thu, 09 Aug 2018 23:10:36 -0700 (PDT)", "from localhost.localdomain ([183.82.228.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tr23-v6sm16880975pfj.5.2018.08.09.23.10.31\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 09 Aug 2018 23:10:34 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=AzA+KPyCfsb236ptY53TzSYK+N5KgDT7QWZcTgnKb0o=;\n\tb=qTaFQwD+PQ32ww5M6XnTk/3cWQpJuVu2ctx4yzbBavz7U5kOK/m720ecx79Hy2BBt6\n\tegK5HtGjzcIGYmCxT1r+4IoeyT/aLIzdAGuCeHumsoRvH1KmgvyzjgFvwtBanoVRP16X\n\t5PtAmDdJnh5bHG4xZoi1FPfKP1fPBitH61RGM=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=AzA+KPyCfsb236ptY53TzSYK+N5KgDT7QWZcTgnKb0o=;\n\tb=Nfn1vF33/R7uEnRODIEj5nMXZ/0WPC9BBuHELg7Rh3nBhgUUrIgZmyyFbmUYNw2saK\n\tGwqw5gGbCUcGZPXWnO/nZzfJZwKutOL0h5Tee9/cypYwa5GT4z3FeM6j+kFhiNzJHKQ+\n\tH/O0skIFN9UxKan56dgS+SnAJ9aJpRA2jKeR9wIT87NaM8WOj4FHQkIR8ADAVvo70OCH\n\t1xHp+XeXjRFIaKiyUDT4qngwgVfQgW044ZR2krzEPwByb14qcIjfYuLaaBX0SfQC/Ytl\n\tlVVKXvMK8DNDPo7pVDr5019eb3R6Z0yQ4wYTcRRtAtMC+v+AoY2EV/pHfnlwYCbGipDe\n\twjEg==", "X-Gm-Message-State": "AOUpUlE0tFD3C9V/4VQ76rpr/NChyU4VhR8D1+SzMjVbU8SSrWpDOsQi\n\tB5tEc9bpP5/G47G2wKQRLaAIlg==", "X-Google-Smtp-Source": "AA+uWPyj7tYKZxmQ9ulZPZ+1Gli/afO11ZNyeS29eqEb7VO54w0yBWznN8AnN4BaV5XJHYWU3wsYSQ==", "X-Received": "by 2002:a63:6743:: with SMTP id\n\tb64-v6mr4968582pgc.91.1533881435291; \n\tThu, 09 Aug 2018 23:10:35 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Maxime Ripard <maxime.ripard@bootlin.com>,\n\tAndre Przywara <andre.przywara@arm.com>, Chen-Yu Tsai <wens@csie.org>,\n\tIcenowy Zheng <icenowy@aosc.io>", "Date": "Fri, 10 Aug 2018 11:37:04 +0530", "Message-Id": "<20180810060711.6547-47-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "References": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "Tom Rini <trini@konsulko.com>, u-boot@lists.denx.de,\n\tJoe Hershberger <joe.hershberger@ni.com>", "Subject": "[U-Boot] [PATCH v2 46/53] net: sun8i_emac: Retrieve GMAC clock via\n\t'syscon' phandle", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Unlike other Allwinner SoC's R40 GMAC clock control register\nis locate in CCU, but rest located via syscon itself. Since\nthe phandle property for current code look for 'syscon' and\nit will grab the respective ccu or syscon base address based\non DT property defined in respective SoC dtsi.\n\nSo, use the existing 'syscon' code even for R40 for retrieving\nGMAC clock via CCU and update the register directly in\nsun8i_emac_set_syscon instead of writing it separately using\nccm base.\n\nCc: Joe Hershberger <joe.hershberger@ni.com>\nCc: Lothar Felten <lothar.felten@gmail.com>\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/net/sun8i_emac.c | 55 ++++++++++++++++++++--------------------\n 1 file changed, 27 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c\nindex 3ba3a1ff8b..5ee4c2f993 100644\n--- a/drivers/net/sun8i_emac.c\n+++ b/drivers/net/sun8i_emac.c\n@@ -278,10 +278,18 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)\n \tint ret;\n \tu32 reg;\n \n-\treg = readl(priv->sysctl_reg + 0x30);\n+\tif (priv->variant == R40_GMAC) {\n+\t\t/* Select RGMII for R40 */\n+\t\treg = readl(priv->sysctl_reg + 0x164);\n+\t\treg |= CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |\n+\t\t CCM_GMAC_CTRL_GPIT_RGMII |\n+\t\t CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY);\n \n-\tif (priv->variant == R40_GMAC)\n+\t\twritel(reg, priv->sysctl_reg + 0x164);\n \t\treturn 0;\n+\t}\n+\n+\treg = readl(priv->sysctl_reg + 0x30);\n \n \tif (priv->variant == H3_EMAC) {\n \t\tret = sun8i_emac_set_syscon_ephy(priv, ®);\n@@ -647,13 +655,6 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)\n \n \t\t/* De-assert EMAC */\n \t\tsetbits_le32(&ccm->ahb_gate1, BIT(AHB_GATE_OFFSET_GMAC));\n-\n-\t\t/* Select RGMII for R40 */\n-\t\tsetbits_le32(&ccm->gmac_clk_cfg,\n-\t\t\t CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |\n-\t\t\t CCM_GMAC_CTRL_GPIT_RGMII);\n-\t\tsetbits_le32(&ccm->gmac_clk_cfg,\n-\t\t\t CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY));\n \t} else {\n \t\t/* Set clock gating for emac */\n \t\tsetbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));\n@@ -834,25 +835,23 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)\n \t\treturn -EINVAL;\n \t}\n \n-\tif (priv->variant != R40_GMAC) {\n-\t\toffset = fdtdec_lookup_phandle(gd->fdt_blob, node, \"syscon\");\n-\t\tif (offset < 0) {\n-\t\t\tdebug(\"%s: cannot find syscon node\\n\", __func__);\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\t\treg = fdt_getprop(gd->fdt_blob, offset, \"reg\", NULL);\n-\t\tif (!reg) {\n-\t\t\tdebug(\"%s: cannot find reg property in syscon node\\n\",\n-\t\t\t __func__);\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\t\tpriv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,\n-\t\t\t\t\t\t\t offset, reg);\n-\t\tif (priv->sysctl_reg == FDT_ADDR_T_NONE) {\n-\t\t\tdebug(\"%s: Cannot find syscon base address\\n\",\n-\t\t\t __func__);\n-\t\t\treturn -EINVAL;\n-\t\t}\n+\toffset = fdtdec_lookup_phandle(gd->fdt_blob, node, \"syscon\");\n+\tif (offset < 0) {\n+\t\tdebug(\"%s: cannot find syscon node\\n\", __func__);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treg = fdt_getprop(gd->fdt_blob, offset, \"reg\", NULL);\n+\tif (!reg) {\n+\t\tdebug(\"%s: cannot find reg property in syscon node\\n\",\n+\t\t __func__);\n+\t\treturn -EINVAL;\n+\t}\n+\tpriv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,\n+\t\t\t\t\t\t offset, reg);\n+\tif (priv->sysctl_reg == FDT_ADDR_T_NONE) {\n+\t\tdebug(\"%s: Cannot find syscon base address\\n\", __func__);\n+\t\treturn -EINVAL;\n \t}\n \n \tpdata->phy_interface = -1;\n", "prefixes": [ "U-Boot", "v2", "46/53" ] }