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GET /api/patches/955979/?format=api
{ "id": 955979, "url": "http://patchwork.ozlabs.org/api/patches/955979/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-44-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180810060711.6547-44-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2018-08-10T06:07:01", "name": "[U-Boot,v2,43/53] clk: sunxi: Implement Ethernet clocks", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "4d56b58ac33a61c5058058f78be92a663849f84a", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 17739, "url": "http://patchwork.ozlabs.org/api/users/17739/?format=api", "username": "jagan", "first_name": "Jagannadha Sutradharudu", "last_name": "Teki", "email": "jagannadh.teki@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-44-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 60190, "url": "http://patchwork.ozlabs.org/api/series/60190/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=60190", "date": "2018-08-10T06:06:18", "name": "clk: Add Allwinner CLK, RESET support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/60190/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/955979/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/955979/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"QXtkbvcm\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 41mwKJ0Sd2z9s8f\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 10 Aug 2018 16:32:35 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid BC11CC21E18; Fri, 10 Aug 2018 06:23:38 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id BAF8FC21E16;\n\tFri, 10 Aug 2018 06:13:24 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s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=6F6M163vWa4jxqFXPc7mBs5QB3mH4Dk4YeoW7Wj60Cc=;\n\tb=Hbkr5Rt0wUPRaqFQX0fqBYrVH6ibdNw7fy1+nPT3LaZMbiu+asb+wXgWKSY40M6vJx\n\tqyopUzBJWqKCZMglgI3HT57cU9zr54LTQ/+FKHtndDnO1GeiB40FQ5kaPsz28hjlAyOA\n\t7/8zRRJBRJkrYCfkfP1eAHpqr2C3kuu/hwvEomAFmFF+56wqStGMot5gsmyLpchJCX5o\n\tbwYWxzvTN/6HXhxGmRGxdrMLIj0XrBjszrm+1PT2xqYeHpJyc7SgfcmGHh/+U9+0HfT4\n\tbJR/ABHYc+sUd5UMIItmTXuGZt+nta0SVEQkTTlXX+lQmGQDy4hxZs0EqRo/WBoOETgx\n\tcvmw==", "X-Gm-Message-State": "AOUpUlFb4AS34P9GB82N/MKCT19PiAOl5nS6fhDt1Q0HDlxhvA4XiIV2\n\tEHjZaII3SOUEu8DsIH9tkEf2yQ==", "X-Google-Smtp-Source": "AA+uWPw7ThYMPcG54kz2H85fYPZPsEKJSqW5TjydnnD3h52J2x4UdBj92IrC7/MVS/n1efTbbyhFww==", "X-Received": "by 2002:a17:902:8486:: with SMTP id\n\tc6-v6mr4876399plo.105.1533881422580; \n\tThu, 09 Aug 2018 23:10:22 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Maxime Ripard <maxime.ripard@bootlin.com>,\n\tAndre Przywara <andre.przywara@arm.com>, Chen-Yu Tsai <wens@csie.org>,\n\tIcenowy Zheng <icenowy@aosc.io>", "Date": "Fri, 10 Aug 2018 11:37:01 +0530", "Message-Id": "<20180810060711.6547-44-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "References": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "Joe Hershberger <joe.hershberger@ni.com>, Tom Rini <trini@konsulko.com>, \n\tu-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v2 43/53] clk: sunxi: Implement Ethernet clocks", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Implement Ethernet clocks for all Allwinner SoCs\nclock drivers via clock map descriptor table.\n\nCc: Joe Hershberger <joe.hershberger@ni.com>\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/clk/sunxi/clk_a10.c | 3 +++\n drivers/clk/sunxi/clk_a10s.c | 1 +\n drivers/clk/sunxi/clk_a31.c | 1 +\n drivers/clk/sunxi/clk_a64.c | 1 +\n drivers/clk/sunxi/clk_a83t.c | 1 +\n drivers/clk/sunxi/clk_h3.c | 1 +\n drivers/clk/sunxi/clk_r40.c | 2 ++\n 7 files changed, 10 insertions(+)", "diff": "diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c\nindex d145d37217..fc939a313d 100644\n--- a/drivers/clk/sunxi/clk_a10.c\n+++ b/drivers/clk/sunxi/clk_a10.c\n@@ -22,11 +22,14 @@ static struct ccu_clk_map a10_clks[] = {\n \t[CLK_AHB_MMC1]\t\t= { 0x060, BIT(9), NULL },\n \t[CLK_AHB_MMC2]\t\t= { 0x060, BIT(10), NULL },\n \t[CLK_AHB_MMC3]\t\t= { 0x060, BIT(11), NULL },\n+\t[CLK_AHB_EMAC]\t\t= { 0x060, BIT(17), NULL },\n \t[CLK_AHB_SPI0]\t\t= { 0x060, BIT(20), NULL },\n \t[CLK_AHB_SPI1]\t\t= { 0x060, BIT(21), NULL },\n \t[CLK_AHB_SPI2]\t\t= { 0x060, BIT(22), NULL },\n \t[CLK_AHB_SPI3]\t\t= { 0x060, BIT(23), NULL },\n \n+\t[CLK_AHB_GMAC]\t\t= { 0x064, BIT(17), NULL },\n+\n \t[CLK_APB1_UART0]\t= { 0x06c, BIT(16), NULL },\n \t[CLK_APB1_UART1]\t= { 0x06c, BIT(17), NULL },\n \t[CLK_APB1_UART2]\t= { 0x06c, BIT(18), NULL },\ndiff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c\nindex 5912043f19..6ce53dc27d 100644\n--- a/drivers/clk/sunxi/clk_a10s.c\n+++ b/drivers/clk/sunxi/clk_a10s.c\n@@ -19,6 +19,7 @@ static struct ccu_clk_map a10s_clks[] = {\n \t[CLK_AHB_MMC0]\t\t= { 0x060, BIT(8), NULL },\n \t[CLK_AHB_MMC1]\t\t= { 0x060, BIT(9), NULL },\n \t[CLK_AHB_MMC2]\t\t= { 0x060, BIT(10), NULL },\n+\t[CLK_AHB_EMAC]\t\t= { 0x060, BIT(17), NULL },\n \t[CLK_AHB_SPI0]\t\t= { 0x060, BIT(20), NULL },\n \t[CLK_AHB_SPI1]\t\t= { 0x060, BIT(21), NULL },\n \t[CLK_AHB_SPI2]\t\t= { 0x060, BIT(22), NULL },\ndiff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c\nindex 288979a18f..d7a6b2421f 100644\n--- a/drivers/clk/sunxi/clk_a31.c\n+++ b/drivers/clk/sunxi/clk_a31.c\n@@ -17,6 +17,7 @@ static struct ccu_clk_map a31_clks[] = {\n \t[CLK_AHB1_MMC1]\t\t= { 0x060, BIT(9), NULL },\n \t[CLK_AHB1_MMC2]\t\t= { 0x060, BIT(10), NULL },\n \t[CLK_AHB1_MMC3]\t\t= { 0x060, BIT(12), NULL },\n+\t[CLK_AHB1_EMAC]\t\t= { 0x060, BIT(17), NULL },\n \t[CLK_AHB1_SPI0]\t\t= { 0x060, BIT(20), NULL },\n \t[CLK_AHB1_SPI1]\t\t= { 0x060, BIT(21), NULL },\n \t[CLK_AHB1_SPI2]\t\t= { 0x060, BIT(22), NULL },\ndiff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c\nindex 344cfb59aa..546ddcffa2 100644\n--- a/drivers/clk/sunxi/clk_a64.c\n+++ b/drivers/clk/sunxi/clk_a64.c\n@@ -16,6 +16,7 @@ static struct ccu_clk_map a64_clks[] = {\n \t[CLK_BUS_MMC0]\t\t= { 0x060, BIT(8), NULL },\n \t[CLK_BUS_MMC1]\t\t= { 0x060, BIT(9), NULL },\n \t[CLK_BUS_MMC2]\t\t= { 0x060, BIT(10), NULL },\n+\t[CLK_BUS_EMAC]\t\t= { 0x060, BIT(17), NULL },\n \t[CLK_BUS_SPI0]\t\t= { 0x060, BIT(20), NULL },\n \t[CLK_BUS_SPI1]\t\t= { 0x060, BIT(21), NULL },\n \t[CLK_BUS_OTG]\t\t= { 0x060, BIT(23), NULL },\ndiff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c\nindex cf9455da97..593ce1ac1b 100644\n--- a/drivers/clk/sunxi/clk_a83t.c\n+++ b/drivers/clk/sunxi/clk_a83t.c\n@@ -16,6 +16,7 @@ static struct ccu_clk_map a83t_clks[] = {\n \t[CLK_BUS_MMC0]\t\t= { 0x060, BIT(8), NULL },\n \t[CLK_BUS_MMC1]\t\t= { 0x060, BIT(9), NULL },\n \t[CLK_BUS_MMC2]\t\t= { 0x060, BIT(10), NULL },\n+\t[CLK_BUS_EMAC]\t\t= { 0x060, BIT(17), NULL },\n \t[CLK_BUS_OTG]\t\t= { 0x060, BIT(24), NULL },\n \t[CLK_BUS_EHCI0]\t\t= { 0x060, BIT(26), NULL },\n \t[CLK_BUS_EHCI1]\t\t= { 0x060, BIT(27), NULL },\ndiff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c\nindex 15d933a6c5..ff9f294097 100644\n--- a/drivers/clk/sunxi/clk_h3.c\n+++ b/drivers/clk/sunxi/clk_h3.c\n@@ -16,6 +16,7 @@ static struct ccu_clk_map h3_clks[] = {\n \t[CLK_BUS_MMC0]\t\t= { 0x060, BIT(8), NULL },\n \t[CLK_BUS_MMC1]\t\t= { 0x060, BIT(9), NULL },\n \t[CLK_BUS_MMC2]\t\t= { 0x060, BIT(10), NULL },\n+\t[CLK_BUS_EMAC]\t\t= { 0x060, BIT(17), NULL },\n \t[CLK_BUS_SPI0]\t\t= { 0x060, BIT(20), NULL },\n \t[CLK_BUS_SPI1]\t\t= { 0x060, BIT(21), NULL },\n \t[CLK_BUS_OTG]\t\t= { 0x060, BIT(23), NULL },\ndiff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c\nindex ee699d26ee..e5bddc77ee 100644\n--- a/drivers/clk/sunxi/clk_r40.c\n+++ b/drivers/clk/sunxi/clk_r40.c\n@@ -25,6 +25,8 @@ static struct ccu_clk_map r40_clks[] = {\n \t[CLK_BUS_OHCI1]\t\t= { 0x060, BIT(30), NULL },\n \t[CLK_BUS_OHCI2]\t\t= { 0x060, BIT(31), NULL },\n \n+\t[CLK_BUS_GMAC]\t\t= { 0x064, BIT(17), NULL },\n+\n \t[CLK_BUS_UART0]\t\t= { 0x06c, BIT(16), NULL },\n \t[CLK_BUS_UART1]\t\t= { 0x06c, BIT(17), NULL },\n \t[CLK_BUS_UART2]\t\t= { 0x06c, BIT(18), NULL },\n", "prefixes": [ "U-Boot", "v2", "43/53" ] }