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GET /api/patches/955956/?format=api
{ "id": 955956, "url": "http://patchwork.ozlabs.org/api/patches/955956/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-16-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180810060711.6547-16-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2018-08-10T06:06:33", "name": "[U-Boot,v2,15/53] musb-new: sunxi: Use CLK and RESET support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "a49eea178c68e639e4076a70720a3906c9729528", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 17739, "url": "http://patchwork.ozlabs.org/api/users/17739/?format=api", "username": "jagan", "first_name": "Jagannadha Sutradharudu", "last_name": "Teki", "email": "jagannadh.teki@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-16-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 60190, "url": "http://patchwork.ozlabs.org/api/series/60190/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=60190", "date": "2018-08-10T06:06:18", "name": "clk: Add Allwinner CLK, RESET support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/60190/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/955956/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/955956/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"faaRkvN5\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 41mvzS1XpNz9s7Q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 10 Aug 2018 16:17:07 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid A9A3BC21EF1; Fri, 10 Aug 2018 06:15:42 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id B8FF1C21E56;\n\tFri, 10 Aug 2018 06:10:01 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid D3953C21E2F; Fri, 10 Aug 2018 06:08:39 +0000 (UTC)", "from mail-pl0-f67.google.com (mail-pl0-f67.google.com\n\t[209.85.160.67])\n\tby lists.denx.de (Postfix) with ESMTPS id E479EC21E16\n\tfor <u-boot@lists.denx.de>; Fri, 10 Aug 2018 06:08:34 +0000 (UTC)", "by mail-pl0-f67.google.com with SMTP id w19-v6so3590151ply.8\n\tfor <u-boot@lists.denx.de>; Thu, 09 Aug 2018 23:08:34 -0700 (PDT)", "from localhost.localdomain ([183.82.228.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tr23-v6sm16880975pfj.5.2018.08.09.23.08.29\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 09 Aug 2018 23:08:33 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=BVCFOji7gHqub8o/VdQ16BYMIMKk7AZtaDxPR2oBiXg=;\n\tb=faaRkvN5ZuIscFLvyzNv4gnHjwMkhj30HFm1kd3Q9+GXewQsehAn2FBV/CFY04zx2D\n\tbEXhhs6m3A1rTGXSl8jdDE43A/cRAgoyD6TvQm32wXqXU+U+fC8Hj29ZfJKT5hQTKV9G\n\taKSQt7ohoE7e4Z58K4IkaOtxNNLlE+aBpPfNY=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=BVCFOji7gHqub8o/VdQ16BYMIMKk7AZtaDxPR2oBiXg=;\n\tb=mrRmid237S4wWfx5erAscfbOSNOQTPgWfIkvrFwD+j65LRAYe1Pukogj9gDuo9QZkx\n\tTLopFVLe9wH7WAQndhDiYD0VhXFqqhq3UtH8JQlFAfVeDVen9wB1TFMEeHDXa+9695pW\n\tjjUrMBmGN2i7zRw+LgMPoY45AuBnMVhdVgSa++OyzbtztSiByTdR5JzYXGxSKiJgCDt6\n\t0VbBhB+fEEzvRm8U/HmyOHkC5TlGinxyUlCJWtNcwpGlwR4Bsy2AZ27jL+w1BgHrt/vn\n\tlvBtiPqAuweIKDrY+lR3a2a9HPDh/sgFpcs+H0vry1SoP7Kjp7hpAasP5PIfh/NR1ids\n\tA8ZA==", "X-Gm-Message-State": "AOUpUlEGEJUXicubaETZEn/3PzbQt+ogA0M1si/7edySKK3YyoBdBccN\n\t9jGqn+JUEDm2CMVsppOKH6oMUA==", "X-Google-Smtp-Source": "AA+uWPxW3p3m1XKRBsuqij4hy44AfGauCmJh5fgHpAZ8VyEqobiOlaqyz7QscNgR6kT0hMonSSoCSw==", "X-Received": "by 2002:a17:902:261:: with SMTP id\n\t88-v6mr4889937plc.331.1533881313540; \n\tThu, 09 Aug 2018 23:08:33 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Maxime Ripard <maxime.ripard@bootlin.com>,\n\tAndre Przywara <andre.przywara@arm.com>, Chen-Yu Tsai <wens@csie.org>,\n\tIcenowy Zheng <icenowy@aosc.io>", "Date": "Fri, 10 Aug 2018 11:36:33 +0530", "Message-Id": "<20180810060711.6547-16-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "References": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "Tom Rini <trini@konsulko.com>, u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v2 15/53] musb-new: sunxi: Use CLK and RESET support", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Now clock and reset drivers are available for respective\nSoC's so use clk and reset ops on musb driver.\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/usb/musb-new/sunxi.c | 82 +++++++++++++++++++++++-------------\n 1 file changed, 53 insertions(+), 29 deletions(-)", "diff": "diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c\nindex 9f71b84fd1..440be83f4e 100644\n--- a/drivers/usb/musb-new/sunxi.c\n+++ b/drivers/usb/musb-new/sunxi.c\n@@ -16,9 +16,11 @@\n * This file is part of the Inventra Controller Driver for Linux.\n */\n #include <common.h>\n+#include <clk.h>\n #include <dm.h>\n #include <generic-phy.h>\n #include <phy-sun4i-usb.h>\n+#include <reset.h>\n #include <asm/arch/cpu.h>\n #include <asm/arch/clock.h>\n #include <asm/arch/gpio.h>\n@@ -78,16 +80,15 @@\n \n struct sunxi_musb_config {\n \tstruct musb_hdrc_config *config;\n-\tu8 rst_bit;\n-\tu8 clkgate_bit;\n };\n \n struct sunxi_glue {\n \tstruct musb_host_data mdata;\n-\tstruct sunxi_ccm_reg *ccm;\n \tstruct sunxi_musb_config *cfg;\n \tstruct device dev;\n \tstruct phy phy;\n+\tstruct clk clocks;\n+\tstruct reset_ctl resets;\n };\n #define to_sunxi_glue(d)\tcontainer_of(d, struct sunxi_glue, dev)\n \n@@ -291,6 +292,18 @@ static int sunxi_musb_init(struct musb *musb)\n \n \tpr_debug(\"%s():\\n\", __func__);\n \n+\tret = clk_enable(&glue->clocks);\n+\tif (ret) {\n+\t\tdev_err(dev, \"failed to enable clock\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tret = reset_deassert(&glue->resets);\n+\tif (ret) {\n+\t\tdev_err(dev, \"failed to deassert reset\\n\");\n+\t\treturn ret;\n+\t}\n+\n \tret = generic_phy_init(&glue->phy);\n \tif (ret) {\n \t\tpr_err(\"failed to init USB PHY\\n\");\n@@ -299,17 +312,6 @@ static int sunxi_musb_init(struct musb *musb)\n \n \tmusb->isr = sunxi_musb_interrupt;\n \n-\tsetbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));\n-\tif (glue->cfg->clkgate_bit)\n-\t\tsetbits_le32(&glue->ccm->ahb_gate0,\n-\t\t\t BIT(glue->cfg->clkgate_bit));\n-#ifdef CONFIG_SUNXI_GEN_SUN6I\n-\tsetbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));\n-\tif (glue->cfg->rst_bit)\n-\t\tsetbits_le32(&glue->ccm->ahb_reset0_cfg,\n-\t\t\t BIT(glue->cfg->rst_bit));\n-#endif\n-\n \tUSBC_ConfigFIFO_Base();\n \tUSBC_EnableDpDmPullUp(musb->mregs);\n \tUSBC_EnableIdPullUp(musb->mregs);\n@@ -339,16 +341,17 @@ static int sunxi_musb_exit(struct musb *musb)\n \t\t}\n \t}\n \n-#ifdef CONFIG_SUNXI_GEN_SUN6I\n-\tclrbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));\n-\tif (glue->cfg->rst_bit)\n-\t\tclrbits_le32(&glue->ccm->ahb_reset0_cfg,\n-\t\t\t BIT(glue->cfg->rst_bit));\n-#endif\n-\tclrbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));\n-\tif (glue->cfg->clkgate_bit)\n-\t\tclrbits_le32(&glue->ccm->ahb_gate0,\n-\t\t\t BIT(glue->cfg->clkgate_bit));\n+\tret = reset_assert(&glue->resets);\n+\tif (ret) {\n+\t\tdev_err(dev, \"failed to deassert reset\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tret = clk_disable(&glue->clocks);\n+\tif (ret) {\n+\t\tdev_err(dev, \"failed to enable clock\\n\");\n+\t\treturn ret;\n+\t}\n \n \treturn 0;\n }\n@@ -433,6 +436,7 @@ static int musb_usb_probe(struct udevice *dev)\n \tstruct usb_bus_priv *priv = dev_get_uclass_priv(dev);\n \tstruct musb_hdrc_platform_data pdata;\n \tvoid *base = dev_read_addr_ptr(dev);\n+\tint clock_nb, reset_nb;\n \tint ret;\n \n \tif (!base)\n@@ -442,9 +446,31 @@ static int musb_usb_probe(struct udevice *dev)\n \tif (!glue->cfg)\n \t\treturn -EINVAL;\n \n-\tglue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;\n-\tif (IS_ERR(glue->ccm))\n-\t\treturn PTR_ERR(glue->ccm);\n+\tclock_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), \"clocks\",\n+\t\t\t\t\t\t \"#clock-cells\");\n+\tif (clock_nb < 0) {\n+\t\tdev_err(dev, \"failed to get clock phandle(%d)\\n\", clock_nb);\n+\t\treturn clock_nb;\n+\t}\n+\n+\tret = clk_get_by_index(dev, 0, &glue->clocks);\n+\tif (ret) {\n+\t\tdev_err(dev, \"failed to get clock 0\\n\");\n+\t\tclk_free(&glue->clocks);\n+\t}\n+\n+\treset_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), \"resets\",\n+\t\t\t\t\t\t \"#reset-cells\");\n+\tif (reset_nb < 0) {\n+\t\tdev_err(dev, \"failed to get reset phandle(%d)\\n\", clock_nb);\n+\t\treturn reset_nb;\n+\t}\n+\n+\tret = reset_get_by_index(dev, 0, &glue->resets);\n+\tif (ret) {\n+\t\tdev_err(dev, \"failed to get reset 0\\n\");\n+\t\treset_free(&glue->resets);\n+\t}\n \n \tret = generic_phy_get_by_name(dev, \"usb\", &glue->phy);\n \tif (ret) {\n@@ -499,8 +525,6 @@ static const struct sunxi_musb_config sun4i_a10_cfg = {\n \n static const struct sunxi_musb_config sun8i_h3_cfg = {\n \t.config = &musb_config_h3,\n-\t.rst_bit = 23,\n-\t.clkgate_bit = 23,\n };\n \n static const struct udevice_id sunxi_musb_ids[] = {\n", "prefixes": [ "U-Boot", "v2", "15/53" ] }