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GET /api/patches/955955/?format=api
{ "id": 955955, "url": "http://patchwork.ozlabs.org/api/patches/955955/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-7-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180810060711.6547-7-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2018-08-10T06:06:24", "name": "[U-Boot,v2,06/53] clk: sunxi: Add Allwinner A10/A20 CLK driver", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "bba576c282cdd61202b77e7fea6c54e508f0bbaa", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 17739, "url": "http://patchwork.ozlabs.org/api/users/17739/?format=api", "username": "jagan", "first_name": "Jagannadha Sutradharudu", "last_name": "Teki", "email": "jagannadh.teki@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-7-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 60190, "url": "http://patchwork.ozlabs.org/api/series/60190/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=60190", "date": "2018-08-10T06:06:18", "name": "clk: Add Allwinner CLK, RESET support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/60190/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/955955/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/955955/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"CvJoWglV\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 41mvz519X2z9s7Q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 10 Aug 2018 16:16:49 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid CE870C21EE3; Fri, 10 Aug 2018 06:11:21 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 67F6AC21E0B;\n\tFri, 10 Aug 2018 06:08:33 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 3F6FCC21D8A; Fri, 10 Aug 2018 06:08:08 +0000 (UTC)", "from mail-pl0-f68.google.com (mail-pl0-f68.google.com\n\t[209.85.160.68])\n\tby lists.denx.de (Postfix) with ESMTPS id E933CC21C50\n\tfor <u-boot@lists.denx.de>; Fri, 10 Aug 2018 06:08:01 +0000 (UTC)", "by mail-pl0-f68.google.com with SMTP id j8-v6so3585842pll.12\n\tfor <u-boot@lists.denx.de>; Thu, 09 Aug 2018 23:08:01 -0700 (PDT)", "from localhost.localdomain ([183.82.228.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tr23-v6sm16880975pfj.5.2018.08.09.23.07.57\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 09 Aug 2018 23:08:00 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=nZCmLp32o3TsTADnkpy7PWxeD0jPS9u7VB+m5/OgbnY=;\n\tb=CvJoWglVfqvRLzieei8RJ/Tx5Lp4VupZqpHcL4dYnWcxyNaJHyoIDytUJVuVuO+78T\n\tSizpP5BgdBzAWVSSDrkqoprWq25sIvFWVd21YqLpEJQ7TuTFGsgfkgQRuZmURr91hMza\n\t/1Hly83MMs7e3g8AnEfINZLrwW0bf1qeGIiUg=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=nZCmLp32o3TsTADnkpy7PWxeD0jPS9u7VB+m5/OgbnY=;\n\tb=QQ6SjK3Sy9KWnsJxvdwlt9tyStetlvHaeaxLn600vKknGlq80qwx77I+HWmhGYo0Nz\n\tPjzkHIF4r1GF5uIfqXRi5BtUbqIV3OVaJZfFfpQUuHJchNEZhsNi/zdRNGpCPpCfma/n\n\t+Z9wHddOfPOIae/kuxtTANJHEbQCCEb1l/nVXavxa9qtUM3ynvaZa0DxbYDki2UcEAML\n\tLBek0WTHTXLdo59xAkkTgh6ffxka7srluZyllurs5x3/aOhMspGyIZY/OdksNEU/36zv\n\tkFDEj4mQZvUQxk00dQLS8t5cPAgm0Ch+hvrffB4jIP+l4vQo6f/LJe/hG05xnn+/1Zzx\n\t8CuQ==", "X-Gm-Message-State": "AOUpUlEu9qLCN/xWlZp4ShP50NCi6/NSW4/9aU9JpBZSrSCNhhyw+CO+\n\twcygJLfCXiydjp6dQtK7r273ng==", "X-Google-Smtp-Source": "AA+uWPzSK/rpBZm4irIZRdYVwmCjiC6yqLG1Hmy4UoeVfvmWtGKUtfPamfdeVxrB9NtwpScUWTPTLQ==", "X-Received": "by 2002:a17:902:583:: with SMTP id\n\tf3-v6mr4813625plf.115.1533881280546; \n\tThu, 09 Aug 2018 23:08:00 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Maxime Ripard <maxime.ripard@bootlin.com>,\n\tAndre Przywara <andre.przywara@arm.com>, Chen-Yu Tsai <wens@csie.org>,\n\tIcenowy Zheng <icenowy@aosc.io>", "Date": "Fri, 10 Aug 2018 11:36:24 +0530", "Message-Id": "<20180810060711.6547-7-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "References": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "Tom Rini <trini@konsulko.com>, u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v2 06/53] clk: sunxi: Add Allwinner A10/A20 CLK\n\tdriver", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Add initial clock driver for Allwinner A10/A20.\n\n- Implement USB ahb and USB clocks via ccu_clk_map descriptor\n for A10/A20, so it can accessed in common clk enable and disable\n functions from clk_sunxi.c\n- Implement USB resets via ccu_reset_map descriptor for A10/A20,\n so it can accessed in common reset deassert and assert functions\n from reset-sunxi.c\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/clk/sunxi/Kconfig | 7 ++++\n drivers/clk/sunxi/Makefile | 1 +\n drivers/clk/sunxi/clk_a10.c | 77 +++++++++++++++++++++++++++++++++++++\n 3 files changed, 85 insertions(+)\n create mode 100644 drivers/clk/sunxi/clk_a10.c", "diff": "diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig\nindex c3713bbac2..fbbf94ef55 100644\n--- a/drivers/clk/sunxi/Kconfig\n+++ b/drivers/clk/sunxi/Kconfig\n@@ -9,6 +9,13 @@ config CLK_SUNXI\n \n if CLK_SUNXI\n \n+config CLK_SUN4I_A10\n+\tbool \"Clock driver for Allwinner A10/A20\"\n+\tdefault MACH_SUN4I || MACH_SUN7I\n+\thelp\n+\t This enables common clock driver support for platforms based\n+\t on Allwinner A10/A20 SoC.\n+\n config CLK_SUN8I_H3\n \tbool \"Clock driver for Allwinner H3/H5\"\n \tdefault MACH_SUNXI_H3_H5\ndiff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile\nindex dec49f27a1..bba830922f 100644\n--- a/drivers/clk/sunxi/Makefile\n+++ b/drivers/clk/sunxi/Makefile\n@@ -6,5 +6,6 @@\n \n obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o\n \n+obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o\n obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o\n obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o\ndiff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c\nnew file mode 100644\nindex 0000000000..7492e1367a\n--- /dev/null\n+++ b/drivers/clk/sunxi/clk_a10.c\n@@ -0,0 +1,77 @@\n+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)\n+/*\n+ * Copyright (C) 2018 Amarula Solutions.\n+ * Author: Jagan Teki <jagan@amarulasolutions.com>\n+ */\n+\n+#include <common.h>\n+#include <clk-uclass.h>\n+#include <dm.h>\n+#include <errno.h>\n+#include <asm/arch/ccu.h>\n+#include <dt-bindings/clock/sun4i-a10-ccu.h>\n+#include <dt-bindings/reset/sun4i-a10-ccu.h>\n+\n+static struct ccu_clk_map a10_clks[] = {\n+\t[CLK_AHB_OTG]\t\t= { 0x060, BIT(0), NULL },\n+\t[CLK_AHB_EHCI0]\t\t= { 0x060, BIT(1), NULL },\n+\t[CLK_AHB_OHCI0]\t\t= { 0x060, BIT(2), NULL },\n+\t[CLK_AHB_EHCI1]\t\t= { 0x060, BIT(3), NULL },\n+\t[CLK_AHB_OHCI1]\t\t= { 0x060, BIT(4), NULL },\n+\n+\t[CLK_USB_OHCI0]\t\t= { 0x0cc, BIT(6), NULL },\n+\t[CLK_USB_OHCI1]\t\t= { 0x0cc, BIT(7), NULL },\n+\t[CLK_USB_PHY]\t\t= { 0x0cc, BIT(8), NULL },\n+};\n+\n+static struct ccu_reset_map a10_resets[] = {\n+\t[RST_USB_PHY0]\t\t= { 0x0cc, BIT(0) },\n+\t[RST_USB_PHY1]\t\t= { 0x0cc, BIT(1) },\n+\t[RST_USB_PHY2]\t\t= { 0x0cc, BIT(2) },\n+};\n+\n+static const struct ccu_desc sun4i_a10_ccu_desc = {\n+\t.clks = a10_clks,\n+\t.num_clks = ARRAY_SIZE(a10_clks),\n+\n+\t.resets = a10_resets,\n+\t.num_resets = ARRAY_SIZE(a10_resets),\n+};\n+\n+static int a10_clk_probe(struct udevice *dev)\n+{\n+\tstruct sunxi_clk_priv *priv = dev_get_priv(dev);\n+\n+\tpriv->base = dev_read_addr_ptr(dev);\n+\tif (!priv->base)\n+\t\treturn -ENOMEM;\n+\n+\tpriv->desc = (const struct ccu_desc *)dev_get_driver_data(dev);\n+\tif (!priv->desc)\n+\t\treturn -EINVAL;\n+\n+\treturn 0;\n+}\n+\n+static int a10_clk_bind(struct udevice *dev)\n+{\n+\treturn sunxi_reset_bind(dev, 22);\n+}\n+\n+static const struct udevice_id a10_clk_ids[] = {\n+\t{ .compatible = \"allwinner,sun4i-a10-ccu\",\n+ .data = (ulong)&sun4i_a10_ccu_desc },\n+\t{ .compatible = \"allwinner,sun7i-a20-ccu\",\n+ .data = (ulong)&sun4i_a10_ccu_desc },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(clk_sun4i_a10) = {\n+\t.name\t\t= \"sun4i_a10_ccu\",\n+\t.id\t\t= UCLASS_CLK,\n+\t.of_match\t= a10_clk_ids,\n+\t.priv_auto_alloc_size\t= sizeof(struct sunxi_clk_priv),\n+\t.ops\t\t= &sunxi_clk_ops,\n+\t.probe\t\t= a10_clk_probe,\n+\t.bind\t\t= a10_clk_bind,\n+};\n", "prefixes": [ "U-Boot", "v2", "06/53" ] }