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GET /api/patches/955951/?format=api
{ "id": 955951, "url": "http://patchwork.ozlabs.org/api/patches/955951/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-22-jagan@amarulasolutions.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180810060711.6547-22-jagan@amarulasolutions.com>", "list_archive_url": null, "date": "2018-08-10T06:06:39", "name": "[U-Boot,v2,21/53] clk: sunxi: Implement AHB bus MMC resets", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "7c535b2ed0b05bd04b332fff9fa7b4bb545b71ae", "submitter": { "id": 69820, "url": "http://patchwork.ozlabs.org/api/people/69820/?format=api", "name": "Jagan Teki", "email": "jagan@amarulasolutions.com" }, "delegate": { "id": 17739, "url": "http://patchwork.ozlabs.org/api/users/17739/?format=api", "username": "jagan", "first_name": "Jagannadha Sutradharudu", "last_name": "Teki", "email": "jagannadh.teki@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20180810060711.6547-22-jagan@amarulasolutions.com/mbox/", "series": [ { "id": 60190, "url": "http://patchwork.ozlabs.org/api/series/60190/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=60190", "date": "2018-08-10T06:06:18", "name": "clk: Add Allwinner CLK, RESET support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/60190/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/955951/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/955951/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=amarulasolutions.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=amarulasolutions.com\n\theader.i=@amarulasolutions.com header.b=\"oHgwJRLC\"; \n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 41mvwr6q3qz9s7Q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 10 Aug 2018 16:14:52 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid A4369C21EBD; Fri, 10 Aug 2018 06:13:55 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 77A6BC21E49;\n\tFri, 10 Aug 2018 06:09:58 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 76B31C21D8E; Fri, 10 Aug 2018 06:09:03 +0000 (UTC)", "from mail-pf1-f196.google.com (mail-pf1-f196.google.com\n\t[209.85.210.196])\n\tby lists.denx.de (Postfix) with ESMTPS id 33DC3C21C27\n\tfor <u-boot@lists.denx.de>; Fri, 10 Aug 2018 06:08:59 +0000 (UTC)", "by mail-pf1-f196.google.com with SMTP id j26-v6so4004210pfi.10\n\tfor <u-boot@lists.denx.de>; Thu, 09 Aug 2018 23:08:59 -0700 (PDT)", "from localhost.localdomain ([183.82.228.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tr23-v6sm16880975pfj.5.2018.08.09.23.08.53\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 09 Aug 2018 23:08:57 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amarulasolutions.com; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=0mmC8aHZkR73BJRdg16wU0WTbx1sb+ZP6DrLFKfuw6Q=;\n\tb=oHgwJRLC3PVwLsh4Z0bKUaT6AtJeWHVfWrIri1fMVad8FHyN1Qc4pxk9qqUkE/BOi8\n\tfiAPIacfwavbxJt0RKBycLc6C6DL2TtFhqB722FXGhDjxLtb6bSJhmIAD2NpoWzAf0dx\n\tJpW0EqNeR7XxqHdz1pRnPeQRXymB63DqcnmIM=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=0mmC8aHZkR73BJRdg16wU0WTbx1sb+ZP6DrLFKfuw6Q=;\n\tb=bUclhKDkSaePdYsVHUobvTO7WbCv6z87PytvLT/f7c0zajotqZo6qHSmEFNq8pCeEK\n\t7pTjBh3dd48+prz88DmA/lGeNNwHZlZb7EQLBgBlhdVYT9h4QNZypsWS36U32tv7xb++\n\t24mlmI/Ggoa81pNBxrCPkW2x/6F2wxueyK/q3MWxa40Ej2H75oRjDdX5gm41A2iPeZki\n\tD60BLFUYsMjSgg5rVux4OeH5vpg7c7KpgGmaZXCem9g2NjrUhDBt0j+4ck0oTNE+BYKl\n\tZAt9c2OqP7o96ZWAnLvTN1wPdxl6BQW6W0O+XxCoElCNWPyn5vckITcGTskAZOTZafWs\n\t81Gg==", "X-Gm-Message-State": "AOUpUlEfHjxn8QhzZUz1hAlt5ZatgpfKVb4r2YKtW95i1o6U6m46W+NT\n\tIBfEz3ceyOnpIPnH2pfB5bhYuQ==", "X-Google-Smtp-Source": "AA+uWPwfNwbk9WzdyvCb26SNz4CUISLRjWZ+58sZmL1NYF+7JwkzLwRyIuk2vBtrt2JUSxdybUNIkw==", "X-Received": "by 2002:a62:6104:: with SMTP id\n\tv4-v6mr5609464pfb.122.1533881337751; \n\tThu, 09 Aug 2018 23:08:57 -0700 (PDT)", "From": "Jagan Teki <jagan@amarulasolutions.com>", "To": "Maxime Ripard <maxime.ripard@bootlin.com>,\n\tAndre Przywara <andre.przywara@arm.com>, Chen-Yu Tsai <wens@csie.org>,\n\tIcenowy Zheng <icenowy@aosc.io>", "Date": "Fri, 10 Aug 2018 11:36:39 +0530", "Message-Id": "<20180810060711.6547-22-jagan@amarulasolutions.com>", "X-Mailer": "git-send-email 2.18.0.321.gffc6fa0e3", "In-Reply-To": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "References": "<20180810060711.6547-1-jagan@amarulasolutions.com>", "MIME-Version": "1.0", "Cc": "Tom Rini <trini@konsulko.com>, u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v2 21/53] clk: sunxi: Implement AHB bus MMC resets", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Implement AHB bus MMC resets for all Allwinner SoC\nclock drivers via reset map descriptor table.\n\nCc: Jaehoon Chung <jh80.chung@samsung.com>\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n drivers/clk/sunxi/clk_a23.c | 3 +++\n drivers/clk/sunxi/clk_a31.c | 4 ++++\n drivers/clk/sunxi/clk_a64.c | 3 +++\n drivers/clk/sunxi/clk_a83t.c | 3 +++\n drivers/clk/sunxi/clk_h3.c | 3 +++\n drivers/clk/sunxi/clk_r40.c | 4 ++++\n drivers/clk/sunxi/clk_v3s.c | 3 +++\n 7 files changed, 23 insertions(+)", "diff": "diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c\nindex 0b5406c5b3..183c6275f3 100644\n--- a/drivers/clk/sunxi/clk_a23.c\n+++ b/drivers/clk/sunxi/clk_a23.c\n@@ -38,6 +38,9 @@ static struct ccu_reset_map a23_resets[] = {\n \t[RST_USB_PHY1]\t\t= { 0x0cc, BIT(1) },\n \t[RST_USB_HSIC]\t\t= { 0x0cc, BIT(2) },\n \n+\t[RST_BUS_MMC0]\t\t= { 0x2c0, BIT(8) },\n+\t[RST_BUS_MMC1]\t\t= { 0x2c0, BIT(9) },\n+\t[RST_BUS_MMC2]\t\t= { 0x2c0, BIT(10) },\n \t[RST_BUS_OTG]\t\t= { 0x2c0, BIT(24) },\n \t[RST_BUS_EHCI]\t\t= { 0x2c0, BIT(26) },\n \t[RST_BUS_OHCI]\t\t= { 0x2c0, BIT(29) },\ndiff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c\nindex 3c807bde77..15076d0e72 100644\n--- a/drivers/clk/sunxi/clk_a31.c\n+++ b/drivers/clk/sunxi/clk_a31.c\n@@ -42,6 +42,10 @@ static struct ccu_reset_map a31_resets[] = {\n \t[RST_USB_PHY1]\t\t= { 0x0cc, BIT(1) },\n \t[RST_USB_PHY2]\t\t= { 0x0cc, BIT(2) },\n \n+\t[RST_AHB1_MMC0]\t\t= { 0x2c0, BIT(8) },\n+\t[RST_AHB1_MMC1]\t\t= { 0x2c0, BIT(9) },\n+\t[RST_AHB1_MMC2]\t\t= { 0x2c0, BIT(10) },\n+\t[RST_AHB1_MMC3]\t\t= { 0x2c0, BIT(11) },\n \t[RST_AHB1_OTG]\t\t= { 0x2c0, BIT(24) },\n \t[RST_AHB1_EHCI0]\t= { 0x2c0, BIT(26) },\n \t[RST_AHB1_EHCI1]\t= { 0x2c0, BIT(27) },\ndiff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c\nindex 62cd6d6464..9ef9b606d2 100644\n--- a/drivers/clk/sunxi/clk_a64.c\n+++ b/drivers/clk/sunxi/clk_a64.c\n@@ -39,6 +39,9 @@ static struct ccu_reset_map a64_resets[] = {\n \t[RST_USB_PHY1]\t\t= { 0x0cc, BIT(1) },\n \t[RST_USB_HSIC]\t\t= { 0x0cc, BIT(2) },\n \n+\t[RST_BUS_MMC0]\t\t= { 0x2c0, BIT(8) },\n+\t[RST_BUS_MMC1]\t\t= { 0x2c0, BIT(9) },\n+\t[RST_BUS_MMC2]\t\t= { 0x2c0, BIT(10) },\n \t[RST_BUS_OTG]\t\t= { 0x2c0, BIT(23) },\n \t[RST_BUS_EHCI0]\t\t= { 0x2c0, BIT(24) },\n \t[RST_BUS_EHCI1]\t\t= { 0x2c0, BIT(25) },\ndiff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c\nindex a2e0ac7a26..47b7672e7f 100644\n--- a/drivers/clk/sunxi/clk_a83t.c\n+++ b/drivers/clk/sunxi/clk_a83t.c\n@@ -37,6 +37,9 @@ static struct ccu_reset_map a83t_resets[] = {\n \t[RST_USB_PHY1]\t\t= { 0x0cc, BIT(1) },\n \t[RST_USB_HSIC]\t\t= { 0x0cc, BIT(2) },\n \n+\t[RST_BUS_MMC0]\t\t= { 0x2c0, BIT(8) },\n+\t[RST_BUS_MMC1]\t\t= { 0x2c0, BIT(9) },\n+\t[RST_BUS_MMC2]\t\t= { 0x2c0, BIT(10) },\n \t[RST_BUS_OTG]\t\t= { 0x2c0, BIT(24) },\n \t[RST_BUS_EHCI0]\t\t= { 0x2c0, BIT(26) },\n \t[RST_BUS_EHCI1]\t\t= { 0x2c0, BIT(27) },\ndiff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c\nindex f467187c01..ad15aaae67 100644\n--- a/drivers/clk/sunxi/clk_h3.c\n+++ b/drivers/clk/sunxi/clk_h3.c\n@@ -46,6 +46,9 @@ static struct ccu_reset_map h3_resets[] = {\n \t[RST_USB_PHY2]\t\t= { 0x0cc, BIT(2) },\n \t[RST_USB_PHY3]\t\t= { 0x0cc, BIT(3) },\n \n+\t[RST_BUS_MMC0]\t\t= { 0x2c0, BIT(8) },\n+\t[RST_BUS_MMC1]\t\t= { 0x2c0, BIT(9) },\n+\t[RST_BUS_MMC2]\t\t= { 0x2c0, BIT(10) },\n \t[RST_BUS_OTG]\t\t= { 0x2c0, BIT(23) },\n \t[RST_BUS_EHCI0]\t\t= { 0x2c0, BIT(24) },\n \t[RST_BUS_EHCI1]\t\t= { 0x2c0, BIT(25) },\ndiff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c\nindex 9273f3b7ea..24c26ad3be 100644\n--- a/drivers/clk/sunxi/clk_r40.c\n+++ b/drivers/clk/sunxi/clk_r40.c\n@@ -43,6 +43,10 @@ static struct ccu_reset_map r40_resets[] = {\n \t[RST_USB_PHY1]\t\t= { 0x0cc, BIT(1) },\n \t[RST_USB_PHY2]\t\t= { 0x0cc, BIT(2) },\n \n+\t[RST_BUS_MMC0]\t\t= { 0x2c0, BIT(8) },\n+\t[RST_BUS_MMC1]\t\t= { 0x2c0, BIT(9) },\n+\t[RST_BUS_MMC2]\t\t= { 0x2c0, BIT(10) },\n+\t[RST_BUS_MMC3]\t\t= { 0x2c0, BIT(11) },\n \t[RST_BUS_OTG]\t\t= { 0x2c0, BIT(25) },\n \t[RST_BUS_EHCI0]\t\t= { 0x2c0, BIT(26) },\n \t[RST_BUS_EHCI1]\t\t= { 0x2c0, BIT(27) },\ndiff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c\nindex e0d757debe..6eeec201a2 100644\n--- a/drivers/clk/sunxi/clk_v3s.c\n+++ b/drivers/clk/sunxi/clk_v3s.c\n@@ -28,6 +28,9 @@ static struct ccu_clk_map v3s_clks[] = {\n static struct ccu_reset_map v3s_resets[] = {\n \t[RST_USB_PHY0]\t\t= { 0x0cc, BIT(0) },\n \n+\t[RST_BUS_MMC0]\t\t= { 0x2c0, BIT(8) },\n+\t[RST_BUS_MMC1]\t\t= { 0x2c0, BIT(9) },\n+\t[RST_BUS_MMC2]\t\t= { 0x2c0, BIT(10) },\n \t[RST_BUS_OTG]\t\t= { 0x2c0, BIT(24) },\n };\n \n", "prefixes": [ "U-Boot", "v2", "21/53" ] }