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GET /api/patches/955603/?format=api
{ "id": 955603, "url": "http://patchwork.ozlabs.org/api/patches/955603/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20180809132958.23036-2-anirudh.venkataramanan@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180809132958.23036-2-anirudh.venkataramanan@intel.com>", "list_archive_url": null, "date": "2018-08-09T13:29:44", "name": "[v3,01/15] ice: Rework flex descriptor programming", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "5862a0ab3f6a45beb2de66d3548563b851c333bd", "submitter": { "id": 73601, "url": "http://patchwork.ozlabs.org/api/people/73601/?format=api", "name": "Anirudh Venkataramanan", "email": "anirudh.venkataramanan@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20180809132958.23036-2-anirudh.venkataramanan@intel.com/mbox/", "series": [ { "id": 60078, "url": "http://patchwork.ozlabs.org/api/series/60078/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=60078", "date": "2018-08-09T13:29:43", "name": "Feature updates for ice", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/60078/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/955603/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/955603/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.133; helo=hemlock.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 41mTdm6js0z9s89\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 9 Aug 2018 23:30:20 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 0CE2188351;\n\tThu, 9 Aug 2018 13:30:19 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 9JhXncgixHqn; Thu, 9 Aug 2018 13:30:17 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 131C78836B;\n\tThu, 9 Aug 2018 13:30:17 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 8F53E1C3F93\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 9 Aug 2018 13:30:14 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 8C7F529350\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 9 Aug 2018 13:30:14 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id m5J8MYxO4a-q for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 9 Aug 2018 13:30:13 +0000 (UTC)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby silver.osuosl.org (Postfix) with ESMTPS id BCFF1220E2\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 9 Aug 2018 13:30:13 +0000 (UTC)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t09 Aug 2018 06:30:13 -0700", "from kyungmin-mobl.amr.corp.intel.com (HELO\n\tavenkata-mobl4.localdomain) ([10.254.101.153])\n\tby fmsmga006.fm.intel.com with ESMTP; 09 Aug 2018 06:30:05 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.53,215,1531810800\"; d=\"scan'208\";a=\"253368068\"", "From": "Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 9 Aug 2018 06:29:44 -0700", "Message-Id": "<20180809132958.23036-2-anirudh.venkataramanan@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20180809132958.23036-1-anirudh.venkataramanan@intel.com>", "References": "<20180809132958.23036-1-anirudh.venkataramanan@intel.com>", "Subject": "[Intel-wired-lan] [PATCH v3 01/15] ice: Rework flex descriptor\n\tprogramming", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "The driver can support two flex descriptor profiles, ICE_RXDID_FLEX_NIC\nand ICE_RXDID_FLEX_NIC_2. This patch reworks the current flex programming\nlogic to add support for the latter profile.\n\nSigned-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_common.c | 102 ++++++++++++++----\n .../net/ethernet/intel/ice/ice_lan_tx_rx.h | 24 +++--\n 2 files changed, 92 insertions(+), 34 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c\nindex 661beea6af79..53cbfd942d03 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.c\n+++ b/drivers/net/ethernet/intel/ice/ice_common.c\n@@ -7,16 +7,16 @@\n \n #define ICE_PF_RESET_WAIT_COUNT\t200\n \n-#define ICE_NIC_FLX_ENTRY(hw, mdid, idx) \\\n-\twr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(ICE_RXDID_FLEX_NIC), \\\n+#define ICE_PROG_FLEX_ENTRY(hw, rxdid, mdid, idx) \\\n+\twr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \\\n \t ((ICE_RX_OPC_MDID << \\\n \t GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \\\n \t GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \\\n \t (((mdid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \\\n \t GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M))\n \n-#define ICE_NIC_FLX_FLG_ENTRY(hw, flg_0, flg_1, flg_2, flg_3, idx) \\\n-\twr32((hw), GLFLXP_RXDID_FLAGS(ICE_RXDID_FLEX_NIC, idx), \\\n+#define ICE_PROG_FLG_ENTRY(hw, rxdid, flg_0, flg_1, flg_2, flg_3, idx) \\\n+\twr32((hw), GLFLXP_RXDID_FLAGS(rxdid, idx), \\\n \t (((flg_0) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) & \\\n \t GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) | \\\n \t (((flg_1) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S) & \\\n@@ -290,30 +290,85 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,\n }\n \n /**\n- * ice_init_flex_parser - initialize rx flex parser\n+ * ice_init_flex_flags\n * @hw: pointer to the hardware structure\n+ * @prof_id: Rx Descriptor Builder profile ID\n *\n- * Function to initialize flex descriptors\n+ * Function to initialize Rx flex flags\n */\n-static void ice_init_flex_parser(struct ice_hw *hw)\n+static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)\n {\n \tu8 idx = 0;\n \n-\tICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_HASH_LOW, 0);\n-\tICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_HASH_HIGH, 1);\n-\tICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_FLOW_ID_LOWER, 2);\n-\tICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_FLOW_ID_HIGH, 3);\n-\tICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_PKT_FRG, ICE_RXFLG_UDP_GRE,\n-\t\t\t ICE_RXFLG_PKT_DSI, ICE_RXFLG_FIN, idx++);\n-\tICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_SYN, ICE_RXFLG_RST,\n-\t\t\t ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);\n-\tICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI,\n-\t\t\t ICE_RXFLG_EVLAN_x8100, ICE_RXFLG_EVLAN_x9100,\n-\t\t\t idx++);\n-\tICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_VLAN_x8100, ICE_RXFLG_TNL_VLAN,\n-\t\t\t ICE_RXFLG_TNL_MAC, ICE_RXFLG_TNL0, idx++);\n-\tICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,\n-\t\t\t ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);\n+\t/* Flex-flag fields (0-2) are programmed with FLG64 bits with layout:\n+\t * flexiflags0[5:0] - TCP flags, is_packet_fragmented, is_packet_UDP_GRE\n+\t * flexiflags1[3:0] - Not used for flag programming\n+\t * flexiflags2[7:0] - Tunnel and VLAN types\n+\t * 2 invalid fields in last index\n+\t */\n+\tswitch (prof_id) {\n+\t/* Rx flex flags are currently programmed for the NIC profiles only.\n+\t * Different flag bit programming configurations can be added per\n+\t * profile as needed.\n+\t */\n+\tcase ICE_RXDID_FLEX_NIC:\n+\tcase ICE_RXDID_FLEX_NIC_2:\n+\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG,\n+\t\t\t\t ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI,\n+\t\t\t\t ICE_RXFLG_FIN, idx++);\n+\t\t/* flex flag 1 is not used for flexi-flag programming, skipping\n+\t\t * these four FLG64 bits.\n+\t\t */\n+\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST,\n+\t\t\t\t ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++);\n+\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI,\n+\t\t\t\t ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100,\n+\t\t\t\t ICE_RXFLG_EVLAN_x9100, idx++);\n+\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100,\n+\t\t\t\t ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC,\n+\t\t\t\t ICE_RXFLG_TNL0, idx++);\n+\t\tICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2,\n+\t\t\t\t ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx);\n+\t\tbreak;\n+\n+\tdefault:\n+\t\tice_debug(hw, ICE_DBG_INIT,\n+\t\t\t \"Flag programming for profile ID %d not supported\\n\",\n+\t\t\t prof_id);\n+\t}\n+}\n+\n+/**\n+ * ice_init_flex_flds\n+ * @hw: pointer to the hardware structure\n+ * @prof_id: Rx Descriptor Builder profile ID\n+ *\n+ * Function to initialize flex descriptors\n+ */\n+static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)\n+{\n+\tenum ice_flex_rx_mdid mdid;\n+\n+\tswitch (prof_id) {\n+\tcase ICE_RXDID_FLEX_NIC:\n+\tcase ICE_RXDID_FLEX_NIC_2:\n+\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0);\n+\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1);\n+\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2);\n+\n+\t\tmdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?\n+\t\t\tICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH;\n+\n+\t\tICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);\n+\n+\t\tice_init_flex_flags(hw, prof_id);\n+\t\tbreak;\n+\n+\tdefault:\n+\t\tice_debug(hw, ICE_DBG_INIT,\n+\t\t\t \"Field init for profile ID %d not supported\\n\",\n+\t\t\t prof_id);\n+\t}\n }\n \n /**\n@@ -494,7 +549,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \tif (status)\n \t\tgoto err_unroll_fltr_mgmt_struct;\n \n-\tice_init_flex_parser(hw);\n+\tice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);\n+\tice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);\n \n \treturn 0;\n \ndiff --git a/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h b/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h\nindex 068dbc740b76..94504023d86e 100644\n--- a/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h\n+++ b/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h\n@@ -188,23 +188,25 @@ struct ice_32b_rx_flex_desc_nic {\n * with a specific metadata (profile 7 reserved for HW)\n */\n enum ice_rxdid {\n-\tICE_RXDID_START\t\t\t= 0,\n-\tICE_RXDID_LEGACY_0\t\t= ICE_RXDID_START,\n-\tICE_RXDID_LEGACY_1,\n-\tICE_RXDID_FLX_START,\n-\tICE_RXDID_FLEX_NIC\t\t= ICE_RXDID_FLX_START,\n-\tICE_RXDID_FLX_LAST\t\t= 63,\n-\tICE_RXDID_LAST\t\t\t= ICE_RXDID_FLX_LAST\n+\tICE_RXDID_LEGACY_0\t\t= 0,\n+\tICE_RXDID_LEGACY_1\t\t= 1,\n+\tICE_RXDID_FLEX_NIC\t\t= 2,\n+\tICE_RXDID_FLEX_NIC_2\t\t= 6,\n+\tICE_RXDID_HW\t\t\t= 7,\n+\tICE_RXDID_LAST\t\t\t= 63,\n };\n \n /* Receive Flex Descriptor Rx opcode values */\n #define ICE_RX_OPC_MDID\t\t0x01\n \n /* Receive Descriptor MDID values */\n-#define ICE_RX_MDID_FLOW_ID_LOWER\t5\n-#define ICE_RX_MDID_FLOW_ID_HIGH\t6\n-#define ICE_RX_MDID_HASH_LOW\t\t56\n-#define ICE_RX_MDID_HASH_HIGH\t\t57\n+enum ice_flex_rx_mdid {\n+\tICE_RX_MDID_FLOW_ID_LOWER\t= 5,\n+\tICE_RX_MDID_FLOW_ID_HIGH,\n+\tICE_RX_MDID_SRC_VSI\t\t= 19,\n+\tICE_RX_MDID_HASH_LOW\t\t= 56,\n+\tICE_RX_MDID_HASH_HIGH,\n+};\n \n /* Rx Flag64 packet flag bits */\n enum ice_rx_flg64_bits {\n", "prefixes": [ "v3", "01/15" ] }