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GET /api/patches/954042/?format=api
{ "id": 954042, "url": "http://patchwork.ozlabs.org/api/patches/954042/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1533574847-19294-58-git-send-email-aleksandar.markovic@rt-rk.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1533574847-19294-58-git-send-email-aleksandar.markovic@rt-rk.com>", "list_archive_url": null, "date": "2018-08-06T17:00:24", "name": "[v7,57/80] mips_malta: Setup GT64120 BARs in nanoMIPS bootloader", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "19d4255d92ebd1db2c3e85badaa64c843bf5de73", "submitter": { "id": 68635, "url": "http://patchwork.ozlabs.org/api/people/68635/?format=api", "name": "Aleksandar Markovic", "email": "aleksandar.markovic@rt-rk.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1533574847-19294-58-git-send-email-aleksandar.markovic@rt-rk.com/mbox/", "series": [ { "id": 59520, "url": "http://patchwork.ozlabs.org/api/series/59520/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=59520", "date": "2018-08-06T16:59:27", "name": "Add nanoMIPS support to QEMU", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/59520/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/954042/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/954042/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=rt-rk.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 41klHZ0Clkz9ryt\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 7 Aug 2018 03:38:34 +1000 (AEST)", "from localhost ([::1]:35369 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1fmjSh-0001ah-My\n\tfor incoming@patchwork.ozlabs.org; Mon, 06 Aug 2018 13:38:31 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:41507)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <aleksandar.markovic@rt-rk.com>) id 1fmjGV-0007eA-Vg\n\tfor qemu-devel@nongnu.org; Mon, 06 Aug 2018 13:26:00 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <aleksandar.markovic@rt-rk.com>) id 1fmjGU-00028S-PC\n\tfor qemu-devel@nongnu.org; Mon, 06 Aug 2018 13:25:55 -0400", "from mx2.rt-rk.com ([89.216.37.149]:45624 helo=mail.rt-rk.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <aleksandar.markovic@rt-rk.com>)\n\tid 1fmjGU-00026l-Bz\n\tfor qemu-devel@nongnu.org; Mon, 06 Aug 2018 13:25:54 -0400", "from localhost (localhost [127.0.0.1])\n\tby mail.rt-rk.com (Postfix) with ESMTP id 0C9031A2135;\n\tMon, 6 Aug 2018 19:25:53 +0200 (CEST)", "from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local\n\t[10.10.13.43])\n\tby mail.rt-rk.com (Postfix) with ESMTPSA id DCB911A2036;\n\tMon, 6 Aug 2018 19:25:52 +0200 (CEST)" ], "X-Virus-Scanned": "amavisd-new at rt-rk.com", "From": "Aleksandar Markovic <aleksandar.markovic@rt-rk.com>", "To": "qemu-devel@nongnu.org", "Date": "Mon, 6 Aug 2018 19:00:24 +0200", "Message-Id": "<1533574847-19294-58-git-send-email-aleksandar.markovic@rt-rk.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1533574847-19294-1-git-send-email-aleksandar.markovic@rt-rk.com>", "References": "<1533574847-19294-1-git-send-email-aleksandar.markovic@rt-rk.com>", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 3.x [fuzzy]", "X-Received-From": "89.216.37.149", "Subject": "[Qemu-devel] [PATCH v7 57/80] mips_malta: Setup GT64120 BARs in\n\tnanoMIPS bootloader", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "peter.maydell@linaro.org, thuth@redhat.com, pburton@wavecomp.com,\n\tsmarkovic@wavecomp.com, riku.voipio@iki.fi,\n\trichard.henderson@linaro.org, laurent@vivier.eu,\n\tarmbru@redhat.com, arikalo@wavecomp.com,\n\tphilippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com,\n\tpjovanovic@wavecomp.com, aurelien@aurel32.net", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Paul Burton <pburton@wavecomp.com>\n\nSetup the GT64120 BARs in the nanoMIPS bootloader, in the same way that\nthey are setup in the MIPS32 bootloader. This is necessary for Linux to\nbe able to access peripherals, including the UART.\n\nSigned-off-by: Paul Burton <pburton@wavecomp.com>\nSigned-off-by: Yongbok Kim <yongbok.kim@mips.com>\nSigned-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>\nSigned-off-by: Stefan Markovic <smarkovic@wavecomp.com>\nReviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>\n---\n hw/mips/mips_malta.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 73 insertions(+)", "diff": "diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c\nindex 4bc9036..d1a7c1f 100644\n--- a/hw/mips/mips_malta.c\n+++ b/hw/mips/mips_malta.c\n@@ -664,6 +664,79 @@ static void write_bootloader_nanomips(uint8_t *base, int64_t run_addr,\n /* lui a3,%hi(loaderparams.ram_low_size) */\n stw_p(p++, 0x80e7); stw_p(p++, NM_LO(loaderparams.ram_low_size));\n /* ori a3,a3,%lo(loaderparams.ram_low_size) */\n+\n+ /* Load BAR registers as done by YAMON */\n+ stw_p(p++, 0xe040); stw_p(p++, 0x0681);\n+ /* lui t1, %hi(0xb4000000) */\n+#ifdef TARGET_WORDS_BIGENDIAN\n+ stw_p(p++, 0xe020); stw_p(p++, 0x0be1);\n+ /* lui t0, %hi(0xdf000000) */\n+#else\n+ stw_p(p++, 0x0020); stw_p(p++, 0x00df);\n+ /* addiu[32] t0, $0, 0xdf */\n+#endif\n+ stw_p(p++, 0x8422); stw_p(p++, 0x9068);\n+ /* sw t0, 0x68(t1) */\n+\n+ stw_p(p++, 0xe040); stw_p(p++, 0x077d);\n+ /* lui t1, %hi(0xbbe00000) */\n+#ifdef TARGET_WORDS_BIGENDIAN\n+ stw_p(p++, 0xe020); stw_p(p++, 0x0801);\n+ /* lui t0, %hi(0xc0000000) */\n+#else\n+ stw_p(p++, 0x0020); stw_p(p++, 0x00c0);\n+ /* addiu[32] t0, $0, 0xc0 */\n+#endif\n+ stw_p(p++, 0x8422); stw_p(p++, 0x9048);\n+ /* sw t0, 0x48(t1) */\n+#ifdef TARGET_WORDS_BIGENDIAN\n+ stw_p(p++, 0xe020); stw_p(p++, 0x0800);\n+ /* lui t0, %hi(0x40000000) */\n+#else\n+ stw_p(p++, 0x0020); stw_p(p++, 0x0040);\n+ /* addiu[32] t0, $0, 0x40 */\n+#endif\n+ stw_p(p++, 0x8422); stw_p(p++, 0x9050);\n+ /* sw t0, 0x50(t1) */\n+\n+#ifdef TARGET_WORDS_BIGENDIAN\n+ stw_p(p++, 0xe020); stw_p(p++, 0x0001);\n+ /* lui t0, %hi(0x80000000) */\n+#else\n+ stw_p(p++, 0x0020); stw_p(p++, 0x0080);\n+ /* addiu[32] t0, $0, 0x80 */\n+#endif\n+ stw_p(p++, 0x8422); stw_p(p++, 0x9058);\n+ /* sw t0, 0x58(t1) */\n+#ifdef TARGET_WORDS_BIGENDIAN\n+ stw_p(p++, 0xe020); stw_p(p++, 0x07e0);\n+ /* lui t0, %hi(0x3f000000) */\n+#else\n+ stw_p(p++, 0x0020); stw_p(p++, 0x003f);\n+ /* addiu[32] t0, $0, 0x3f */\n+#endif\n+ stw_p(p++, 0x8422); stw_p(p++, 0x9060);\n+ /* sw t0, 0x60(t1) */\n+\n+#ifdef TARGET_WORDS_BIGENDIAN\n+ stw_p(p++, 0xe020); stw_p(p++, 0x0821);\n+ /* lui t0, %hi(0xc1000000) */\n+#else\n+ stw_p(p++, 0x0020); stw_p(p++, 0x00c1);\n+ /* addiu[32] t0, $0, 0xc1 */\n+#endif\n+ stw_p(p++, 0x8422); stw_p(p++, 0x9080);\n+ /* sw t0, 0x80(t1) */\n+#ifdef TARGET_WORDS_BIGENDIAN\n+ stw_p(p++, 0xe020); stw_p(p++, 0x0bc0);\n+ /* lui t0, %hi(0x5e000000) */\n+#else\n+ stw_p(p++, 0x0020); stw_p(p++, 0x005e);\n+ /* addiu[32] t0, $0, 0x5e */\n+#endif\n+ stw_p(p++, 0x8422); stw_p(p++, 0x9088);\n+ /* sw t0, 0x88(t1) */\n+\n stw_p(p++, 0xe320 | NM_HI1(kernel_entry));\n stw_p(p++, NM_HI2(kernel_entry));\n /* lui t9,%hi(kernel_entry) */\n", "prefixes": [ "v7", "57/80" ] }