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GET /api/patches/954023/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 954023,
    "url": "http://patchwork.ozlabs.org/api/patches/954023/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1533574847-19294-29-git-send-email-aleksandar.markovic@rt-rk.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1533574847-19294-29-git-send-email-aleksandar.markovic@rt-rk.com>",
    "list_archive_url": null,
    "date": "2018-08-06T16:59:55",
    "name": "[v7,28/80] target/mips: Add emulation of nanoMIPS 48-bit instructions",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "fbf2ca5627575b1a98b6eb91d4ba1259868cf8df",
    "submitter": {
        "id": 68635,
        "url": "http://patchwork.ozlabs.org/api/people/68635/?format=api",
        "name": "Aleksandar Markovic",
        "email": "aleksandar.markovic@rt-rk.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1533574847-19294-29-git-send-email-aleksandar.markovic@rt-rk.com/mbox/",
    "series": [
        {
            "id": 59520,
            "url": "http://patchwork.ozlabs.org/api/series/59520/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=59520",
            "date": "2018-08-06T16:59:27",
            "name": "Add nanoMIPS support to QEMU",
            "version": 7,
            "mbox": "http://patchwork.ozlabs.org/series/59520/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/954023/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/954023/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": [
            "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)",
            "ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=rt-rk.com"
        ],
        "Received": [
            "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 41kkxl4L9cz9s0R\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue,  7 Aug 2018 03:23:07 +1000 (AEST)",
            "from localhost ([::1]:35278 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1fmjDl-0003sb-51\n\tfor incoming@patchwork.ozlabs.org; Mon, 06 Aug 2018 13:23:05 -0400",
            "from eggs.gnu.org ([2001:4830:134:3::10]:57951)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <aleksandar.markovic@rt-rk.com>) id 1fmj2n-0002hC-Qe\n\tfor qemu-devel@nongnu.org; Mon, 06 Aug 2018 13:11:47 -0400",
            "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <aleksandar.markovic@rt-rk.com>) id 1fmj2m-00046K-TY\n\tfor qemu-devel@nongnu.org; Mon, 06 Aug 2018 13:11:45 -0400",
            "from mx2.rt-rk.com ([89.216.37.149]:47636 helo=mail.rt-rk.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <aleksandar.markovic@rt-rk.com>)\n\tid 1fmj2m-00045f-HR\n\tfor qemu-devel@nongnu.org; Mon, 06 Aug 2018 13:11:44 -0400",
            "from localhost (localhost [127.0.0.1])\n\tby mail.rt-rk.com (Postfix) with ESMTP id 3C7881A209A;\n\tMon,  6 Aug 2018 19:11:43 +0200 (CEST)",
            "from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local\n\t[10.10.13.43])\n\tby mail.rt-rk.com (Postfix) with ESMTPSA id 1961F1A2036;\n\tMon,  6 Aug 2018 19:11:43 +0200 (CEST)"
        ],
        "X-Virus-Scanned": "amavisd-new at rt-rk.com",
        "From": "Aleksandar Markovic <aleksandar.markovic@rt-rk.com>",
        "To": "qemu-devel@nongnu.org",
        "Date": "Mon,  6 Aug 2018 18:59:55 +0200",
        "Message-Id": "<1533574847-19294-29-git-send-email-aleksandar.markovic@rt-rk.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1533574847-19294-1-git-send-email-aleksandar.markovic@rt-rk.com>",
        "References": "<1533574847-19294-1-git-send-email-aleksandar.markovic@rt-rk.com>",
        "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 3.x [fuzzy]",
        "X-Received-From": "89.216.37.149",
        "Subject": "[Qemu-devel] [PATCH v7 28/80] target/mips: Add emulation of\n\tnanoMIPS 48-bit instructions",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.21",
        "Precedence": "list",
        "List-Id": "<qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>",
        "List-Post": "<mailto:qemu-devel@nongnu.org>",
        "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>",
        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Cc": "peter.maydell@linaro.org, thuth@redhat.com, pburton@wavecomp.com,\n\tsmarkovic@wavecomp.com, riku.voipio@iki.fi,\n\trichard.henderson@linaro.org, laurent@vivier.eu,\n\tarmbru@redhat.com, arikalo@wavecomp.com,\n\tphilippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com,\n\tpjovanovic@wavecomp.com, aurelien@aurel32.net",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"
    },
    "content": "From: Yongbok Kim <yongbok.kim@mips.com>\n\nAdd emulation of LI48, ADDIU48, ADDIUGP48, ADDIUPC48, LWPC48, and\nSWPC48 instructions.\n\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nReviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>\nSigned-off-by: Yongbok Kim <yongbok.kim@mips.com>\nSigned-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>\nSigned-off-by: Stefan Markovic <smarkovic@wavecomp.com>\n---\n target/mips/translate.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 65 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/target/mips/translate.c b/target/mips/translate.c\nindex 46066b1..845b988 100644\n--- a/target/mips/translate.c\n+++ b/target/mips/translate.c\n@@ -16756,7 +16756,71 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)\n         }\n         break;\n     case NM_P48I:\n-        return 6;\n+        {\n+            insn = cpu_lduw_code(env, ctx->base.pc_next + 4);\n+            target_long addr_off = extract32(ctx->opcode, 0, 16) | insn << 16;\n+            switch (extract32(ctx->opcode, 16, 5)) {\n+            case NM_LI48:\n+                if (rt != 0) {\n+                    tcg_gen_movi_tl(cpu_gpr[rt], addr_off);\n+                }\n+                break;\n+            case NM_ADDIU48:\n+                if (rt != 0) {\n+                    tcg_gen_addi_tl(cpu_gpr[rt], cpu_gpr[rt], addr_off);\n+                    tcg_gen_ext32s_tl(cpu_gpr[rt], cpu_gpr[rt]);\n+                }\n+                break;\n+            case NM_ADDIUGP48:\n+                if (rt != 0) {\n+                    gen_op_addr_addi(ctx, cpu_gpr[rt], cpu_gpr[28], addr_off);\n+                }\n+                break;\n+            case NM_ADDIUPC48:\n+                if (rt != 0) {\n+                    target_long addr = addr_add(ctx, ctx->base.pc_next + 6,\n+                                                addr_off);\n+\n+                    tcg_gen_movi_tl(cpu_gpr[rt], addr);\n+                }\n+                break;\n+            case NM_LWPC48:\n+                if (rt != 0) {\n+                    TCGv t0;\n+                    t0 = tcg_temp_new();\n+\n+                    target_long addr = addr_add(ctx, ctx->base.pc_next + 6,\n+                                                addr_off);\n+\n+                    tcg_gen_movi_tl(t0, addr);\n+                    tcg_gen_qemu_ld_tl(cpu_gpr[rt], t0, ctx->mem_idx, MO_TESL);\n+                    tcg_temp_free(t0);\n+                }\n+                break;\n+            case NM_SWPC48:\n+                {\n+                    TCGv t0, t1;\n+                    t0 = tcg_temp_new();\n+                    t1 = tcg_temp_new();\n+\n+                    target_long addr = addr_add(ctx, ctx->base.pc_next + 6,\n+                                                addr_off);\n+\n+                    tcg_gen_movi_tl(t0, addr);\n+                    gen_load_gpr(t1, rt);\n+\n+                    tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEUL);\n+\n+                    tcg_temp_free(t0);\n+                    tcg_temp_free(t1);\n+                }\n+                break;\n+            default:\n+                generate_exception_end(ctx, EXCP_RI);\n+                break;\n+            }\n+            return 6;\n+        }\n     case NM_P_U12:\n         switch (extract32(ctx->opcode, 12, 4)) {\n         case NM_ORI:\n",
    "prefixes": [
        "v7",
        "28/80"
    ]
}