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GET /api/patches/908224/?format=api
{ "id": 908224, "url": "http://patchwork.ozlabs.org/api/patches/908224/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/152537763602.62474.15659483976051204438.stgit@bhelgaas-glaptop.roam.corp.google.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<152537763602.62474.15659483976051204438.stgit@bhelgaas-glaptop.roam.corp.google.com>", "list_archive_url": null, "date": "2018-05-03T20:00:36", "name": "[v6,4/5] ixgbe: Report PCIe link properties with pcie_print_link_status()", "commit_ref": null, "pull_url": null, "state": "awaiting-upstream", "archived": false, "hash": "2973271d471be9f67ea4476b010bceab55749d1a", "submitter": { "id": 67298, "url": "http://patchwork.ozlabs.org/api/people/67298/?format=api", "name": "Bjorn Helgaas", "email": "helgaas@kernel.org" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/152537763602.62474.15659483976051204438.stgit@bhelgaas-glaptop.roam.corp.google.com/mbox/", "series": [ { "id": 42437, "url": "http://patchwork.ozlabs.org/api/series/42437/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=42437", "date": "2018-05-03T20:00:07", "name": "PCI: Improve PCIe link status reporting", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/42437/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/908224/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/908224/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.137; helo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=kernel.org", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=kernel.org header.i=@kernel.org\n\theader.b=\"1se8pP3H\"; dkim-atps=neutral" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 40cQxS22jBz9s4r\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 4 May 2018 06:00:43 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 2A50C87A37;\n\tThu, 3 May 2018 20:00:42 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id RFYB_2pICDRX; Thu, 3 May 2018 20:00:39 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id AC40087A28;\n\tThu, 3 May 2018 20:00:39 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 9BB181CEF86\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 3 May 2018 20:00:38 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 97DA789D5F\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 3 May 2018 20:00:38 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id NEZC2Ltkgelx for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 3 May 2018 20:00:38 +0000 (UTC)", "from mail.kernel.org (mail.kernel.org [198.145.29.99])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 2CC8589CD9\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 3 May 2018 20:00:38 +0000 (UTC)", "from localhost (unknown [69.71.5.252])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 92C122176D;\n\tThu, 3 May 2018 20:00:37 +0000 (UTC)" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=default; t=1525377638;\n\tbh=qBVMNACNhTkJajFGgLbb49GA1jxO76CFZaLYSbH8qY4=;\n\th=Subject:From:To:Cc:Date:In-Reply-To:References:From;\n\tb=1se8pP3Hvu1t1gjPg6ToJxTpKaImey3q6spR+583N3fgMxDu5jIeH8GJ0VAGsbDpc\n\t0CV3CthM3k0cB98Moni0mifayHmUzG4/eG4fkZ9fCkk3vQvggPLXFJ0bOtYeEeQdKC\n\t2296zfT1650wEy29CknRQTc7siMbhJiJGKDY/n3M=", "From": "Bjorn Helgaas <helgaas@kernel.org>", "To": "Jeff Kirsher <jeffrey.t.kirsher@intel.com>,\n\tGanesh Goudar <ganeshgr@chelsio.com>,\n\tMichael Chan <michael.chan@broadcom.com>, \n\tAriel Elior <ariel.elior@cavium.com>", "Date": "Thu, 03 May 2018 15:00:36 -0500", "Message-ID": "<152537763602.62474.15659483976051204438.stgit@bhelgaas-glaptop.roam.corp.google.com>", "In-Reply-To": "<152537719056.62474.2571390812509425478.stgit@bhelgaas-glaptop.roam.corp.google.com>", "References": "<152537719056.62474.2571390812509425478.stgit@bhelgaas-glaptop.roam.corp.google.com>", "User-Agent": "StGit/0.18", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH v6 4/5] ixgbe: Report PCIe link properties\n\twith pcie_print_link_status()", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "Jakub Kicinski <kubakici@wp.pl>, linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, Tal Gilboa <talgi@mellanox.com>,\n\tintel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,\n\teverest-linux-l2@cavium.com, Tariq Toukan <tariqt@mellanox.com>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Bjorn Helgaas <bhelgaas@google.com>\n\nPreviously the driver used pcie_get_minimum_link() to warn when the NIC\nis in a slot that can't supply as much bandwidth as the NIC could use.\n\npcie_get_minimum_link() can be misleading because it finds the slowest link\nand the narrowest link (which may be different links) without considering\nthe total bandwidth of each link. For a path with a 16 GT/s x1 link and a\n2.5 GT/s x16 link, it returns 2.5 GT/s x1, which corresponds to 250 MB/s of\nbandwidth, not the true available bandwidth of about 1969 MB/s for a\n16 GT/s x1 link.\n\nUse pcie_print_link_status() to report PCIe link speed and possible\nlimitations instead of implementing this in the driver itself. This finds\nthe slowest link in the path to the device by computing the total bandwidth\nof each link and compares that with the capabilities of the device.\n\nThe dmesg change is:\n\n - PCI Express bandwidth of %dGT/s available\n - (Speed:%s, Width: x%d, Encoding Loss:%s)\n + %u.%03u Gb/s available PCIe bandwidth (%s x%d link)\n\nor, if the device is capable of better performance than is available in the\ncurrent slot:\n\n - This is not sufficient for optimal performance of this card.\n - For optimal performance, at least %dGT/s of bandwidth is required.\n - A slot with more lanes and/or higher speed is suggested.\n + %u.%03u Gb/s available PCIe bandwidth, limited by %s x%d link at %s (capable of %u.%03u Gb/s with %s x%d link)\n\nNote that the driver previously used dev_warn() to suggest using a\ndifferent slot, but pcie_print_link_status() uses dev_info() because if the\nplatform has no faster slot available, the user can't do anything about the\nwarning and may not want to be bothered with it.\n\nSigned-off-by: Bjorn Helgaas <bhelgaas@google.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 47 +------------------------\n 1 file changed, 1 insertion(+), 46 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex afadba99f7b8..8990285f6e12 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -270,9 +270,6 @@ static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,\n \t\t\t\t int expected_gts)\n {\n \tstruct ixgbe_hw *hw = &adapter->hw;\n-\tint max_gts = 0;\n-\tenum pci_bus_speed speed = PCI_SPEED_UNKNOWN;\n-\tenum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;\n \tstruct pci_dev *pdev;\n \n \t/* Some devices are not connected over PCIe and thus do not negotiate\n@@ -288,49 +285,7 @@ static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,\n \telse\n \t\tpdev = adapter->pdev;\n \n-\tif (pcie_get_minimum_link(pdev, &speed, &width) ||\n-\t speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {\n-\t\te_dev_warn(\"Unable to determine PCI Express bandwidth.\\n\");\n-\t\treturn;\n-\t}\n-\n-\tswitch (speed) {\n-\tcase PCIE_SPEED_2_5GT:\n-\t\t/* 8b/10b encoding reduces max throughput by 20% */\n-\t\tmax_gts = 2 * width;\n-\t\tbreak;\n-\tcase PCIE_SPEED_5_0GT:\n-\t\t/* 8b/10b encoding reduces max throughput by 20% */\n-\t\tmax_gts = 4 * width;\n-\t\tbreak;\n-\tcase PCIE_SPEED_8_0GT:\n-\t\t/* 128b/130b encoding reduces throughput by less than 2% */\n-\t\tmax_gts = 8 * width;\n-\t\tbreak;\n-\tdefault:\n-\t\te_dev_warn(\"Unable to determine PCI Express bandwidth.\\n\");\n-\t\treturn;\n-\t}\n-\n-\te_dev_info(\"PCI Express bandwidth of %dGT/s available\\n\",\n-\t\t max_gts);\n-\te_dev_info(\"(Speed:%s, Width: x%d, Encoding Loss:%s)\\n\",\n-\t\t (speed == PCIE_SPEED_8_0GT ? \"8.0GT/s\" :\n-\t\t speed == PCIE_SPEED_5_0GT ? \"5.0GT/s\" :\n-\t\t speed == PCIE_SPEED_2_5GT ? \"2.5GT/s\" :\n-\t\t \"Unknown\"),\n-\t\t width,\n-\t\t (speed == PCIE_SPEED_2_5GT ? \"20%\" :\n-\t\t speed == PCIE_SPEED_5_0GT ? \"20%\" :\n-\t\t speed == PCIE_SPEED_8_0GT ? \"<2%\" :\n-\t\t \"Unknown\"));\n-\n-\tif (max_gts < expected_gts) {\n-\t\te_dev_warn(\"This is not sufficient for optimal performance of this card.\\n\");\n-\t\te_dev_warn(\"For optimal performance, at least %dGT/s of bandwidth is required.\\n\",\n-\t\t\texpected_gts);\n-\t\te_dev_warn(\"A slot with more lanes and/or higher speed is suggested.\\n\");\n-\t}\n+\tpcie_print_link_status(pdev);\n }\n \n static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)\n", "prefixes": [ "v6", "4/5" ] }