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GET /api/patches/902055/?format=api
{ "id": 902055, "url": "http://patchwork.ozlabs.org/api/patches/902055/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20180420084140.8081-2-alice.michael@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180420084140.8081-2-alice.michael@intel.com>", "list_archive_url": null, "date": "2018-04-20T08:41:34", "name": "[next,S90,2/8] i40e: fix reading LLDP configuration", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "6a889c7793937468124b3c97056b5db0fcd80280", "submitter": { "id": 71123, "url": "http://patchwork.ozlabs.org/api/people/71123/?format=api", "name": "Michael, Alice", "email": "alice.michael@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20180420084140.8081-2-alice.michael@intel.com/mbox/", "series": [ { "id": 40130, "url": "http://patchwork.ozlabs.org/api/series/40130/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=40130", "date": "2018-04-20T08:41:38", "name": "[next,S90,1/8] i40e/i40evf: cleanup incorrect function doxygen comments", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/40130/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/902055/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/902055/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.137; helo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=intel.com" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 40SML423HCz9s1t\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 21 Apr 2018 02:50:36 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 63C68883CA;\n\tFri, 20 Apr 2018 16:50:34 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id udYNniIWCZ_p; Fri, 20 Apr 2018 16:50:30 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 2E453882B3;\n\tFri, 20 Apr 2018 16:50:30 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 36F8E1CF121\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 20 Apr 2018 16:50:26 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 3476E2EDCC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 20 Apr 2018 16:50:26 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id mzCXCwbkp-sc for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 20 Apr 2018 16:50:23 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby silver.osuosl.org (Postfix) with ESMTPS id 1CC2C22609\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 20 Apr 2018 16:50:23 +0000 (UTC)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n\tby fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t20 Apr 2018 09:50:21 -0700", "from alicemic-2.jf.intel.com ([10.166.16.121])\n\tby fmsmga008.fm.intel.com with ESMTP; 20 Apr 2018 09:50:21 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.49,302,1520924400\"; d=\"scan'208\";a=\"34086366\"", "From": "Alice Michael <alice.michael@intel.com>", "To": "alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org", "Date": "Fri, 20 Apr 2018 01:41:34 -0700", "Message-Id": "<20180420084140.8081-2-alice.michael@intel.com>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20180420084140.8081-1-alice.michael@intel.com>", "References": "<20180420084140.8081-1-alice.michael@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S90 2/8] i40e: fix reading LLDP\n\tconfiguration", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "Mariusz Stachura <mariusz.stachura@intel.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Mariusz Stachura <mariusz.stachura@intel.com>\n\nPrevious method for reading LLDP config was based on hard-coded\noffsets. It happened to work, because of structured architecture of\nthe NVM memory. In the new approach, known as FLAT, we need to\ncalculate the absolute address, instead of using relative values.\nNeeded defines for memory location were added.\n\nSigned-off-by: Mariusz Stachura <mariusz.stachura@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e_dcb.c | 91 ++++++++++++++++++++++++---\n drivers/net/ethernet/intel/i40e/i40e_type.h | 8 ++-\n drivers/net/ethernet/intel/i40evf/i40e_type.h | 10 ++-\n 3 files changed, 99 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb.c b/drivers/net/ethernet/intel/i40e/i40e_dcb.c\nindex 69e7d49..56bff8f 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_dcb.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_dcb.c\n@@ -921,6 +921,70 @@ i40e_status i40e_init_dcb(struct i40e_hw *hw)\n }\n \n /**\n+ * _i40e_read_lldp_cfg - generic read of LLDP Configuration data from NVM\n+ * @hw: pointer to the HW structure\n+ * @lldp_cfg: pointer to hold lldp configuration variables\n+ * @module: address of the module pointer\n+ * @word_offset: offset of LLDP configuration\n+ *\n+ * Reads the LLDP configuration data from NVM using passed addresses\n+ **/\n+static i40e_status _i40e_read_lldp_cfg(struct i40e_hw *hw,\n+\t\t\t\t struct i40e_lldp_variables *lldp_cfg,\n+\t\t\t\t u8 module, u32 word_offset)\n+{\n+\tu32 address, offset = (2 * word_offset);\n+\ti40e_status ret;\n+\t__le16 raw_mem;\n+\tu16 mem;\n+\n+\tret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = i40e_aq_read_nvm(hw, 0x0, module * 2, sizeof(raw_mem), &raw_mem,\n+\t\t\t true, NULL);\n+\ti40e_release_nvm(hw);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tmem = le16_to_cpu(raw_mem);\n+\t/* Check if this pointer needs to be read in word size or 4K sector\n+\t * units.\n+\t */\n+\tif (mem & I40E_PTR_TYPE)\n+\t\taddress = (0x7FFF & mem) * 4096;\n+\telse\n+\t\taddress = (0x7FFF & mem) * 2;\n+\n+\tret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);\n+\tif (ret)\n+\t\tgoto err_lldp_cfg;\n+\n+\tret = i40e_aq_read_nvm(hw, module, offset, sizeof(raw_mem), &raw_mem,\n+\t\t\t true, NULL);\n+\ti40e_release_nvm(hw);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tmem = le16_to_cpu(raw_mem);\n+\toffset = mem + word_offset;\n+\toffset *= 2;\n+\n+\tret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);\n+\tif (ret)\n+\t\tgoto err_lldp_cfg;\n+\n+\tret = i40e_aq_read_nvm(hw, 0, address + offset,\n+\t\t\t sizeof(struct i40e_lldp_variables), lldp_cfg,\n+\t\t\t true, NULL);\n+\ti40e_release_nvm(hw);\n+\n+err_lldp_cfg:\n+\treturn ret;\n+}\n+\n+/**\n * i40e_read_lldp_cfg - read LLDP Configuration data from NVM\n * @hw: pointer to the HW structure\n * @lldp_cfg: pointer to hold lldp configuration variables\n@@ -931,21 +995,34 @@ i40e_status i40e_read_lldp_cfg(struct i40e_hw *hw,\n \t\t\t struct i40e_lldp_variables *lldp_cfg)\n {\n \ti40e_status ret = 0;\n-\tu32 offset = (2 * I40E_NVM_LLDP_CFG_PTR);\n+\tu32 mem;\n \n \tif (!lldp_cfg)\n \t\treturn I40E_ERR_PARAM;\n \n \tret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);\n \tif (ret)\n-\t\tgoto err_lldp_cfg;\n+\t\treturn ret;\n \n-\tret = i40e_aq_read_nvm(hw, I40E_SR_EMP_MODULE_PTR, offset,\n-\t\t\t sizeof(struct i40e_lldp_variables),\n-\t\t\t (u8 *)lldp_cfg,\n-\t\t\t true, NULL);\n+\tret = i40e_aq_read_nvm(hw, I40E_SR_NVM_CONTROL_WORD, 0, sizeof(mem),\n+\t\t\t &mem, true, NULL);\n \ti40e_release_nvm(hw);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\t/* Read a bit that holds information whether we are running flat or\n+\t * structured NVM image. Flat image has LLDP configuration in shadow\n+\t * ram, so there is a need to pass different addresses for both cases.\n+\t */\n+\tif (mem & I40E_SR_NVM_MAP_STRUCTURE_TYPE) {\n+\t\t/* Flat NVM case */\n+\t\tret = _i40e_read_lldp_cfg(hw, lldp_cfg, I40E_SR_EMP_MODULE_PTR,\n+\t\t\t\t\t I40E_SR_LLDP_CFG_PTR);\n+\t} else {\n+\t\t/* Good old structured NVM image */\n+\t\tret = _i40e_read_lldp_cfg(hw, lldp_cfg, I40E_EMP_MODULE_PTR,\n+\t\t\t\t\t I40E_NVM_LLDP_CFG_PTR);\n+\t}\n \n-err_lldp_cfg:\n \treturn ret;\n }\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h\nindex 40968a4..b430e48 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h\n@@ -1294,7 +1294,8 @@ struct i40e_hw_port_stats {\n \n /* Checksum and Shadow RAM pointers */\n #define I40E_SR_NVM_CONTROL_WORD\t\t0x00\n-#define I40E_SR_EMP_MODULE_PTR\t\t\t0x0F\n+#define I40E_EMP_MODULE_PTR\t\t\t0x0F\n+#define I40E_SR_EMP_MODULE_PTR\t\t\t0x48\n #define I40E_SR_PBA_FLAGS\t\t\t0x15\n #define I40E_SR_PBA_BLOCK_PTR\t\t\t0x16\n #define I40E_SR_BOOT_CONFIG_PTR\t\t\t0x17\n@@ -1313,6 +1314,8 @@ struct i40e_hw_port_stats {\n #define I40E_SR_PCIE_ALT_MODULE_MAX_SIZE\t1024\n #define I40E_SR_CONTROL_WORD_1_SHIFT\t\t0x06\n #define I40E_SR_CONTROL_WORD_1_MASK\t(0x03 << I40E_SR_CONTROL_WORD_1_SHIFT)\n+#define I40E_SR_CONTROL_WORD_1_NVM_BANK_VALID\tBIT(5)\n+#define I40E_SR_NVM_MAP_STRUCTURE_TYPE\t\tBIT(12)\n #define I40E_PTR_TYPE\t\t\t\tBIT(15)\n #define I40E_SR_OCP_CFG_WORD0\t\t\t0x2B\n #define I40E_SR_OCP_ENABLED\t\t\tBIT(15)\n@@ -1430,7 +1433,8 @@ enum i40e_reset_type {\n };\n \n /* IEEE 802.1AB LLDP Agent Variables from NVM */\n-#define I40E_NVM_LLDP_CFG_PTR\t\t0xD\n+#define I40E_NVM_LLDP_CFG_PTR 0x06\n+#define I40E_SR_LLDP_CFG_PTR 0x31\n struct i40e_lldp_variables {\n \tu16 length;\n \tu16 adminstatus;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h\nindex c77cb9f..9523aa1 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h\n@@ -1233,7 +1233,8 @@ struct i40e_hw_port_stats {\n \n /* Checksum and Shadow RAM pointers */\n #define I40E_SR_NVM_CONTROL_WORD\t\t0x00\n-#define I40E_SR_EMP_MODULE_PTR\t\t\t0x0F\n+#define I40E_EMP_MODULE_PTR\t\t\t0x0F\n+#define I40E_SR_EMP_MODULE_PTR\t\t\t0x48\n #define I40E_NVM_OEM_VER_OFF\t\t\t0x83\n #define I40E_SR_NVM_DEV_STARTER_VERSION\t\t0x18\n #define I40E_SR_NVM_WAKE_ON_LAN\t\t\t0x19\n@@ -1249,6 +1250,9 @@ struct i40e_hw_port_stats {\n #define I40E_SR_PCIE_ALT_MODULE_MAX_SIZE\t1024\n #define I40E_SR_CONTROL_WORD_1_SHIFT\t\t0x06\n #define I40E_SR_CONTROL_WORD_1_MASK\t(0x03 << I40E_SR_CONTROL_WORD_1_SHIFT)\n+#define I40E_SR_CONTROL_WORD_1_NVM_BANK_VALID\tBIT(5)\n+#define I40E_SR_NVM_MAP_STRUCTURE_TYPE\t\tBIT(12)\n+#define I40E_PTR_TYPE BIT(15)\n \n /* Shadow RAM related */\n #define I40E_SR_SECTOR_SIZE_IN_WORDS\t0x800\n@@ -1362,6 +1366,10 @@ enum i40e_reset_type {\n \tI40E_RESET_EMPR\t\t= 3,\n };\n \n+/* IEEE 802.1AB LLDP Agent Variables from NVM */\n+#define I40E_NVM_LLDP_CFG_PTR 0x06\n+#define I40E_SR_LLDP_CFG_PTR 0x31\n+\n /* RSS Hash Table Size */\n #define I40E_PFQF_CTL_0_HASHLUTSIZE_512\t0x00010000\n \n", "prefixes": [ "next", "S90", "2/8" ] }