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{
    "id": 902014,
    "url": "http://patchwork.ozlabs.org/api/patches/902014/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20180420155314.8920-9-stefan@agner.ch/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20180420155314.8920-9-stefan@agner.ch>",
    "list_archive_url": null,
    "date": "2018-04-20T15:53:13",
    "name": "[U-Boot,v1,8/9] arm: dts: imx7: sync with Linux",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": false,
    "hash": "af901667e8291ff53d0ef3341c5ca6f74b73a843",
    "submitter": {
        "id": 4137,
        "url": "http://patchwork.ozlabs.org/api/people/4137/?format=api",
        "name": "Stefan Agner",
        "email": "stefan@agner.ch"
    },
    "delegate": {
        "id": 1693,
        "url": "http://patchwork.ozlabs.org/api/users/1693/?format=api",
        "username": "sbabic",
        "first_name": "Stefano",
        "last_name": "Babic",
        "email": "sbabic@denx.de"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20180420155314.8920-9-stefan@agner.ch/mbox/",
    "series": [
        {
            "id": 40110,
            "url": "http://patchwork.ozlabs.org/api/series/40110/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=40110",
            "date": "2018-04-20T15:53:05",
            "name": "mtd: nand: mxs_nand: add device tree support",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/40110/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/902014/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/902014/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Stefan Agner <stefan@agner.ch>",
        "To": "u-boot@lists.denx.de, Stefano Babic <sbabic@denx.de>, oss@buserror.net",
        "Date": "Fri, 20 Apr 2018 17:53:13 +0200",
        "Message-Id": "<20180420155314.8920-9-stefan@agner.ch>",
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        "References": "<20180420155314.8920-1-stefan@agner.ch>",
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        "Cc": "marex@denx.de, Stefan Agner <stefan.agner@toradex.com>,\n\tMarcel Ziswiler <marcel.ziswiler@toradex.com>,\n\tMax Krummenacher <max.krummenacher@toradex.com>, han.xu@nxp.com",
        "Subject": "[U-Boot] [PATCH v1 8/9] arm: dts: imx7: sync with Linux",
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        "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>"
    },
    "content": "From: Stefan Agner <stefan.agner@toradex.com>\n\nSync with Linux commit 60cc43fc8884 (\"Linux 4.17-rc1\").\n\nSigned-off-by: Stefan Agner <stefan.agner@toradex.com>\n---\n\n arch/arm/dts/imx7s.dtsi                 | 491 +++++++++++++++---------\n include/dt-bindings/clock/imx7d-clock.h |  15 +-\n include/dt-bindings/power/imx7-power.h  |  16 +\n 3 files changed, 341 insertions(+), 181 deletions(-)\n create mode 100644 include/dt-bindings/power/imx7-power.h",
    "diff": "diff --git a/arch/arm/dts/imx7s.dtsi b/arch/arm/dts/imx7s.dtsi\nindex a7d48e785d..4d42335c0d 100644\n--- a/arch/arm/dts/imx7s.dtsi\n+++ b/arch/arm/dts/imx7s.dtsi\n@@ -42,6 +42,7 @@\n  */\n \n #include <dt-bindings/clock/imx7d-clock.h>\n+#include <dt-bindings/power/imx7-power.h>\n #include <dt-bindings/gpio/gpio.h>\n #include <dt-bindings/input/input.h>\n #include <dt-bindings/interrupt-controller/arm-gic.h>\n@@ -57,7 +58,7 @@\n \t * Also for U-Boot there must be a pre-existing /memory node.\n \t */\n \tchosen {};\n-\tmemory { device_type = \"memory\"; reg = <0 0>; };\n+\tmemory { device_type = \"memory\"; };\n \n \taliases {\n \t\tgpio0 = &gpio1;\n@@ -115,11 +116,77 @@\n \t\tclock-output-names = \"osc\";\n \t};\n \n+\tusbphynop1: usbphynop1 {\n+\t\tcompatible = \"usb-nop-xceiv\";\n+\t\tclocks = <&clks IMX7D_USB_PHY1_CLK>;\n+\t\tclock-names = \"main_clk\";\n+\t\t#phy-cells = <0>;\n+\t};\n+\n+\tusbphynop3: usbphynop3 {\n+\t\tcompatible = \"usb-nop-xceiv\";\n+\t\tclocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;\n+\t\tclock-names = \"main_clk\";\n+\t\t#phy-cells = <0>;\n+\t};\n+\n+\tpmu {\n+\t\tcompatible = \"arm,cortex-a7-pmu\";\n+\t\tinterrupt-parent = <&gpc>;\n+\t\tinterrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;\n+\t\tinterrupt-affinity = <&cpu0>;\n+\t};\n+\n+\treplicator {\n+\t\t/*\n+\t\t * non-configurable replicators don't show up on the\n+\t\t * AMBA bus.  As such no need to add \"arm,primecell\"\n+\t\t */\n+\t\tcompatible = \"arm,coresight-replicator\";\n+\n+\t\tports {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\t\t/* replicator output ports */\n+\t\t\tport@0 {\n+\t\t\t\treg = <0>;\n+\t\t\t\treplicator_out_port0: endpoint {\n+\t\t\t\t\tremote-endpoint = <&tpiu_in_port>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tport@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\treplicator_out_port1: endpoint {\n+\t\t\t\t\tremote-endpoint = <&etr_in_port>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\t/* replicator input port */\n+\t\t\tport@2 {\n+\t\t\t\treg = <0>;\n+\t\t\t\treplicator_in_port0: endpoint {\n+\t\t\t\t\tslave-mode;\n+\t\t\t\t\tremote-endpoint = <&etf_out_port>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\ttimer {\n+\t\tcompatible = \"arm,armv7-timer\";\n+\t\tinterrupt-parent = <&intc>;\n+\t\tinterrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,\n+\t\t\t     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,\n+\t\t\t     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,\n+\t\t\t     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;\n+\t};\n+\n \tsoc {\n \t\t#address-cells = <1>;\n \t\t#size-cells = <1>;\n \t\tcompatible = \"simple-bus\";\n-\t\tinterrupt-parent = <&intc>;\n+\t\tinterrupt-parent = <&gpc>;\n \t\tranges;\n \n \t\tfunnel@30041000 {\n@@ -259,62 +326,18 @@\n \t\t\t};\n \t\t};\n \n-\t\treplicator {\n-\t\t\t/*\n-\t\t\t * non-configurable replicators don't show up on the\n-\t\t\t * AMBA bus.  As such no need to add \"arm,primecell\"\n-\t\t\t */\n-\t\t\tcompatible = \"arm,coresight-replicator\";\n-\n-\t\t\tports {\n-\t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <0>;\n-\n-\t\t\t\t/* replicator output ports */\n-\t\t\t\tport@0 {\n-\t\t\t\t\treg = <0>;\n-\t\t\t\t\treplicator_out_port0: endpoint {\n-\t\t\t\t\t\tremote-endpoint = <&tpiu_in_port>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\n-\t\t\t\tport@1 {\n-\t\t\t\t\treg = <1>;\n-\t\t\t\t\treplicator_out_port1: endpoint {\n-\t\t\t\t\t\tremote-endpoint = <&etr_in_port>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\n-\t\t\t\t/* replicator input port */\n-\t\t\t\tport@2 {\n-\t\t\t\t\treg = <0>;\n-\t\t\t\t\treplicator_in_port0: endpoint {\n-\t\t\t\t\t\tslave-mode;\n-\t\t\t\t\t\tremote-endpoint = <&etf_out_port>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\t\t\t};\n-\t\t};\n-\n \t\tintc: interrupt-controller@31001000 {\n \t\t\tcompatible = \"arm,cortex-a7-gic\";\n \t\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;\n \t\t\t#interrupt-cells = <3>;\n \t\t\tinterrupt-controller;\n+\t\t\tinterrupt-parent = <&intc>;\n \t\t\treg = <0x31001000 0x1000>,\n \t\t\t      <0x31002000 0x2000>,\n \t\t\t      <0x31004000 0x2000>,\n \t\t\t      <0x31006000 0x2000>;\n \t\t};\n \n-\t\ttimer {\n-\t\t\tcompatible = \"arm,armv7-timer\";\n-\t\t\tinterrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,\n-\t\t\t\t     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,\n-\t\t\t\t     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,\n-\t\t\t\t     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;\n-\t\t};\n-\n \t\taips1: aips-bus@30000000 {\n \t\t\tcompatible = \"fsl,aips-bus\", \"simple-bus\";\n \t\t\t#address-cells = <1>;\n@@ -482,20 +505,49 @@\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n+\t\t\tkpp: kpp@30320000 {\n+\t\t\t\tcompatible = \"fsl,imx7d-kpp\", \"fsl,imx21-kpp\";\n+\t\t\t\treg = <0x30320000 0x10000>;\n+\t\t\t\tinterrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\tclocks = <&clks IMX7D_KPP_ROOT_CLK>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n \t\t\tiomuxc: iomuxc@30330000 {\n \t\t\t\tcompatible = \"fsl,imx7d-iomuxc\";\n \t\t\t\treg = <0x30330000 0x10000>;\n \t\t\t};\n \n \t\t\tgpr: iomuxc-gpr@30340000 {\n-\t\t\t\tcompatible = \"fsl,imx7d-iomuxc-gpr\", \"syscon\";\n+\t\t\t\tcompatible = \"fsl,imx7d-iomuxc-gpr\",\n+\t\t\t\t\t\"fsl,imx6q-iomuxc-gpr\", \"syscon\";\n \t\t\t\treg = <0x30340000 0x10000>;\n \t\t\t};\n \n \t\t\tocotp: ocotp-ctrl@30350000 {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <1>;\n \t\t\t\tcompatible = \"fsl,imx7d-ocotp\", \"syscon\";\n \t\t\t\treg = <0x30350000 0x10000>;\n \t\t\t\tclocks = <&clks IMX7D_OCOTP_CLK>;\n+\n+\t\t\t\ttempmon_calib: calib@3c {\n+\t\t\t\t\treg = <0x3c 0x4>;\n+\t\t\t\t};\n+\n+\t\t\t\ttempmon_temp_grade: temp-grade@10 {\n+\t\t\t\t\treg = <0x10 0x4>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\ttempmon: tempmon {\n+\t\t\t\tcompatible = \"fsl,imx7d-tempmon\";\n+\t\t\t\tinterrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\tfsl,tempmon =<&anatop>;\n+\t\t\t\tnvmem-cells = <&tempmon_calib>,\n+\t\t\t\t\t<&tempmon_temp_grade>;\n+\t\t\t\tnvmem-cell-names = \"calib\", \"temp_grade\";\n+\t\t\t\tclocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;\n \t\t\t};\n \n \t\t\tanatop: anatop@30360000 {\n@@ -504,8 +556,11 @@\n \t\t\t\treg = <0x30360000 0x10000>;\n \t\t\t\tinterrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,\n \t\t\t\t\t<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n \n-\t\t\t\treg_1p0d: regulator-vdd1p0d {\n+\t\t\t\treg_1p0d: regulator-vdd1p0d@30360210 {\n+\t\t\t\t\treg = <0x30360210>;\n \t\t\t\t\tcompatible = \"fsl,anatop-regulator\";\n \t\t\t\t\tregulator-name = \"vdd1p0d\";\n \t\t\t\t\tregulator-min-microvolt = <800000>;\n@@ -516,6 +571,7 @@\n \t\t\t\t\tanatop-min-bit-val = <8>;\n \t\t\t\t\tanatop-min-voltage = <800000>;\n \t\t\t\t\tanatop-max-voltage = <1200000>;\n+\t\t\t\t\tanatop-enable-bit = <0>;\n \t\t\t\t};\n \t\t\t};\n \n@@ -529,12 +585,15 @@\n \t\t\t\t\toffset = <0x34>;\n \t\t\t\t\tinterrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,\n \t\t\t\t\t\t     <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_SNVS_CLK>;\n+\t\t\t\t\tclock-names = \"snvs-rtc\";\n \t\t\t\t};\n \n \t\t\t\tsnvs_poweroff: snvs-poweroff {\n \t\t\t\t\tcompatible = \"syscon-poweroff\";\n \t\t\t\t\tregmap = <&snvs>;\n \t\t\t\t\toffset = <0x38>;\n+\t\t\t\t\tvalue = <0x60>;\n \t\t\t\t\tmask = <0x60>;\n \t\t\t\t};\n \n@@ -558,11 +617,32 @@\n \t\t\t};\n \n \t\t\tsrc: src@30390000 {\n-\t\t\t\tcompatible = \"fsl,imx7d-src\", \"fsl,imx51-src\", \"syscon\";\n+\t\t\t\tcompatible = \"fsl,imx7d-src\", \"syscon\";\n \t\t\t\treg = <0x30390000 0x10000>;\n \t\t\t\tinterrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;\n \t\t\t\t#reset-cells = <1>;\n \t\t\t};\n+\n+\t\t\tgpc: gpc@303a0000 {\n+\t\t\t\tcompatible = \"fsl,imx7d-gpc\";\n+\t\t\t\treg = <0x303a0000 0x10000>;\n+\t\t\t\tinterrupt-controller;\n+\t\t\t\tinterrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t#interrupt-cells = <3>;\n+\t\t\t\tinterrupt-parent = <&intc>;\n+\t\t\t\t#power-domain-cells = <1>;\n+\n+\t\t\t\tpgc {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\n+\t\t\t\t\tpgc_pcie_phy: pgc-power-domain@1 {\n+\t\t\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t\t\t\treg = <1>;\n+\t\t\t\t\t\tpower-supply = <&reg_1p0d>;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t};\n \t\t};\n \n \t\taips2: aips-bus@30400000 {\n@@ -609,7 +689,7 @@\n \t\t\t\tclocks = <&clks IMX7D_PWM1_ROOT_CLK>,\n \t\t\t\t\t <&clks IMX7D_PWM1_ROOT_CLK>;\n \t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\t#pwm-cells = <2>;\n+\t\t\t\t#pwm-cells = <3>;\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n@@ -620,7 +700,7 @@\n \t\t\t\tclocks = <&clks IMX7D_PWM2_ROOT_CLK>,\n \t\t\t\t\t <&clks IMX7D_PWM2_ROOT_CLK>;\n \t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\t#pwm-cells = <2>;\n+\t\t\t\t#pwm-cells = <3>;\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n@@ -631,7 +711,7 @@\n \t\t\t\tclocks = <&clks IMX7D_PWM3_ROOT_CLK>,\n \t\t\t\t\t <&clks IMX7D_PWM3_ROOT_CLK>;\n \t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\t#pwm-cells = <2>;\n+\t\t\t\t#pwm-cells = <3>;\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n@@ -642,7 +722,7 @@\n \t\t\t\tclocks = <&clks IMX7D_PWM4_ROOT_CLK>,\n \t\t\t\t\t <&clks IMX7D_PWM4_ROOT_CLK>;\n \t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\t#pwm-cells = <2>;\n+\t\t\t\t#pwm-cells = <3>;\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n@@ -664,118 +744,156 @@\n \t\t\treg = <0x30800000 0x400000>;\n \t\t\tranges;\n \n-\t\t\tecspi1: ecspi@30820000 {\n+\t\t\tspba-bus@30800000 {\n+\t\t\t\tcompatible = \"fsl,spba-bus\", \"simple-bus\";\n \t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <0>;\n-\t\t\t\tcompatible = \"fsl,imx7d-ecspi\", \"fsl,imx51-ecspi\";\n-\t\t\t\treg = <0x30820000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,\n-\t\t\t\t\t<&clks IMX7D_ECSPI1_ROOT_CLK>;\n-\t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n+\t\t\t\t#size-cells = <1>;\n+\t\t\t\treg = <0x30800000 0x100000>;\n+\t\t\t\tranges;\n+\n+\t\t\t\tecspi1: ecspi@30820000 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tcompatible = \"fsl,imx7d-ecspi\", \"fsl,imx51-ecspi\";\n+\t\t\t\t\treg = <0x30820000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,\n+\t\t\t\t\t\t<&clks IMX7D_ECSPI1_ROOT_CLK>;\n+\t\t\t\t\tclock-names = \"ipg\", \"per\";\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \n-\t\t\tecspi2: ecspi@30830000 {\n-\t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <0>;\n-\t\t\t\tcompatible = \"fsl,imx7d-ecspi\", \"fsl,imx51-ecspi\";\n-\t\t\t\treg = <0x30830000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,\n-\t\t\t\t\t<&clks IMX7D_ECSPI2_ROOT_CLK>;\n-\t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n+\t\t\t\tecspi2: ecspi@30830000 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tcompatible = \"fsl,imx7d-ecspi\", \"fsl,imx51-ecspi\";\n+\t\t\t\t\treg = <0x30830000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,\n+\t\t\t\t\t\t<&clks IMX7D_ECSPI2_ROOT_CLK>;\n+\t\t\t\t\tclock-names = \"ipg\", \"per\";\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \n-\t\t\tecspi3: ecspi@30840000 {\n-\t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <0>;\n-\t\t\t\tcompatible = \"fsl,imx7d-ecspi\", \"fsl,imx51-ecspi\";\n-\t\t\t\treg = <0x30840000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,\n-\t\t\t\t\t<&clks IMX7D_ECSPI3_ROOT_CLK>;\n-\t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n+\t\t\t\tecspi3: ecspi@30840000 {\n+\t\t\t\t\t#address-cells = <1>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tcompatible = \"fsl,imx7d-ecspi\", \"fsl,imx51-ecspi\";\n+\t\t\t\t\treg = <0x30840000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,\n+\t\t\t\t\t\t<&clks IMX7D_ECSPI3_ROOT_CLK>;\n+\t\t\t\t\tclock-names = \"ipg\", \"per\";\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \n-\t\t\tuart1: serial@30860000 {\n-\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n-\t\t\t\t\t     \"fsl,imx6q-uart\";\n-\t\t\t\treg = <0x30860000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_UART1_ROOT_CLK>,\n-\t\t\t\t\t<&clks IMX7D_UART1_ROOT_CLK>;\n-\t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n+\t\t\t\tuart1: serial@30860000 {\n+\t\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n+\t\t\t\t\t\t     \"fsl,imx6q-uart\";\n+\t\t\t\t\treg = <0x30860000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_UART1_ROOT_CLK>,\n+\t\t\t\t\t\t<&clks IMX7D_UART1_ROOT_CLK>;\n+\t\t\t\t\tclock-names = \"ipg\", \"per\";\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \n-\t\t\tuart2: serial@30890000 {\n-\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n-\t\t\t\t\t     \"fsl,imx6q-uart\";\n-\t\t\t\treg = <0x30890000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_UART2_ROOT_CLK>,\n-\t\t\t\t\t<&clks IMX7D_UART2_ROOT_CLK>;\n-\t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n+\t\t\t\tuart2: serial@30890000 {\n+\t\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n+\t\t\t\t\t\t     \"fsl,imx6q-uart\";\n+\t\t\t\t\treg = <0x30890000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_UART2_ROOT_CLK>,\n+\t\t\t\t\t\t<&clks IMX7D_UART2_ROOT_CLK>;\n+\t\t\t\t\tclock-names = \"ipg\", \"per\";\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \n-\t\t\tuart3: serial@30880000 {\n-\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n-\t\t\t\t\t     \"fsl,imx6q-uart\";\n-\t\t\t\treg = <0x30880000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_UART3_ROOT_CLK>,\n-\t\t\t\t\t<&clks IMX7D_UART3_ROOT_CLK>;\n-\t\t\t\tclock-names = \"ipg\", \"per\";\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n+\t\t\t\tuart3: serial@30880000 {\n+\t\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n+\t\t\t\t\t\t     \"fsl,imx6q-uart\";\n+\t\t\t\t\treg = <0x30880000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_UART3_ROOT_CLK>,\n+\t\t\t\t\t\t<&clks IMX7D_UART3_ROOT_CLK>;\n+\t\t\t\t\tclock-names = \"ipg\", \"per\";\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \n-\t\t\tsai1: sai@308a0000 {\n-\t\t\t\t#sound-dai-cells = <0>;\n-\t\t\t\tcompatible = \"fsl,imx7d-sai\", \"fsl,imx6sx-sai\";\n-\t\t\t\treg = <0x308a0000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_SAI1_IPG_CLK>,\n-\t\t\t\t\t <&clks IMX7D_SAI1_ROOT_CLK>,\n-\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>,\n-\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>;\n-\t\t\t\tclock-names = \"bus\", \"mclk1\", \"mclk2\", \"mclk3\";\n-\t\t\t\tdma-names = \"rx\", \"tx\";\n-\t\t\t\tdmas = <&sdma 8 24 0>, <&sdma 9 24 0>;\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n+\t\t\t\tsai1: sai@308a0000 {\n+\t\t\t\t\t#sound-dai-cells = <0>;\n+\t\t\t\t\tcompatible = \"fsl,imx7d-sai\", \"fsl,imx6sx-sai\";\n+\t\t\t\t\treg = <0x308a0000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_SAI1_IPG_CLK>,\n+\t\t\t\t\t\t <&clks IMX7D_SAI1_ROOT_CLK>,\n+\t\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>,\n+\t\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>;\n+\t\t\t\t\tclock-names = \"bus\", \"mclk1\", \"mclk2\", \"mclk3\";\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t\tdmas = <&sdma 8 24 0>, <&sdma 9 24 0>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \n-\t\t\tsai2: sai@308b0000 {\n-\t\t\t\t#sound-dai-cells = <0>;\n-\t\t\t\tcompatible = \"fsl,imx7d-sai\", \"fsl,imx6sx-sai\";\n-\t\t\t\treg = <0x308b0000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_SAI2_IPG_CLK>,\n-\t\t\t\t\t <&clks IMX7D_SAI2_ROOT_CLK>,\n-\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>,\n-\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>;\n-\t\t\t\tclock-names = \"bus\", \"mclk1\", \"mclk2\", \"mclk3\";\n-\t\t\t\tdma-names = \"rx\", \"tx\";\n-\t\t\t\tdmas = <&sdma 10 24 0>, <&sdma 11 24 0>;\n-\t\t\t\tstatus = \"disabled\";\n+\t\t\t\tsai2: sai@308b0000 {\n+\t\t\t\t\t#sound-dai-cells = <0>;\n+\t\t\t\t\tcompatible = \"fsl,imx7d-sai\", \"fsl,imx6sx-sai\";\n+\t\t\t\t\treg = <0x308b0000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_SAI2_IPG_CLK>,\n+\t\t\t\t\t\t <&clks IMX7D_SAI2_ROOT_CLK>,\n+\t\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>,\n+\t\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>;\n+\t\t\t\t\tclock-names = \"bus\", \"mclk1\", \"mclk2\", \"mclk3\";\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t\tdmas = <&sdma 10 24 0>, <&sdma 11 24 0>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\tsai3: sai@308c0000 {\n+\t\t\t\t\t#sound-dai-cells = <0>;\n+\t\t\t\t\tcompatible = \"fsl,imx7d-sai\", \"fsl,imx6sx-sai\";\n+\t\t\t\t\treg = <0x308c0000 0x10000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\tclocks = <&clks IMX7D_SAI3_IPG_CLK>,\n+\t\t\t\t\t\t <&clks IMX7D_SAI3_ROOT_CLK>,\n+\t\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>,\n+\t\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>;\n+\t\t\t\t\tclock-names = \"bus\", \"mclk1\", \"mclk2\", \"mclk3\";\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t\tdmas = <&sdma 12 24 0>, <&sdma 13 24 0>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n \t\t\t};\n \n-\t\t\tsai3: sai@308c0000 {\n-\t\t\t\t#sound-dai-cells = <0>;\n-\t\t\t\tcompatible = \"fsl,imx7d-sai\", \"fsl,imx6sx-sai\";\n-\t\t\t\treg = <0x308c0000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_SAI3_IPG_CLK>,\n-\t\t\t\t\t <&clks IMX7D_SAI3_ROOT_CLK>,\n-\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>,\n-\t\t\t\t\t <&clks IMX7D_CLK_DUMMY>;\n-\t\t\t\tclock-names = \"bus\", \"mclk1\", \"mclk2\", \"mclk3\";\n-\t\t\t\tdma-names = \"rx\", \"tx\";\n-\t\t\t\tdmas = <&sdma 12 24 0>, <&sdma 13 24 0>;\n-\t\t\t\tstatus = \"disabled\";\n+\t\t\tcrypto: caam@30900000 {\n+\t\t\t\tcompatible = \"fsl,sec-v4.0\";\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <1>;\n+\t\t\t\treg = <0x30900000 0x40000>;\n+\t\t\t\tranges = <0 0x30900000 0x40000>;\n+\t\t\t\tinterrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\tclocks = <&clks IMX7D_CAAM_CLK>,\n+\t\t\t\t\t <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;\n+\t\t\t\tclock-names = \"ipg\", \"aclk\";\n+\n+\t\t\t\tsec_jr0: jr0@1000 {\n+\t\t\t\t\tcompatible = \"fsl,sec-v4.0-job-ring\";\n+\t\t\t\t\treg = <0x1000 0x1000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t};\n+\n+\t\t\t\tsec_jr1: jr1@2000 {\n+\t\t\t\t\tcompatible = \"fsl,sec-v4.0-job-ring\";\n+\t\t\t\t\treg = <0x2000 0x1000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t};\n+\n+\t\t\t\tsec_jr2: jr1@3000 {\n+\t\t\t\t\tcompatible = \"fsl,sec-v4.0-job-ring\";\n+\t\t\t\t\treg = <0x3000 0x1000>;\n+\t\t\t\t\tinterrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t};\n \t\t\t};\n \n \t\t\tflexcan1: can@30a00000 {\n@@ -918,24 +1036,12 @@\n \t\t\t\treg = <0x30b30200 0x200>;\n \t\t\t};\n \n-\t\t\tusbphynop1: usbphynop1 {\n-\t\t\t\tcompatible = \"usb-nop-xceiv\";\n-\t\t\t\tclocks = <&clks IMX7D_USB_PHY1_CLK>;\n-\t\t\t\tclock-names = \"main_clk\";\n-\t\t\t};\n-\n-\t\t\tusbphynop3: usbphynop3 {\n-\t\t\t\tcompatible = \"usb-nop-xceiv\";\n-\t\t\t\tclocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;\n-\t\t\t\tclock-names = \"main_clk\";\n-\t\t\t};\n-\n \t\t\tusdhc1: usdhc@30b40000 {\n \t\t\t\tcompatible = \"fsl,imx7d-usdhc\", \"fsl,imx6sl-usdhc\";\n \t\t\t\treg = <0x30b40000 0x10000>;\n \t\t\t\tinterrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_CLK_DUMMY>,\n-\t\t\t\t\t<&clks IMX7D_CLK_DUMMY>,\n+\t\t\t\tclocks = <&clks IMX7D_IPG_ROOT_CLK>,\n+\t\t\t\t\t<&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,\n \t\t\t\t\t<&clks IMX7D_USDHC1_ROOT_CLK>;\n \t\t\t\tclock-names = \"ipg\", \"ahb\", \"per\";\n \t\t\t\tbus-width = <4>;\n@@ -946,8 +1052,8 @@\n \t\t\t\tcompatible = \"fsl,imx7d-usdhc\", \"fsl,imx6sl-usdhc\";\n \t\t\t\treg = <0x30b50000 0x10000>;\n \t\t\t\tinterrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_CLK_DUMMY>,\n-\t\t\t\t\t<&clks IMX7D_CLK_DUMMY>,\n+\t\t\t\tclocks = <&clks IMX7D_IPG_ROOT_CLK>,\n+\t\t\t\t\t<&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,\n \t\t\t\t\t<&clks IMX7D_USDHC2_ROOT_CLK>;\n \t\t\t\tclock-names = \"ipg\", \"ahb\", \"per\";\n \t\t\t\tbus-width = <4>;\n@@ -958,8 +1064,8 @@\n \t\t\t\tcompatible = \"fsl,imx7d-usdhc\", \"fsl,imx6sl-usdhc\";\n \t\t\t\treg = <0x30b60000 0x10000>;\n \t\t\t\tinterrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\tclocks = <&clks IMX7D_CLK_DUMMY>,\n-\t\t\t\t\t<&clks IMX7D_CLK_DUMMY>,\n+\t\t\t\tclocks = <&clks IMX7D_IPG_ROOT_CLK>,\n+\t\t\t\t\t<&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,\n \t\t\t\t\t<&clks IMX7D_USDHC3_ROOT_CLK>;\n \t\t\t\tclock-names = \"ipg\", \"ahb\", \"per\";\n \t\t\t\tbus-width = <4>;\n@@ -980,9 +1086,11 @@\n \t\t\tfec1: ethernet@30be0000 {\n \t\t\t\tcompatible = \"fsl,imx7d-fec\", \"fsl,imx6sx-fec\";\n \t\t\t\treg = <0x30be0000 0x10000>;\n-\t\t\t\tinterrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\tinterrupt-names = \"int0\", \"int1\", \"int2\", \"pps\";\n+\t\t\t\tinterrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t\t<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,\n \t\t\t\t\t<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t\t<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\t\t\t<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;\n \t\t\t\tclocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,\n \t\t\t\t\t<&clks IMX7D_ENET_AXI_ROOT_CLK>,\n \t\t\t\t\t<&clks IMX7D_ENET1_TIME_ROOT_CLK>,\n@@ -995,5 +1103,36 @@\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \t\t};\n+\n+\t\tdma_apbh: dma-apbh@33000000 {\n+\t\t\tcompatible = \"fsl,imx7d-dma-apbh\", \"fsl,imx28-dma-apbh\";\n+\t\t\treg = <0x33000000 0x2000>;\n+\t\t\tinterrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"gpmi0\", \"gpmi1\", \"gpmi2\", \"gpmi3\";\n+\t\t\t#dma-cells = <1>;\n+\t\t\tdma-channels = <4>;\n+\t\t\tclocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;\n+\t\t};\n+\n+\t\tgpmi: gpmi-nand@33002000{\n+\t\t\tcompatible = \"fsl,imx7d-gpmi-nand\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <1>;\n+\t\t\treg = <0x33002000 0x2000>, <0x33004000 0x4000>;\n+\t\t\treg-names = \"gpmi-nand\", \"bch\";\n+\t\t\tinterrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"bch\";\n+\t\t\tclocks = <&clks IMX7D_NAND_RAWNAND_CLK>,\n+\t\t\t\t<&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;\n+\t\t\tclock-names = \"gpmi_io\", \"gpmi_bch_apb\";\n+\t\t\tdmas = <&dma_apbh 0>;\n+\t\t\tdma-names = \"rx-tx\";\n+\t\t\tstatus = \"disabled\";\n+\t\t\tassigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;\n+\t\t\tassigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;\n+\t\t};\n \t};\n };\ndiff --git a/include/dt-bindings/clock/imx7d-clock.h b/include/dt-bindings/clock/imx7d-clock.h\nindex a7a1a50f33..b2325d3e23 100644\n--- a/include/dt-bindings/clock/imx7d-clock.h\n+++ b/include/dt-bindings/clock/imx7d-clock.h\n@@ -80,10 +80,10 @@\n #define IMX7D_ARM_M4_ROOT_SRC\t\t67\n #define IMX7D_ARM_M4_ROOT_CG\t\t68\n #define IMX7D_ARM_M4_ROOT_DIV\t\t69\n-#define IMX7D_ARM_M0_ROOT_CLK\t\t70\n-#define IMX7D_ARM_M0_ROOT_SRC\t\t71\n-#define IMX7D_ARM_M0_ROOT_CG\t\t72\n-#define IMX7D_ARM_M0_ROOT_DIV\t\t73\n+#define IMX7D_ARM_M0_ROOT_CLK\t\t70\t/* unused */\n+#define IMX7D_ARM_M0_ROOT_SRC\t\t71\t/* unused */\n+#define IMX7D_ARM_M0_ROOT_CG\t\t72\t/* unused */\n+#define IMX7D_ARM_M0_ROOT_DIV\t\t73\t/* unused */\n #define IMX7D_MAIN_AXI_ROOT_CLK\t\t74\n #define IMX7D_MAIN_AXI_ROOT_SRC\t\t75\n #define IMX7D_MAIN_AXI_ROOT_CG\t\t76\n@@ -450,5 +450,10 @@\n #define IMX7D_CLK_ARM\t\t\t437\n #define IMX7D_CKIL\t\t\t438\n #define IMX7D_OCOTP_CLK\t\t\t439\n-#define IMX7D_CLK_END\t\t\t440\n+#define IMX7D_NAND_RAWNAND_CLK\t\t440\n+#define IMX7D_NAND_USDHC_BUS_RAWNAND_CLK 441\n+#define IMX7D_SNVS_CLK\t\t\t442\n+#define IMX7D_CAAM_CLK\t\t\t443\n+#define IMX7D_KPP_ROOT_CLK\t\t444\n+#define IMX7D_CLK_END\t\t\t445\n #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */\ndiff --git a/include/dt-bindings/power/imx7-power.h b/include/dt-bindings/power/imx7-power.h\nnew file mode 100644\nindex 0000000000..3a181e4105\n--- /dev/null\n+++ b/include/dt-bindings/power/imx7-power.h\n@@ -0,0 +1,16 @@\n+/*\n+ *  Copyright (C) 2017 Impinj\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License version 2 as\n+ * published by the Free Software Foundation.\n+ */\n+\n+#ifndef __DT_BINDINGS_IMX7_POWER_H__\n+#define __DT_BINDINGS_IMX7_POWER_H__\n+\n+#define IMX7_POWER_DOMAIN_MIPI_PHY\t\t0\n+#define IMX7_POWER_DOMAIN_PCIE_PHY\t\t1\n+#define IMX7_POWER_DOMAIN_USB_HSIC_PHY\t\t2\n+\n+#endif\n",
    "prefixes": [
        "U-Boot",
        "v1",
        "8/9"
    ]
}