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GET /api/patches/902008/?format=api
{ "id": 902008, "url": "http://patchwork.ozlabs.org/api/patches/902008/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20180420155314.8920-2-stefan@agner.ch/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180420155314.8920-2-stefan@agner.ch>", "list_archive_url": null, "date": "2018-04-20T15:53:06", "name": "[U-Boot,v1,1/9] mtd: nand: mxs_nand: move register structs to driver data", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "bd3ea428005f4b59842ada8774d4a972a3f3c451", "submitter": { "id": 4137, "url": "http://patchwork.ozlabs.org/api/people/4137/?format=api", "name": "Stefan Agner", "email": "stefan@agner.ch" }, "delegate": { "id": 1693, "url": "http://patchwork.ozlabs.org/api/users/1693/?format=api", "username": "sbabic", "first_name": "Stefano", "last_name": "Babic", "email": "sbabic@denx.de" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20180420155314.8920-2-stefan@agner.ch/mbox/", "series": [ { "id": 40110, "url": "http://patchwork.ozlabs.org/api/series/40110/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=40110", "date": "2018-04-20T15:53:05", "name": "mtd: nand: mxs_nand: add device tree support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/40110/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/902008/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/902008/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=agner.ch", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tsecure) header.d=agner.ch header.i=@agner.ch header.b=\"TZWxEWTw\";\n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 40SLB06yz1z9s27\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 21 Apr 2018 01:58:32 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid A641EC21C8B; Fri, 20 Apr 2018 15:54:46 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 2E2F7C21DB5;\n\tFri, 20 Apr 2018 15:54:26 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 991A7C21C6A; Fri, 20 Apr 2018 15:54:23 +0000 (UTC)", "from mail.kmu-office.ch (mail.kmu-office.ch [178.209.48.109])\n\tby lists.denx.de (Postfix) with ESMTPS id 523D6C21C27\n\tfor <u-boot@lists.denx.de>; Fri, 20 Apr 2018 15:54:23 +0000 (UTC)", "from trochilidae.toradex.int (unknown [IPv6:2001:1620:c6e:10::3])\n\tby mail.kmu-office.ch (Postfix) with ESMTPSA id BA8505C172D;\n\tFri, 20 Apr 2018 17:54:22 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED,\n\tSPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim;\n\tt=1524239663;\n\th=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n\tto:to:cc:cc:mime-version:content-type:content-transfer-encoding:\n\tin-reply-to:in-reply-to:references:references;\n\tbh=mSDzj2RHhImhPk0LABufzs2m4MguL2t6MvqSsm8O/3M=;\n\tb=TZWxEWTwAX6Usm90FrLDiydWCOmvrUWyoFchOjcsJyr33SeCf2/Bcw2e5XWMRCfTqhcOqi\n\tydzngUCaH3K9uKM8CnWbK0qa3Q+mA/A58c18k4KIvqWq6G13BH/9OfFw0x/6t0QHiwre+a\n\tPhT/PVi5I6Hpp6ZmUMgX6hknvCxIxXQ=", "From": "Stefan Agner <stefan@agner.ch>", "To": "u-boot@lists.denx.de, Stefano Babic <sbabic@denx.de>, oss@buserror.net", "Date": "Fri, 20 Apr 2018 17:53:06 +0200", "Message-Id": "<20180420155314.8920-2-stefan@agner.ch>", "X-Mailer": "git-send-email 2.17.0", "In-Reply-To": "<20180420155314.8920-1-stefan@agner.ch>", "References": "<20180420155314.8920-1-stefan@agner.ch>", "X-Spamd-Result": "default: False [-2.10 / 15.00]; RCVD_TLS_ALL(0.00)[];\n\tASN(0.00)[asn:13030, ipnet:2001:1620::/32, country:CH];\n\tRCVD_COUNT_ZERO(0.00)[0]; FROM_HAS_DN(0.00)[];\n\tMID_CONTAINS_FROM(1.00)[]; TO_DN_SOME(0.00)[];\n\tMIME_GOOD(-0.10)[text/plain]; FROM_EQ_ENVFROM(0.00)[];\n\tTO_MATCH_ENVRCPT_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%];\n\tARC_NA(0.00)[]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_SEVEN(0.00)[10]", "Cc": "marex@denx.de, Stefan Agner <stefan.agner@toradex.com>,\n\tMarcel Ziswiler <marcel.ziswiler@toradex.com>,\n\tMax Krummenacher <max.krummenacher@toradex.com>, han.xu@nxp.com", "Subject": "[U-Boot] [PATCH v1 1/9] mtd: nand: mxs_nand: move register structs\n\tto driver data", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Stefan Agner <stefan.agner@toradex.com>\n\nMove GPMI and BCH register structs to the driver struct mxs_nand_info\nin prepartion for device tree support.\n\nSigned-off-by: Stefan Agner <stefan.agner@toradex.com>\n---\n\n drivers/mtd/nand/mxs_nand.c | 32 +++++++++++++++-----------------\n 1 file changed, 15 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c\nindex 8305bf2302..f619a2f139 100644\n--- a/drivers/mtd/nand/mxs_nand.c\n+++ b/drivers/mtd/nand/mxs_nand.c\n@@ -83,6 +83,9 @@ struct mxs_nand_info {\n \tuint8_t\t\tmarking_block_bad;\n \tuint8_t\t\traw_oob_mode;\n \n+\tstruct mxs_gpmi_regs *gpmi_regs;\n+\tstruct mxs_bch_regs *bch_regs;\n+\n \t/* Functions with altered behaviour */\n \tint\t\t(*hooked_read_oob)(struct mtd_info *mtd,\n \t\t\t\tloff_t from, struct mtd_oob_ops *ops);\n@@ -296,16 +299,15 @@ static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,\n /*\n * Wait for BCH complete IRQ and clear the IRQ\n */\n-static int mxs_nand_wait_for_bch_complete(void)\n+static int mxs_nand_wait_for_bch_complete(struct mxs_nand_info *nand_info)\n {\n-\tstruct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;\n \tint timeout = MXS_NAND_BCH_TIMEOUT;\n \tint ret;\n \n-\tret = mxs_wait_mask_set(&bch_regs->hw_bch_ctrl_reg,\n+\tret = mxs_wait_mask_set(&nand_info->bch_regs->hw_bch_ctrl_reg,\n \t\tBCH_CTRL_COMPLETE_IRQ, timeout);\n \n-\twritel(BCH_CTRL_COMPLETE_IRQ, &bch_regs->hw_bch_ctrl_clr);\n+\twritel(BCH_CTRL_COMPLETE_IRQ, &nand_info->bch_regs->hw_bch_ctrl_clr);\n \n \treturn ret;\n }\n@@ -403,11 +405,9 @@ static int mxs_nand_device_ready(struct mtd_info *mtd)\n {\n \tstruct nand_chip *chip = mtd_to_nand(mtd);\n \tstruct mxs_nand_info *nand_info = nand_get_controller_data(chip);\n-\tstruct mxs_gpmi_regs *gpmi_regs =\n-\t\t(struct mxs_gpmi_regs *)MXS_GPMI_BASE;\n \tuint32_t tmp;\n \n-\ttmp = readl(&gpmi_regs->hw_gpmi_stat);\n+\ttmp = readl(&nand_info->gpmi_regs->hw_gpmi_stat);\n \ttmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip);\n \n \treturn tmp & 1;\n@@ -704,7 +704,7 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,\n \t\tgoto rtn;\n \t}\n \n-\tret = mxs_nand_wait_for_bch_complete();\n+\tret = mxs_nand_wait_for_bch_complete(nand_info);\n \tif (ret) {\n \t\tprintf(\"MXS NAND: BCH read timeout\\n\");\n \t\tgoto rtn;\n@@ -812,7 +812,7 @@ static int mxs_nand_ecc_write_page(struct mtd_info *mtd,\n \t\tgoto rtn;\n \t}\n \n-\tret = mxs_nand_wait_for_bch_complete();\n+\tret = mxs_nand_wait_for_bch_complete(nand_info);\n \tif (ret) {\n \t\tprintf(\"MXS NAND: BCH write timeout\\n\");\n \t\tgoto rtn;\n@@ -1037,7 +1037,7 @@ static int mxs_nand_setup_ecc(struct mtd_info *mtd)\n \tstruct nand_chip *nand = mtd_to_nand(mtd);\n \tstruct mxs_nand_info *nand_info = nand_get_controller_data(nand);\n \tstruct bch_geometry *geo = &nand_info->bch_geometry;\n-\tstruct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;\n+\tstruct mxs_bch_regs *bch_regs = nand_info->bch_regs;\n \tuint32_t tmp;\n \tint ret = -ENOTSUPP;\n \n@@ -1138,10 +1138,6 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)\n */\n int mxs_nand_init(struct mxs_nand_info *info)\n {\n-\tstruct mxs_gpmi_regs *gpmi_regs =\n-\t\t(struct mxs_gpmi_regs *)MXS_GPMI_BASE;\n-\tstruct mxs_bch_regs *bch_regs =\n-\t\t(struct mxs_bch_regs *)MXS_BCH_BASE;\n \tint i = 0, j, ret = 0;\n \n \tinfo->desc = malloc(sizeof(struct mxs_dma_desc *) *\n@@ -1170,14 +1166,14 @@ int mxs_nand_init(struct mxs_nand_info *info)\n \t}\n \n \t/* Reset the GPMI block. */\n-\tmxs_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg);\n-\tmxs_reset_block(&bch_regs->hw_bch_ctrl_reg);\n+\tmxs_reset_block(&info->gpmi_regs->hw_gpmi_ctrl0_reg);\n+\tmxs_reset_block(&info->bch_regs->hw_bch_ctrl_reg);\n \n \t/*\n \t * Choose NAND mode, set IRQ polarity, disable write protection and\n \t * select BCH ECC.\n \t */\n-\tclrsetbits_le32(&gpmi_regs->hw_gpmi_ctrl1,\n+\tclrsetbits_le32(&info->gpmi_regs->hw_gpmi_ctrl1,\n \t\t\tGPMI_CTRL1_GPMI_MODE,\n \t\t\tGPMI_CTRL1_ATA_IRQRDY_POLARITY | GPMI_CTRL1_DEV_RESET |\n \t\t\tGPMI_CTRL1_BCH_MODE);\n@@ -1211,6 +1207,8 @@ void board_nand_init(void)\n \t}\n \tmemset(nand_info, 0, sizeof(struct mxs_nand_info));\n \n+\tnand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;\n+\tnand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;\n \tnand = &nand_info->chip;\n \tmtd = nand_to_mtd(nand);\n \terr = mxs_nand_alloc_buffers(nand_info);\n", "prefixes": [ "U-Boot", "v1", "1/9" ] }