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GET /api/patches/894351/?format=api
{ "id": 894351, "url": "http://patchwork.ozlabs.org/api/patches/894351/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1522695990-31082-3-git-send-email-okaya@codeaurora.org/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1522695990-31082-3-git-send-email-okaya@codeaurora.org>", "list_archive_url": null, "date": "2018-04-02T19:06:25", "name": "[v8,2/7] ixgbe: eliminate duplicate barriers on weakly-ordered archs", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "425a3f1a0706ee59934c2ab1b7353cb6e49d89bf", "submitter": { "id": 67496, "url": "http://patchwork.ozlabs.org/api/people/67496/?format=api", "name": "Sinan Kaya", "email": "okaya@codeaurora.org" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1522695990-31082-3-git-send-email-okaya@codeaurora.org/mbox/", "series": [ { "id": 37041, "url": "http://patchwork.ozlabs.org/api/series/37041/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=37041", "date": "2018-04-02T19:06:25", "name": "[v8,1/7] i40e/i40evf: Eliminate duplicate barriers on weakly-ordered archs", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/37041/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/894351/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/894351/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.137; helo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dmarc=none (p=none dis=none)\n\theader.from=codeaurora.org", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=codeaurora.org header.i=@codeaurora.org\n\theader.b=\"IlQFPYUE\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key)\n\theader.d=codeaurora.org header.i=@codeaurora.org\n\theader.b=\"IlQFPYUE\"; dkim-atps=neutral", "pdx-caf-mail.web.codeaurora.org;\n\tdmarc=none (p=none dis=none) header.from=codeaurora.org", "pdx-caf-mail.web.codeaurora.org;\n\tspf=none smtp.mailfrom=okaya@codeaurora.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 40FMCT0Y9Tz9s1r\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 3 Apr 2018 05:06:44 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 3EA1289564;\n\tMon, 2 Apr 2018 19:06:43 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id eRLhVuhG8HfA; Mon, 2 Apr 2018 19:06:42 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 976ED8955C;\n\tMon, 2 Apr 2018 19:06:42 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 039BF1C066A\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 2 Apr 2018 19:06:42 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 001E789592\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 2 Apr 2018 19:06:42 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id nOBBOj-1dzEI for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 2 Apr 2018 19:06:41 +0000 (UTC)", "from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 57C3189146\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 2 Apr 2018 19:06:39 +0000 (UTC)", "by smtp.codeaurora.org (Postfix, from userid 1000)\n\tid C4D9460F61; Mon, 2 Apr 2018 19:06:39 +0000 (UTC)", "from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com\n\t[129.46.232.65])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\t(Authenticated sender: okaya@smtp.codeaurora.org)\n\tby smtp.codeaurora.org (Postfix) with ESMTPSA id 83BAA60817;\n\tMon, 2 Apr 2018 19:06:38 +0000 (UTC)" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1522695999;\n\tbh=OZOgP/V6Ahpz6TTuC8Dm4qPwjHcis0N8DDJlHP4en5c=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=IlQFPYUEre+wMLkduXD4UhlTCI4uX7hywl523uvRRQCYSiei767BOq/Rl7B4pK6gp\n\tKOZRMWwB4OoepzoxMAgsAFcodO6jKyaogaUedF5YEamR0vpm8dlVNbPnVp+1fOQnKf\n\t6D8LKZmT303EUZ+T8d3Vepi2EwanUb3OxuKiVBcQ=", "v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1522695999;\n\tbh=OZOgP/V6Ahpz6TTuC8Dm4qPwjHcis0N8DDJlHP4en5c=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=IlQFPYUEre+wMLkduXD4UhlTCI4uX7hywl523uvRRQCYSiei767BOq/Rl7B4pK6gp\n\tKOZRMWwB4OoepzoxMAgsAFcodO6jKyaogaUedF5YEamR0vpm8dlVNbPnVp+1fOQnKf\n\t6D8LKZmT303EUZ+T8d3Vepi2EwanUb3OxuKiVBcQ=" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 smtp.codeaurora.org 83BAA60817", "From": "Sinan Kaya <okaya@codeaurora.org>", "To": "jeffrey.t.kirsher@intel.com", "Date": "Mon, 2 Apr 2018 15:06:25 -0400", "Message-Id": "<1522695990-31082-3-git-send-email-okaya@codeaurora.org>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1522695990-31082-1-git-send-email-okaya@codeaurora.org>", "References": "<1522695990-31082-1-git-send-email-okaya@codeaurora.org>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH v8 2/7] ixgbe: eliminate duplicate\n\tbarriers on weakly-ordered archs", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "sulrich@codeaurora.org, netdev@vger.kernel.org, timur@codeaurora.org,\n\tlinux-kernel@vger.kernel.org, Sinan Kaya <okaya@codeaurora.org>,\n\tintel-wired-lan@lists.osuosl.org, linux-arm-msm@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "memory-barriers.txt has been updated as follows:\n\n\"When using writel(), a prior wmb() is not needed to guarantee that the\ncache coherent memory writes have completed before writing to the MMIO\nregion.\"\n\nRemove old IA-64 comments in the code along with unneeded wmb() in front\nof writel().\n\nThere are places in the code where wmb() has been used as a double barrier\nfor CPU and IO in place of smp_wmb() and wmb() as an optimization. For\nsuch places, keep the wmb() but replace the following writel() with\nwritel_relaxed() to have a sequence as\n\nwmb()\nwritel_relaxed()\nmmio_wb()\n\nSigned-off-by: Sinan Kaya <okaya@codeaurora.org>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 23 ++---------------------\n 1 file changed, 2 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex afadba9..c17924b 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -1696,12 +1696,6 @@ void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)\n \t\t/* update next to alloc since we have filled the ring */\n \t\trx_ring->next_to_alloc = i;\n \n-\t\t/* Force memory writes to complete before letting h/w\n-\t\t * know there are new descriptors to fetch. (Only\n-\t\t * applicable for weak-ordered memory model archs,\n-\t\t * such as IA-64).\n-\t\t */\n-\t\twmb();\n \t\twritel(i, rx_ring->tail);\n \t}\n }\n@@ -2467,10 +2461,6 @@ static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,\n \tif (xdp_xmit) {\n \t\tstruct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];\n \n-\t\t/* Force memory writes to complete before letting h/w\n-\t\t * know there are new descriptors to fetch.\n-\t\t */\n-\t\twmb();\n \t\twritel(ring->next_to_use, ring->tail);\n \n \t\txdp_do_flush_map();\n@@ -8080,12 +8070,7 @@ static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,\n \t/* set the timestamp */\n \tfirst->time_stamp = jiffies;\n \n-\t/*\n-\t * Force memory writes to complete before letting h/w know there\n-\t * are new descriptors to fetch. (Only applicable for weak-ordered\n-\t * memory model archs, such as IA-64).\n-\t *\n-\t * We also need this memory barrier to make certain all of the\n+\t/* We need this memory barrier to make certain all of the\n \t * status bits have been updated before next_to_watch is written.\n \t */\n \twmb();\n@@ -8102,7 +8087,7 @@ static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,\n \tixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);\n \n \tif (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {\n-\t\twritel(i, tx_ring->tail);\n+\t\twritel_relaxed(i, tx_ring->tail);\n \n \t\t/* we need this if more than one processor can write to our tail\n \t\t * at a time, it synchronizes IO on IA64/Altix systems\n@@ -10034,10 +10019,6 @@ static void ixgbe_xdp_flush(struct net_device *dev)\n \tif (unlikely(!ring))\n \t\treturn;\n \n-\t/* Force memory writes to complete before letting h/w know there\n-\t * are new descriptors to fetch.\n-\t */\n-\twmb();\n \twritel(ring->next_to_use, ring->tail);\n \n \treturn;\n", "prefixes": [ "v8", "2/7" ] }