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GET /api/patches/870763/?format=api
{ "id": 870763, "url": "http://patchwork.ozlabs.org/api/patches/870763/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20180208064714.6042-3-bpoirier@suse.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180208064714.6042-3-bpoirier@suse.com>", "list_archive_url": null, "date": "2018-02-08T06:47:14", "name": "[net-queue,3/3] e1000e: Avoid missed interrupts following ICR read.", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "4f87967a4faa45b76d1ac858ec3088634279ae74", "submitter": { "id": 67008, "url": "http://patchwork.ozlabs.org/api/people/67008/?format=api", "name": "Benjamin Poirier", "email": "bpoirier@suse.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20180208064714.6042-3-bpoirier@suse.com/mbox/", "series": [ { "id": 27517, "url": "http://patchwork.ozlabs.org/api/series/27517/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=27517", "date": "2018-02-08T06:47:12", "name": "[net-queue,1/3] Partial revert \"e1000e: Avoid receiver overrun interrupt bursts\"", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/27517/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/870763/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/870763/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3zcTK11BSjz9sRW\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 8 Feb 2018 17:47:32 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 7DEED2F80A;\n\tThu, 8 Feb 2018 06:47:31 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 7S6WpmU1cwKB; Thu, 8 Feb 2018 06:47:29 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id A8C202F74C;\n\tThu, 8 Feb 2018 06:47:29 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 27F781C0916\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 8 Feb 2018 06:47:28 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 2413186BC4\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 8 Feb 2018 06:47:28 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id dTXJWWkOhzox for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 8 Feb 2018 06:47:27 +0000 (UTC)", "from mx2.suse.de (mx2.suse.de [195.135.220.15])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id 3D0D486A54\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 8 Feb 2018 06:47:27 +0000 (UTC)", "from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254])\n\tby mx2.suse.de (Postfix) with ESMTP id B8D8BAE22;\n\tThu, 8 Feb 2018 06:47:25 +0000 (UTC)" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org", "by amavisd-new at test-mx.suse.de" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "From": "Benjamin Poirier <bpoirier@suse.com>", "To": "Jeff Kirsher <jeffrey.t.kirsher@intel.com>", "Date": "Thu, 8 Feb 2018 15:47:14 +0900", "Message-Id": "<20180208064714.6042-3-bpoirier@suse.com>", "X-Mailer": "git-send-email 2.16.1", "In-Reply-To": "<20180208064714.6042-1-bpoirier@suse.com>", "References": "<20180208064714.6042-1-bpoirier@suse.com>", "Subject": "[Intel-wired-lan] [PATCH net-queue 3/3] e1000e: Avoid missed\n\tinterrupts following ICR read.", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "netdev@vger.kernel.org, intel-wired-lan@lists.osuosl.org,\n\tlinux-kernel@vger.kernel.org", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "The 82574 specification update errata 12 states that interrupts may be\nmissed if ICR is read while INT_ASSERTED is not set. Avoid that problem by\nsetting all bits related to events that can trigger the Other interrupt in\nIMS.\n\nThe Other interrupt is raised for such events regardless of whether or not\nthey are set in IMS. However, only when they are set is the INT_ASSERTED\nbit also set in ICR.\n\nBy doing this, we ensure that INT_ASSERTED is always set when we read ICR\nin e1000_msix_other() and steer clear of the errata. This also ensures that\nICR will automatically be cleared on read, therefore we no longer need to\nclear bits explicitly.\n\nSigned-off-by: Benjamin Poirier <bpoirier@suse.com>\n---\n drivers/net/ethernet/intel/e1000e/defines.h | 21 ++++++++++++++++++++-\n drivers/net/ethernet/intel/e1000e/netdev.c | 11 ++++-------\n 2 files changed, 24 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h\nindex afb7ebe20b24..824fd44e25f0 100644\n--- a/drivers/net/ethernet/intel/e1000e/defines.h\n+++ b/drivers/net/ethernet/intel/e1000e/defines.h\n@@ -400,6 +400,10 @@\n #define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */\n #define E1000_ICR_RXO 0x00000040 /* Receiver Overrun */\n #define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */\n+#define E1000_ICR_MDAC 0x00000200 /* MDIO Access Complete */\n+#define E1000_ICR_SRPD 0x00010000 /* Small Receive Packet Detected */\n+#define E1000_ICR_ACK 0x00020000 /* Receive ACK Frame Detected */\n+#define E1000_ICR_MNG 0x00040000 /* Manageability Event Detected */\n #define E1000_ICR_ECCER 0x00400000 /* Uncorrectable ECC Error */\n /* If this bit asserted, the driver should claim the interrupt */\n #define E1000_ICR_INT_ASSERTED\t0x80000000\n@@ -407,7 +411,7 @@\n #define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */\n #define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */\n #define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */\n-#define E1000_ICR_OTHER 0x01000000 /* Other Interrupts */\n+#define E1000_ICR_OTHER 0x01000000 /* Other Interrupt */\n \n /* PBA ECC Register */\n #define E1000_PBA_ECC_COUNTER_MASK 0xFFF00000 /* ECC counter mask */\n@@ -431,12 +435,27 @@\n \tE1000_IMS_RXSEQ | \\\n \tE1000_IMS_LSC)\n \n+/* These are all of the events related to the OTHER interrupt.\n+ */\n+#define IMS_OTHER_MASK ( \\\n+\tE1000_IMS_LSC | \\\n+\tE1000_IMS_RXO | \\\n+\tE1000_IMS_MDAC | \\\n+\tE1000_IMS_SRPD | \\\n+\tE1000_IMS_ACK | \\\n+\tE1000_IMS_MNG)\n+\n /* Interrupt Mask Set */\n #define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */\n #define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */\n #define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */\n #define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */\n+#define E1000_IMS_RXO E1000_ICR_RXO /* Receiver Overrun */\n #define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */\n+#define E1000_IMS_MDAC E1000_ICR_MDAC /* MDIO Access Complete */\n+#define E1000_IMS_SRPD E1000_ICR_SRPD /* Small Receive Packet */\n+#define E1000_IMS_ACK E1000_ICR_ACK /* Receive ACK Frame Detected */\n+#define E1000_IMS_MNG E1000_ICR_MNG /* Manageability Event */\n #define E1000_IMS_ECCER E1000_ICR_ECCER /* Uncorrectable ECC Error */\n #define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */\n #define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */\ndiff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c\nindex 2c9609bee2ae..9fd4050a91ca 100644\n--- a/drivers/net/ethernet/intel/e1000e/netdev.c\n+++ b/drivers/net/ethernet/intel/e1000e/netdev.c\n@@ -1914,16 +1914,12 @@ static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)\n \tstruct net_device *netdev = data;\n \tstruct e1000_adapter *adapter = netdev_priv(netdev);\n \tstruct e1000_hw *hw = &adapter->hw;\n-\tu32 icr;\n-\n-\ticr = er32(ICR);\n-\tew32(ICR, E1000_ICR_OTHER);\n+\tu32 icr = er32(ICR);\n \n \tif (icr & adapter->eiac_mask)\n \t\tew32(ICS, (icr & adapter->eiac_mask));\n \n \tif (icr & E1000_ICR_LSC) {\n-\t\tew32(ICR, E1000_ICR_LSC);\n \t\thw->mac.get_link_status = true;\n \t\t/* guard against interrupt when we're going down */\n \t\tif (!test_bit(__E1000_DOWN, &adapter->state))\n@@ -1931,7 +1927,7 @@ static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)\n \t}\n \n \tif (!test_bit(__E1000_DOWN, &adapter->state))\n-\t\tew32(IMS, E1000_IMS_OTHER);\n+\t\tew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);\n \n \treturn IRQ_HANDLED;\n }\n@@ -2258,7 +2254,8 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)\n \n \tif (adapter->msix_entries) {\n \t\tew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);\n-\t\tew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);\n+\t\tew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |\n+\t\t IMS_OTHER_MASK);\n \t} else if (hw->mac.type >= e1000_pch_lpt) {\n \t\tew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);\n \t} else {\n", "prefixes": [ "net-queue", "3/3" ] }