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GET /api/patches/856671/?format=api
{ "id": 856671, "url": "http://patchwork.ozlabs.org/api/patches/856671/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20180108024558.17983-23-f4bug@amsat.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20180108024558.17983-23-f4bug@amsat.org>", "list_archive_url": null, "date": "2018-01-08T02:45:51", "name": "[22/29] piix3: extract piix3_init() from i440fx_init()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "01106cb414291a3f728a05f114d293506b17761e", "submitter": { "id": 70924, "url": "http://patchwork.ozlabs.org/api/people/70924/?format=api", "name": "Philippe Mathieu-Daudé", "email": "f4bug@amsat.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20180108024558.17983-23-f4bug@amsat.org/mbox/", "series": [ { "id": 21847, "url": "http://patchwork.ozlabs.org/api/series/21847/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=21847", "date": "2018-01-08T02:45:30", "name": "remove i386/pc dependency: generic SuperIO, PIIX cleanup", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/21847/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/856671/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/856671/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"tEJiJhGy\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3zFKbC2gmrz9ryr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 8 Jan 2018 13:53:27 +1100 (AEDT)", "from localhost ([::1]:59380 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1eYNYz-0003ch-Dh\n\tfor incoming@patchwork.ozlabs.org; Sun, 07 Jan 2018 21:53:25 -0500", "from eggs.gnu.org ([2001:4830:134:3::10]:51693)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <philippe.mathieu.daude@gmail.com>)\n\tid 1eYNTC-0007VJ-6g\n\tfor qemu-devel@nongnu.org; Sun, 07 Jan 2018 21:47:27 -0500", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <philippe.mathieu.daude@gmail.com>)\n\tid 1eYNTB-0003AU-9v\n\tfor qemu-devel@nongnu.org; Sun, 07 Jan 2018 21:47:26 -0500", "from mail-qt0-x242.google.com ([2607:f8b0:400d:c0d::242]:41726)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <philippe.mathieu.daude@gmail.com>)\n\tid 1eYNTB-0003AA-50\n\tfor qemu-devel@nongnu.org; Sun, 07 Jan 2018 21:47:25 -0500", "by mail-qt0-x242.google.com with SMTP id i40so12057254qti.8\n\tfor <qemu-devel@nongnu.org>; Sun, 07 Jan 2018 18:47:24 -0800 (PST)", "from x1.local ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id\n\td10sm7156245qkg.16.2018.01.07.18.47.21\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSun, 07 Jan 2018 18:47:24 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=PPA/A1gVNYwsrQhN89Facs2FeGYi8DTMHXHNVDmaTSk=;\n\tb=tEJiJhGy61d+J7TSRbgleKKji9Q3KfKCqn9jW3jZrCwVXf23ZJO9QawSRDnkoumn6R\n\tA1yJlO77Eidqi55RTvLdSMBQFRecN0rjuB2sn8L9c9Ay/t6ky97Omlw/OBlF7sqvodVT\n\t696Iu4Ehwc055Mq6h8LSrOf/yry7g4RfXI+AWDzPEBSBE/CYkBXPqXeLsiwl2GSeE8V2\n\tIjhBijXCqpDyX2Ew+LTUdSBgxCBUg8zyMvUFCO8rdFRAJ3YxrFSy0FvPgIrxNzb0R8T7\n\tiiGEt09B2uuO0tPghG770RmXQaYvin6Nw7oUagwbQsgpyzd4Xsxtx9Kl5Y7RB3KlRWAe\n\t5D8w==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references:mime-version:content-transfer-encoding;\n\tbh=PPA/A1gVNYwsrQhN89Facs2FeGYi8DTMHXHNVDmaTSk=;\n\tb=EDcm3zbiZg9iDZG2ze22s1jQFZe+f6tJUyq4ywLrHSTj8Qq7j/yUadHLacD9yeVykg\n\tedu1NbvUVbw9X7W/yw8C5/RopdriIl9x547o4QZgJt1V4bsBd1A5e6QlZABBirWGfVjy\n\tiKh0/zJ2fPIRDFAEDESYKduUbhtEICbewhSb74SyM5tcXBci+oKuGefc+EPLhrVFwAMQ\n\tbbdi+cQJenZSP2JGsTxwi2wQikiEWfGyLqeN/uFvsJtin2BW8FRhgX3WLV8bEgb1gWTl\n\t5YzMstwFq7LOzr0gH0noc5izwb3S9yfh6ZIH0gGmeDVNbBJEwyjRpI+LBsXNOnBHnW2C\n\tcDUQ==", "X-Gm-Message-State": "AKwxytc/k93VjErqtcQOEmSVL2WVw2j93za8fBW9HxCyL9uOPmLkdtzy\n\tcunRGzeFbqWl8QSuWOnFhHtgYWXj", "X-Google-Smtp-Source": "ACJfBotMW138HztQgKaqqseIZAKDfXrRCWenmGYd8vyNE2xm51dY6nTU8R3uFm405eh4oz7dHeDsfg==", "X-Received": "by 10.200.24.197 with SMTP id o5mr14274667qtk.79.1515379644545; \n\tSun, 07 Jan 2018 18:47:24 -0800 (PST)", "From": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>", "To": "Paolo Bonzini <pbonzini@redhat.com>,\n\t\"Michael S. Tsirkin\" <mst@redhat.com>, =?utf-8?q?Herv=C3=A9_Poussinea?=\n\t=?utf-8?q?u?= <hpoussin@reactos.org>,\n\tAurelien Jarno <aurelien@aurel32.net>, Eduardo Habkost\n\t<ehabkost@redhat.com>, Marcel Apfelbaum <marcel@redhat.com>", "Date": "Sun, 7 Jan 2018 23:45:51 -0300", "Message-Id": "<20180108024558.17983-23-f4bug@amsat.org>", "X-Mailer": "git-send-email 2.15.1", "In-Reply-To": "<20180108024558.17983-1-f4bug@amsat.org>", "References": "<20180108024558.17983-1-f4bug@amsat.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400d:c0d::242", "Subject": "[Qemu-devel] [PATCH 22/29] piix3: extract piix3_init() from\n\ti440fx_init()", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Igor Mammedov <imammedo@redhat.com>, =?utf-8?q?Philippe_Mathieu-Daud?=\n\t=?utf-8?b?w6k=?= <f4bug@amsat.org>, \tqemu-devel@nongnu.org", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\n---\n include/hw/southbridge/i82371_piix.h | 4 +++\n hw/pci-host/piix.c | 62 ++++++++++++++++++++----------------\n 2 files changed, 38 insertions(+), 28 deletions(-)", "diff": "diff --git a/include/hw/southbridge/i82371_piix.h b/include/hw/southbridge/i82371_piix.h\nindex 8a5f9a7596..00a9f4d5b9 100644\n--- a/include/hw/southbridge/i82371_piix.h\n+++ b/include/hw/southbridge/i82371_piix.h\n@@ -22,6 +22,10 @@\n */\n #define RCR_IOPORT 0xcf9\n \n+/* piix.c */\n+PCIDevice *piix3_init(PCIBus *bus, ISABus **isa_bus,\n+ qemu_irq *pic, int *piix3_devfn);\n+\n /* piix4.c */\n extern PCIDevice *piix4_dev;\n \ndiff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c\nindex 0bd22fa33a..6e8cea8372 100644\n--- a/hw/pci-host/piix.c\n+++ b/hw/pci-host/piix.c\n@@ -27,6 +27,7 @@\n #include \"hw/i386/pc.h\"\n #include \"hw/pci/pci.h\"\n #include \"hw/pci/pci_host.h\"\n+#include \"hw/southbridge/i82371_piix.h\"\n #include \"hw/isa/isa.h\"\n #include \"hw/sysbus.h\"\n #include \"qapi/error.h\"\n@@ -120,11 +121,6 @@ struct PCII440FXState {\n */\n #define I440FX_COREBOOT_RAM_SIZE 0x57\n \n-static void piix3_set_irq(void *opaque, int pirq, int level);\n-static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pci_intx);\n-static void piix3_write_config_xen(PCIDevice *dev,\n- uint32_t address, uint32_t val, int len);\n-\n /* return the global irq number corresponding to a given device irq\n pin. We could also use the bus number to have a more precise\n mapping. */\n@@ -353,7 +349,6 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,\n PCIBus *b;\n PCIDevice *d;\n PCIHostState *s;\n- PIIX3State *piix3;\n PCII440FXState *f;\n unsigned i;\n I440FXState *i440fx;\n@@ -406,28 +401,7 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,\n PAM_EXPAN_SIZE);\n }\n \n- /* Xen supports additional interrupt routes from the PCI devices to\n- * the IOAPIC: the four pins of each PCI device on the bus are also\n- * connected to the IOAPIC directly.\n- * These additional routes can be discovered through ACPI. */\n- if (xen_enabled()) {\n- PCIDevice *pci_dev = pci_create_simple_multifunction(b,\n- -1, true, \"PIIX3-xen\");\n- piix3 = PIIX3_PCI_DEVICE(pci_dev);\n- pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq,\n- piix3, XEN_PIIX_NUM_PIRQS);\n- } else {\n- PCIDevice *pci_dev = pci_create_simple_multifunction(b,\n- -1, true, \"PIIX3\");\n- piix3 = PIIX3_PCI_DEVICE(pci_dev);\n- pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3,\n- PIIX_NUM_PIRQS);\n- pci_bus_set_route_irq_fn(b, piix3_route_intx_pin_to_irq);\n- }\n- piix3->pic = pic;\n- *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), \"isa.0\"));\n-\n- *piix3_devfn = piix3->dev.devfn;\n+ piix3_init(b, isa_bus, pic, piix3_devfn);\n \n ram_size = ram_size / 8 / 1024 / 1024;\n if (ram_size > 255) {\n@@ -508,6 +482,38 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin)\n return route;\n }\n \n+PCIDevice *piix3_init(PCIBus *bus, ISABus **isa_bus,\n+ qemu_irq *pic, int *piix3_devfn)\n+{\n+ PCIDevice *pci_dev;\n+ PIIX3State *piix3;\n+\n+ /* Xen supports additional interrupt routes from the PCI devices to\n+ * the IOAPIC: the four pins of each PCI device on the bus are also\n+ * connected to the IOAPIC directly.\n+ * These additional routes can be discovered through ACPI. */\n+ if (xen_enabled()) {\n+ pci_dev = pci_create_simple_multifunction(bus,\n+ -1, true, \"PIIX3-xen\");\n+ piix3 = PIIX3_PCI_DEVICE(pci_dev);\n+ pci_bus_irqs(bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,\n+ piix3, XEN_PIIX_NUM_PIRQS);\n+ } else {\n+ pci_dev = pci_create_simple_multifunction(bus,\n+ -1, true, \"PIIX3\");\n+ piix3 = PIIX3_PCI_DEVICE(pci_dev);\n+ pci_bus_irqs(bus, piix3_set_irq, pci_slot_get_pirq, piix3,\n+ PIIX_NUM_PIRQS);\n+ pci_bus_set_route_irq_fn(bus, piix3_route_intx_pin_to_irq);\n+ }\n+ piix3->pic = pic;\n+ *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), \"isa.0\"));\n+\n+ *piix3_devfn = piix3->dev.devfn;\n+\n+ return pci_dev;\n+}\n+\n /* irq routing is changed. so rebuild bitmap */\n static void piix3_update_irq_levels(PIIX3State *piix3)\n {\n", "prefixes": [ "22/29" ] }