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GET /api/patches/854009/?format=api
{ "id": 854009, "url": "http://patchwork.ozlabs.org/api/patches/854009/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20171229135044.14551-1-alice.michael@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20171229135044.14551-1-alice.michael@intel.com>", "list_archive_url": null, "date": "2017-12-29T13:50:44", "name": "[next,S85-V1,09/14] i40e/i40evf: Clean-up of bits related to using q_vector->reg_idx", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "0457589b99019e688f01e34ec1e2c77a99a8aba9", "submitter": { "id": 71123, "url": "http://patchwork.ozlabs.org/api/people/71123/?format=api", "name": "Michael, Alice", "email": "alice.michael@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20171229135044.14551-1-alice.michael@intel.com/mbox/", "series": [ { "id": 20665, "url": "http://patchwork.ozlabs.org/api/series/20665/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=20665", "date": "2017-12-29T13:48:33", "name": "[next,S85-V1,01/14] i40e: fix typo in function description", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/20665/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/854009/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/854009/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3z7gSB16GSz9s7G\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 30 Dec 2017 08:57:45 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 5562F292AC;\n\tFri, 29 Dec 2017 21:57:44 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id cueZ8Nz2SJbf; Fri, 29 Dec 2017 21:57:41 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id EBDB8292AA;\n\tFri, 29 Dec 2017 21:57:41 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 4ECF91C0180\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 29 Dec 2017 21:57:41 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 4B8658769B\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 29 Dec 2017 21:57:41 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id qTZ2OIOd4naH for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 29 Dec 2017 21:57:40 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id BDA7987691\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 29 Dec 2017 21:57:40 +0000 (UTC)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Dec 2017 13:57:40 -0800", "from alicemic-2.jf.intel.com ([10.166.16.121])\n\tby orsmga003.jf.intel.com with ESMTP; 29 Dec 2017 13:57:40 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.45,478,1508828400\"; d=\"scan'208\";a=\"16049140\"", "From": "Alice Michael <alice.michael@intel.com>", "To": "alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org", "Date": "Fri, 29 Dec 2017 08:50:44 -0500", "Message-Id": "<20171229135044.14551-1-alice.michael@intel.com>", "X-Mailer": "git-send-email 2.9.5", "Subject": "[Intel-wired-lan] [next PATCH S85-V1 09/14] i40e/i40evf: Clean-up\n\tof bits related to using q_vector->reg_idx", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Alexander Duyck <alexander.h.duyck@intel.com>\n\nThis patch is a further clean-up related to the change over to using\nq_vector->reg_idx when accessing the ITR registers. Specifically the code\nappears to have several other spots where we were computing the register\noffset manually and this resulted in errors in a few spots.\n\nSpecifically in the i40evf functions for mapping queues to vectors it\nappears we may have had an off by 1 error since (v_idx - 1) for the first\nq_vector with an index of 0 would result in us returning -1 if I am not\nmistaken.\n\nSigned-off-by: Alexander Duyck <alexander.h.duyck@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 12 ++++++------\n drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c | 12 +++++-------\n drivers/net/ethernet/intel/i40evf/i40evf_main.c | 6 ++++--\n 3 files changed, 15 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\nindex 5b18e20..1607e5a 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n@@ -2311,7 +2311,7 @@ static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,\n \tstruct i40e_pf *pf = vsi->back;\n \tstruct i40e_hw *hw = &pf->hw;\n \tstruct i40e_q_vector *q_vector;\n-\tu16 vector, intrl;\n+\tu16 intrl;\n \n \tintrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);\n \n@@ -2330,15 +2330,15 @@ static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,\n \n \tq_vector = rx_ring->q_vector;\n \tq_vector->rx.itr = ITR_TO_REG(rx_ring->itr_setting);\n-\tvector = vsi->base_vector + q_vector->v_idx;\n-\twr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr);\n+\twr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, q_vector->reg_idx),\n+\t q_vector->rx.itr);\n \n \tq_vector = tx_ring->q_vector;\n \tq_vector->tx.itr = ITR_TO_REG(tx_ring->itr_setting);\n-\tvector = vsi->base_vector + q_vector->v_idx;\n-\twr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr);\n+\twr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, q_vector->reg_idx),\n+\t q_vector->tx.itr);\n \n-\twr32(hw, I40E_PFINT_RATEN(vector - 1), intrl);\n+\twr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);\n \ti40e_flush(hw);\n }\n \ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c b/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c\nindex 11dfdc8..ed5b8ec 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c\n@@ -502,7 +502,7 @@ static int i40evf_get_per_queue_coalesce(struct net_device *netdev,\n \n /**\n * i40evf_set_itr_per_queue - set ITR values for specific queue\n- * @vsi: the VSI to set values for\n+ * @adapter: the VF adapter struct to set values for\n * @ec: coalesce settings from ethtool\n * @queue: the queue to modify\n *\n@@ -514,10 +514,8 @@ static void i40evf_set_itr_per_queue(struct i40evf_adapter *adapter,\n {\n \tstruct i40e_ring *rx_ring = &adapter->rx_rings[queue];\n \tstruct i40e_ring *tx_ring = &adapter->tx_rings[queue];\n-\tstruct i40e_vsi *vsi = &adapter->vsi;\n \tstruct i40e_hw *hw = &adapter->hw;\n \tstruct i40e_q_vector *q_vector;\n-\tu16 vector;\n \n \trx_ring->itr_setting = ec->rx_coalesce_usecs;\n \ttx_ring->itr_setting = ec->tx_coalesce_usecs;\n@@ -532,13 +530,13 @@ static void i40evf_set_itr_per_queue(struct i40evf_adapter *adapter,\n \n \tq_vector = rx_ring->q_vector;\n \tq_vector->rx.itr = ITR_TO_REG(rx_ring->itr_setting);\n-\tvector = vsi->base_vector + q_vector->v_idx;\n-\twr32(hw, I40E_VFINT_ITRN1(I40E_RX_ITR, vector - 1), q_vector->rx.itr);\n+\twr32(hw, I40E_VFINT_ITRN1(I40E_RX_ITR, q_vector->reg_idx),\n+\t q_vector->rx.itr);\n \n \tq_vector = tx_ring->q_vector;\n \tq_vector->tx.itr = ITR_TO_REG(tx_ring->itr_setting);\n-\tvector = vsi->base_vector + q_vector->v_idx;\n-\twr32(hw, I40E_VFINT_ITRN1(I40E_TX_ITR, vector - 1), q_vector->tx.itr);\n+\twr32(hw, I40E_VFINT_ITRN1(I40E_TX_ITR, q_vector->reg_idx),\n+\t q_vector->tx.itr);\n \n \ti40e_flush(hw);\n }\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf_main.c b/drivers/net/ethernet/intel/i40evf/i40evf_main.c\nindex a5fb540..f648e5e 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf_main.c\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf_main.c\n@@ -357,7 +357,8 @@ i40evf_map_vector_to_rxq(struct i40evf_adapter *adapter, int v_idx, int r_idx)\n \tq_vector->rx.itr = ITR_TO_REG(rx_ring->itr_setting);\n \tq_vector->ring_mask |= BIT(r_idx);\n \tq_vector->itr_countdown = ITR_COUNTDOWN_START;\n-\twr32(hw, I40E_VFINT_ITRN1(I40E_RX_ITR, v_idx - 1), q_vector->rx.itr);\n+\twr32(hw, I40E_VFINT_ITRN1(I40E_RX_ITR, q_vector->reg_idx),\n+\t q_vector->rx.itr);\n }\n \n /**\n@@ -382,7 +383,8 @@ i40evf_map_vector_to_txq(struct i40evf_adapter *adapter, int v_idx, int t_idx)\n \tq_vector->tx.itr = ITR_TO_REG(tx_ring->itr_setting);\n \tq_vector->itr_countdown = ITR_COUNTDOWN_START;\n \tq_vector->num_ringpairs++;\n-\twr32(hw, I40E_VFINT_ITRN1(I40E_TX_ITR, v_idx - 1), q_vector->tx.itr);\n+\twr32(hw, I40E_VFINT_ITRN1(I40E_TX_ITR, q_vector->reg_idx),\n+\t q_vector->tx.itr);\n }\n \n /**\n", "prefixes": [ "next", "S85-V1", "09/14" ] }