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GET /api/patches/850287/?format=api
{ "id": 850287, "url": "http://patchwork.ozlabs.org/api/patches/850287/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20171218101444.75630-1-alice.michael@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20171218101444.75630-1-alice.michael@intel.com>", "list_archive_url": null, "date": "2017-12-18T10:14:44", "name": "[next,S83-V5,1/9] i40e/i40evf: Enable NVMUpdate to retrieve AdminQ and add preservation flags for NVM update", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "84f4650322995632b1fed9e98afacade41f91ccf", "submitter": { "id": 71123, "url": "http://patchwork.ozlabs.org/api/people/71123/?format=api", "name": "Michael, Alice", "email": "alice.michael@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20171218101444.75630-1-alice.michael@intel.com/mbox/", "series": [ { "id": 19211, "url": "http://patchwork.ozlabs.org/api/series/19211/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=19211", "date": "2017-12-18T10:14:44", "name": "[next,S83-V5,1/9] i40e/i40evf: Enable NVMUpdate to retrieve AdminQ and add preservation flags for NVM update", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/19211/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/850287/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/850287/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.133; helo=hemlock.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3z0q9v0Tq7z9sNr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 19 Dec 2017 05:21:38 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 8DFCF88190;\n\tMon, 18 Dec 2017 18:21:36 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 3juJ3gvO-bpK; Mon, 18 Dec 2017 18:21:33 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id C75B28819C;\n\tMon, 18 Dec 2017 18:21:33 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 15DB31C1EA1\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 18 Dec 2017 18:21:33 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 0F41E230F6\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 18 Dec 2017 18:21:33 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id hrwEKZvukGi3 for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 18 Dec 2017 18:21:31 +0000 (UTC)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby silver.osuosl.org (Postfix) with ESMTPS id D575D22F55\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 18 Dec 2017 18:21:31 +0000 (UTC)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t18 Dec 2017 10:21:31 -0800", "from unknown (HELO localhost.jf.intel.com) ([10.166.16.121])\n\tby fmsmga004.fm.intel.com with ESMTP; 18 Dec 2017 10:21:31 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.45,422,1508828400\"; d=\"scan'208\";a=\"13666200\"", "From": "Alice Michael <alice.michael@intel.com>", "To": "alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org", "Date": "Mon, 18 Dec 2017 05:14:44 -0500", "Message-Id": "<20171218101444.75630-1-alice.michael@intel.com>", "X-Mailer": "git-send-email 2.9.5", "Subject": "[Intel-wired-lan] [next PATCH S83-V5 1/9] i40e/i40evf: Enable\n\tNVMUpdate to retrieve AdminQ and add preservation flags for NVM\n\tupdate", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "Pawel Jablonski <pawel.jablonski@intel.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Pawel Jablonski <pawel.jablonski@intel.com>\n\nThis patch adds new I40E_NVMUPD_GET_AQ_EVENT state to allow\nretrieval of AdminQ events as a result of AdminQ commands sent\nto firmware.\n\nAdd preservation flags support on X722 devices for NVM update\nAdminQ function wrapper. Add new parameter and handling to nvm\nupdate admin queue function intended to allow nvmupdate tool to\nconfigure the preservation flags in the AdminQ command.\n\nThis is required to implement FlatNVM on X722 devices.\n\nSigned-off-by: Pawel Jablonski <pawel.jablonski@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e_adminq.c | 2 +-\n drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h | 8 +-\n drivers/net/ethernet/intel/i40e/i40e_common.c | 13 +-\n drivers/net/ethernet/intel/i40e/i40e_main.c | 2 +-\n drivers/net/ethernet/intel/i40e/i40e_nvm.c | 141 ++++++++++++++++-----\n drivers/net/ethernet/intel/i40e/i40e_prototype.h | 6 +-\n drivers/net/ethernet/intel/i40e/i40e_type.h | 26 ++--\n .../net/ethernet/intel/i40evf/i40e_adminq_cmd.h | 8 +-\n drivers/net/ethernet/intel/i40evf/i40e_type.h | 26 ++--\n 9 files changed, 173 insertions(+), 59 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c\nindex 9af7425..d9670cd 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c\n@@ -1027,7 +1027,7 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw,\n \thw->aq.arq.next_to_clean = ntc;\n \thw->aq.arq.next_to_use = ntu;\n \n-\ti40e_nvmupd_check_wait_event(hw, le16_to_cpu(e->desc.opcode));\n+\ti40e_nvmupd_check_wait_event(hw, le16_to_cpu(e->desc.opcode), &e->desc);\n clean_arq_element_out:\n \t/* Set pending if needed, unlock and return */\n \tif (pending)\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\nindex c577634..0d471b0 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n@@ -2231,8 +2231,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_phy_register_access);\n */\n struct i40e_aqc_nvm_update {\n \tu8\tcommand_flags;\n-#define I40E_AQ_NVM_LAST_CMD\t0x01\n-#define I40E_AQ_NVM_FLASH_ONLY\t0x80\n+#define I40E_AQ_NVM_LAST_CMD\t\t\t0x01\n+#define I40E_AQ_NVM_FLASH_ONLY\t\t\t0x80\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT\t1\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_MASK\t0x03\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED\t0x03\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_ALL\t0x01\n \tu8\tmodule_pointer;\n \t__le16\tlength;\n \t__le32\toffset;\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c\nindex 40c5f76..cf929cc 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_common.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c\n@@ -3465,13 +3465,14 @@ i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,\n * @length: length of the section to be written (in bytes from the offset)\n * @data: command buffer (size [bytes] = length)\n * @last_command: tells if this is the last command in a series\n+ * @preservation_flags: Preservation mode flags\n * @cmd_details: pointer to command details structure or NULL\n *\n * Update the NVM using the admin queue commands\n **/\n i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,\n \t\t\t u32 offset, u16 length, void *data,\n-\t\t\t bool last_command,\n+\t\t\t\tbool last_command, u8 preservation_flags,\n \t\t\t struct i40e_asq_cmd_details *cmd_details)\n {\n \tstruct i40e_aq_desc desc;\n@@ -3490,6 +3491,16 @@ i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,\n \t/* If this is the last command in a series, set the proper flag. */\n \tif (last_command)\n \t\tcmd->command_flags |= I40E_AQ_NVM_LAST_CMD;\n+\tif (hw->mac.type == I40E_MAC_X722) {\n+\t\tif (preservation_flags == I40E_NVM_PRESERVATION_FLAGS_SELECTED)\n+\t\t\tcmd->command_flags |=\n+\t\t\t\t(I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED <<\n+\t\t\t\t I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT);\n+\t\telse if (preservation_flags == I40E_NVM_PRESERVATION_FLAGS_ALL)\n+\t\t\tcmd->command_flags |=\n+\t\t\t\t(I40E_AQ_NVM_PRESERVATION_FLAGS_ALL <<\n+\t\t\t\t I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT);\n+\t}\n \tcmd->module_pointer = module_pointer;\n \tcmd->offset = cpu_to_le32(offset);\n \tcmd->length = cpu_to_le16(length);\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex e63a48f..4f74156 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -11028,7 +11028,7 @@ i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)\n \tret = i40e_aq_update_nvm(&pf->hw,\n \t\t\t\t I40E_SR_NVM_CONTROL_WORD,\n \t\t\t\t 0x10, sizeof(nvm_word),\n-\t\t\t\t &nvm_word, true, NULL);\n+\t\t\t\t &nvm_word, true, 0, NULL);\n \t/* Save off last admin queue command status before releasing\n \t * the NVM\n \t */\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c\nindex 425713f..76a5cb0 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_nvm.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_nvm.c\n@@ -239,8 +239,9 @@ static i40e_status i40e_read_nvm_word_srctl(struct i40e_hw *hw, u16 offset,\n *\n * Writes a 16 bit words buffer to the Shadow RAM using the admin command.\n **/\n-static i40e_status i40e_read_nvm_aq(struct i40e_hw *hw, u8 module_pointer,\n-\t\t\t\t u32 offset, u16 words, void *data,\n+static i40e_status i40e_read_nvm_aq(struct i40e_hw *hw,\n+\t\t\t\t u8 module_pointer, u32 offset,\n+\t\t\t\t u16 words, void *data,\n \t\t\t\t bool last_command)\n {\n \ti40e_status ret_code = I40E_ERR_NVM;\n@@ -496,7 +497,8 @@ static i40e_status i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer,\n \t\tret_code = i40e_aq_update_nvm(hw, module_pointer,\n \t\t\t\t\t 2 * offset, /*bytes*/\n \t\t\t\t\t 2 * words, /*bytes*/\n-\t\t\t\t\t data, last_command, &cmd_details);\n+\t\t\t\t\t data, last_command, 0,\n+\t\t\t\t\t &cmd_details);\n \n \treturn ret_code;\n }\n@@ -677,6 +679,9 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,\n static i40e_status i40e_nvmupd_get_aq_result(struct i40e_hw *hw,\n \t\t\t\t\t struct i40e_nvm_access *cmd,\n \t\t\t\t\t u8 *bytes, int *perrno);\n+static i40e_status i40e_nvmupd_get_aq_event(struct i40e_hw *hw,\n+\t\t\t\t\t struct i40e_nvm_access *cmd,\n+\t\t\t\t\t u8 *bytes, int *perrno);\n static inline u8 i40e_nvmupd_get_module(u32 val)\n {\n \treturn (u8)(val & I40E_NVM_MOD_PNT_MASK);\n@@ -686,6 +691,12 @@ static inline u8 i40e_nvmupd_get_transaction(u32 val)\n \treturn (u8)((val & I40E_NVM_TRANS_MASK) >> I40E_NVM_TRANS_SHIFT);\n }\n \n+static inline u8 i40e_nvmupd_get_preservation_flags(u32 val)\n+{\n+\treturn (u8)((val & I40E_NVM_PRESERVATION_FLAGS_MASK) >>\n+\t\t I40E_NVM_PRESERVATION_FLAGS_SHIFT);\n+}\n+\n static const char * const i40e_nvm_update_state_str[] = {\n \t\"I40E_NVMUPD_INVALID\",\n \t\"I40E_NVMUPD_READ_CON\",\n@@ -703,6 +714,7 @@ static const char * const i40e_nvm_update_state_str[] = {\n \t\"I40E_NVMUPD_STATUS\",\n \t\"I40E_NVMUPD_EXEC_AQ\",\n \t\"I40E_NVMUPD_GET_AQ_RESULT\",\n+\t\"I40E_NVMUPD_GET_AQ_EVENT\",\n };\n \n /**\n@@ -798,9 +810,9 @@ i40e_status i40e_nvmupd_command(struct i40e_hw *hw,\n \t\t * the wait info and return before doing anything else\n \t\t */\n \t\tif (cmd->offset == 0xffff) {\n-\t\t\ti40e_nvmupd_check_wait_event(hw, hw->nvm_wait_opcode);\n+\t\t\ti40e_nvmupd_clear_wait_state(hw);\n \t\t\tstatus = 0;\n-\t\t\tgoto exit;\n+\t\t\tbreak;\n \t\t}\n \n \t\tstatus = I40E_ERR_NOT_READY;\n@@ -815,7 +827,7 @@ i40e_status i40e_nvmupd_command(struct i40e_hw *hw,\n \t\t*perrno = -ESRCH;\n \t\tbreak;\n \t}\n-exit:\n+\n \tmutex_unlock(&hw->aq.arq_mutex);\n \treturn status;\n }\n@@ -944,6 +956,10 @@ static i40e_status i40e_nvmupd_state_init(struct i40e_hw *hw,\n \t\tstatus = i40e_nvmupd_get_aq_result(hw, cmd, bytes, perrno);\n \t\tbreak;\n \n+\tcase I40E_NVMUPD_GET_AQ_EVENT:\n+\t\tstatus = i40e_nvmupd_get_aq_event(hw, cmd, bytes, perrno);\n+\t\tbreak;\n+\n \tdefault:\n \t\ti40e_debug(hw, I40E_DEBUG_NVM,\n \t\t\t \"NVMUPD: bad cmd %s in init state\\n\",\n@@ -1118,38 +1134,53 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw,\n }\n \n /**\n- * i40e_nvmupd_check_wait_event - handle NVM update operation events\n+ * i40e_nvmupd_clear_wait_state - clear wait state on hw\n * @hw: pointer to the hardware structure\n- * @opcode: the event that just happened\n **/\n-void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode)\n+void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw)\n {\n-\tif (opcode == hw->nvm_wait_opcode) {\n-\t\ti40e_debug(hw, I40E_DEBUG_NVM,\n-\t\t\t \"NVMUPD: clearing wait on opcode 0x%04x\\n\", opcode);\n-\t\tif (hw->nvm_release_on_done) {\n-\t\t\ti40e_release_nvm(hw);\n-\t\t\thw->nvm_release_on_done = false;\n-\t\t}\n-\t\thw->nvm_wait_opcode = 0;\n+\ti40e_debug(hw, I40E_DEBUG_NVM,\n+\t\t \"NVMUPD: clearing wait on opcode 0x%04x\\n\",\n+\t\t hw->nvm_wait_opcode);\n \n-\t\tif (hw->aq.arq_last_status) {\n-\t\t\thw->nvmupd_state = I40E_NVMUPD_STATE_ERROR;\n-\t\t\treturn;\n-\t\t}\n+\tif (hw->nvm_release_on_done) {\n+\t\ti40e_release_nvm(hw);\n+\t\thw->nvm_release_on_done = false;\n+\t}\n+\thw->nvm_wait_opcode = 0;\n \n-\t\tswitch (hw->nvmupd_state) {\n-\t\tcase I40E_NVMUPD_STATE_INIT_WAIT:\n-\t\t\thw->nvmupd_state = I40E_NVMUPD_STATE_INIT;\n-\t\t\tbreak;\n+\tif (hw->aq.arq_last_status) {\n+\t\thw->nvmupd_state = I40E_NVMUPD_STATE_ERROR;\n+\t\treturn;\n+\t}\n \n-\t\tcase I40E_NVMUPD_STATE_WRITE_WAIT:\n-\t\t\thw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;\n-\t\t\tbreak;\n+\tswitch (hw->nvmupd_state) {\n+\tcase I40E_NVMUPD_STATE_INIT_WAIT:\n+\t\thw->nvmupd_state = I40E_NVMUPD_STATE_INIT;\n+\t\tbreak;\n \n-\t\tdefault:\n-\t\t\tbreak;\n-\t\t}\n+\tcase I40E_NVMUPD_STATE_WRITE_WAIT:\n+\t\thw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;\n+\t\tbreak;\n+\n+\tdefault:\n+\t\tbreak;\n+\t}\n+}\n+\n+/**\n+ * i40e_nvmupd_check_wait_event - handle NVM update operation events\n+ * @hw: pointer to the hardware structure\n+ * @opcode: the event that just happened\n+ **/\n+void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,\n+\t\t\t\t struct i40e_aq_desc *desc)\n+{\n+\tu32 aq_desc_len = sizeof(struct i40e_aq_desc);\n+\n+\tif (opcode == hw->nvm_wait_opcode) {\n+\t\tmemcpy(&hw->nvm_aq_event_desc, desc, aq_desc_len);\n+\t\ti40e_nvmupd_clear_wait_state(hw);\n \t}\n }\n \n@@ -1205,6 +1236,9 @@ static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,\n \t\t\telse if (module == 0)\n \t\t\t\tupd_cmd = I40E_NVMUPD_GET_AQ_RESULT;\n \t\t\tbreak;\n+\t\tcase I40E_NVM_AQE:\n+\t\t\tupd_cmd = I40E_NVMUPD_GET_AQ_EVENT;\n+\t\t\tbreak;\n \t\t}\n \t\tbreak;\n \n@@ -1267,6 +1301,9 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,\n \tu32 aq_data_len;\n \n \ti40e_debug(hw, I40E_DEBUG_NVM, \"NVMUPD: %s\\n\", __func__);\n+\tif (cmd->offset == 0xffff)\n+\t\treturn 0;\n+\n \tmemset(&cmd_details, 0, sizeof(cmd_details));\n \tcmd_details.wb_desc = &hw->nvm_wb_desc;\n \n@@ -1302,6 +1339,9 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,\n \t\t}\n \t}\n \n+\tif (cmd->offset)\n+\t\tmemset(&hw->nvm_aq_event_desc, 0, aq_desc_len);\n+\n \t/* and away we go! */\n \tstatus = i40e_asq_send_command(hw, aq_desc, buff,\n \t\t\t\t buff_size, &cmd_details);\n@@ -1311,6 +1351,7 @@ static i40e_status i40e_nvmupd_exec_aq(struct i40e_hw *hw,\n \t\t\t i40e_stat_str(hw, status),\n \t\t\t i40e_aq_str(hw, hw->aq.asq_last_status));\n \t\t*perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);\n+\t\treturn status;\n \t}\n \n \t/* should we wait for a followup event? */\n@@ -1392,6 +1433,40 @@ static i40e_status i40e_nvmupd_get_aq_result(struct i40e_hw *hw,\n }\n \n /**\n+ * i40e_nvmupd_get_aq_event - Get the Admin Queue event from previous exec_aq\n+ * @hw: pointer to hardware structure\n+ * @cmd: pointer to nvm update command buffer\n+ * @bytes: pointer to the data buffer\n+ * @perrno: pointer to return error code\n+ *\n+ * cmd structure contains identifiers and data buffer\n+ **/\n+static i40e_status i40e_nvmupd_get_aq_event(struct i40e_hw *hw,\n+\t\t\t\t\t struct i40e_nvm_access *cmd,\n+\t\t\t\t\t u8 *bytes, int *perrno)\n+{\n+\tu32 aq_total_len;\n+\tu32 aq_desc_len;\n+\n+\ti40e_debug(hw, I40E_DEBUG_NVM, \"NVMUPD: %s\\n\", __func__);\n+\n+\taq_desc_len = sizeof(struct i40e_aq_desc);\n+\taq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_aq_event_desc.datalen);\n+\n+\t/* check copylength range */\n+\tif (cmd->data_size > aq_total_len) {\n+\t\ti40e_debug(hw, I40E_DEBUG_NVM,\n+\t\t\t \"%s: copy length %d too big, trimming to %d\\n\",\n+\t\t\t __func__, cmd->data_size, aq_total_len);\n+\t\tcmd->data_size = aq_total_len;\n+\t}\n+\n+\tmemcpy(bytes, &hw->nvm_aq_event_desc, cmd->data_size);\n+\n+\treturn 0;\n+}\n+\n+/**\n * i40e_nvmupd_nvm_read - Read NVM\n * @hw: pointer to hardware structure\n * @cmd: pointer to nvm update command buffer\n@@ -1486,18 +1561,20 @@ static i40e_status i40e_nvmupd_nvm_write(struct i40e_hw *hw,\n \ti40e_status status = 0;\n \tstruct i40e_asq_cmd_details cmd_details;\n \tu8 module, transaction;\n+\tu8 preservation_flags;\n \tbool last;\n \n \ttransaction = i40e_nvmupd_get_transaction(cmd->config);\n \tmodule = i40e_nvmupd_get_module(cmd->config);\n \tlast = (transaction & I40E_NVM_LCB);\n+\tpreservation_flags = i40e_nvmupd_get_preservation_flags(cmd->config);\n \n \tmemset(&cmd_details, 0, sizeof(cmd_details));\n \tcmd_details.wb_desc = &hw->nvm_wb_desc;\n \n \tstatus = i40e_aq_update_nvm(hw, module, cmd->offset,\n \t\t\t\t (u16)cmd->data_size, bytes, last,\n-\t\t\t\t &cmd_details);\n+\t\t\t\t preservation_flags, &cmd_details);\n \tif (status) {\n \t\ti40e_debug(hw, I40E_DEBUG_NVM,\n \t\t\t \"i40e_nvmupd_nvm_write mod 0x%x off 0x%x len 0x%x\\n\",\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h\nindex b3cc89c..187dd53 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h\n@@ -214,7 +214,7 @@ i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,\n \t\t\t\tu32 offset, u16 length, void *data,\n-\t\t\t\tbool last_command,\n+\t\t\t\tbool last_command, u8 preservation_flags,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,\n \t\t\t\tu8 mib_type, void *buff, u16 buff_size,\n@@ -333,7 +333,9 @@ i40e_status i40e_validate_nvm_checksum(struct i40e_hw *hw,\n i40e_status i40e_nvmupd_command(struct i40e_hw *hw,\n \t\t\t\tstruct i40e_nvm_access *cmd,\n \t\t\t\tu8 *bytes, int *);\n-void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode);\n+void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,\n+\t\t\t\t struct i40e_aq_desc *desc);\n+void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw);\n void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);\n \n extern struct i40e_rx_ptype_decoded i40e_ptype_lookup[];\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h\nindex 5a708c3..cd294e6 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h\n@@ -402,6 +402,7 @@ enum i40e_nvmupd_cmd {\n \tI40E_NVMUPD_STATUS,\n \tI40E_NVMUPD_EXEC_AQ,\n \tI40E_NVMUPD_GET_AQ_RESULT,\n+\tI40E_NVMUPD_GET_AQ_EVENT,\n };\n \n enum i40e_nvmupd_state {\n@@ -421,15 +422,21 @@ enum i40e_nvmupd_state {\n \n #define I40E_NVM_MOD_PNT_MASK 0xFF\n \n-#define I40E_NVM_TRANS_SHIFT\t8\n-#define I40E_NVM_TRANS_MASK\t(0xf << I40E_NVM_TRANS_SHIFT)\n-#define I40E_NVM_CON\t\t0x0\n-#define I40E_NVM_SNT\t\t0x1\n-#define I40E_NVM_LCB\t\t0x2\n-#define I40E_NVM_SA\t\t(I40E_NVM_SNT | I40E_NVM_LCB)\n-#define I40E_NVM_ERA\t\t0x4\n-#define I40E_NVM_CSUM\t\t0x8\n-#define I40E_NVM_EXEC\t\t0xf\n+#define I40E_NVM_TRANS_SHIFT\t\t\t8\n+#define I40E_NVM_TRANS_MASK\t\t\t(0xf << I40E_NVM_TRANS_SHIFT)\n+#define I40E_NVM_PRESERVATION_FLAGS_SHIFT\t12\n+#define I40E_NVM_PRESERVATION_FLAGS_MASK \\\n+\t\t\t\t(0x3 << I40E_NVM_PRESERVATION_FLAGS_SHIFT)\n+#define I40E_NVM_PRESERVATION_FLAGS_SELECTED\t0x01\n+#define I40E_NVM_PRESERVATION_FLAGS_ALL\t\t0x02\n+#define I40E_NVM_CON\t\t\t\t0x0\n+#define I40E_NVM_SNT\t\t\t\t0x1\n+#define I40E_NVM_LCB\t\t\t\t0x2\n+#define I40E_NVM_SA\t\t\t\t(I40E_NVM_SNT | I40E_NVM_LCB)\n+#define I40E_NVM_ERA\t\t\t\t0x4\n+#define I40E_NVM_CSUM\t\t\t\t0x8\n+#define I40E_NVM_AQE\t\t\t\t0xe\n+#define I40E_NVM_EXEC\t\t\t\t0xf\n \n #define I40E_NVM_ADAPT_SHIFT\t16\n #define I40E_NVM_ADAPT_MASK\t(0xffff << I40E_NVM_ADAPT_SHIFT)\n@@ -611,6 +618,7 @@ struct i40e_hw {\n \t/* state of nvm update process */\n \tenum i40e_nvmupd_state nvmupd_state;\n \tstruct i40e_aq_desc nvm_wb_desc;\n+\tstruct i40e_aq_desc nvm_aq_event_desc;\n \tstruct i40e_virt_mem nvm_buff;\n \tbool nvm_release_on_done;\n \tu16 nvm_wait_opcode;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\nindex 435a112..b0e6454 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n@@ -2196,8 +2196,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_phy_register_access);\n */\n struct i40e_aqc_nvm_update {\n \tu8\tcommand_flags;\n-#define I40E_AQ_NVM_LAST_CMD\t0x01\n-#define I40E_AQ_NVM_FLASH_ONLY\t0x80\n+#define I40E_AQ_NVM_LAST_CMD\t\t\t0x01\n+#define I40E_AQ_NVM_FLASH_ONLY\t\t\t0x80\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT\t1\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_MASK\t0x03\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED\t0x03\n+#define I40E_AQ_NVM_PRESERVATION_FLAGS_ALL\t0x01\n \tu8\tmodule_pointer;\n \t__le16\tlength;\n \t__le32\toffset;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h\nindex 6afc316..54951c8 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h\n@@ -361,6 +361,7 @@ enum i40e_nvmupd_cmd {\n \tI40E_NVMUPD_STATUS,\n \tI40E_NVMUPD_EXEC_AQ,\n \tI40E_NVMUPD_GET_AQ_RESULT,\n+\tI40E_NVMUPD_GET_AQ_EVENT,\n };\n \n enum i40e_nvmupd_state {\n@@ -380,15 +381,21 @@ enum i40e_nvmupd_state {\n \n #define I40E_NVM_MOD_PNT_MASK 0xFF\n \n-#define I40E_NVM_TRANS_SHIFT\t8\n-#define I40E_NVM_TRANS_MASK\t(0xf << I40E_NVM_TRANS_SHIFT)\n-#define I40E_NVM_CON\t\t0x0\n-#define I40E_NVM_SNT\t\t0x1\n-#define I40E_NVM_LCB\t\t0x2\n-#define I40E_NVM_SA\t\t(I40E_NVM_SNT | I40E_NVM_LCB)\n-#define I40E_NVM_ERA\t\t0x4\n-#define I40E_NVM_CSUM\t\t0x8\n-#define I40E_NVM_EXEC\t\t0xf\n+#define I40E_NVM_TRANS_SHIFT\t\t\t8\n+#define I40E_NVM_TRANS_MASK\t\t\t(0xf << I40E_NVM_TRANS_SHIFT)\n+#define I40E_NVM_PRESERVATION_FLAGS_SHIFT\t12\n+#define I40E_NVM_PRESERVATION_FLAGS_MASK \\\n+\t\t\t\t(0x3 << I40E_NVM_PRESERVATION_FLAGS_SHIFT)\n+#define I40E_NVM_PRESERVATION_FLAGS_SELECTED\t0x01\n+#define I40E_NVM_PRESERVATION_FLAGS_ALL\t\t0x02\n+#define I40E_NVM_CON\t\t\t\t0x0\n+#define I40E_NVM_SNT\t\t\t\t0x1\n+#define I40E_NVM_LCB\t\t\t\t0x2\n+#define I40E_NVM_SA\t\t\t\t(I40E_NVM_SNT | I40E_NVM_LCB)\n+#define I40E_NVM_ERA\t\t\t\t0x4\n+#define I40E_NVM_CSUM\t\t\t\t0x8\n+#define I40E_NVM_AQE\t\t\t\t0xe\n+#define I40E_NVM_EXEC\t\t\t\t0xf\n \n #define I40E_NVM_ADAPT_SHIFT\t16\n #define I40E_NVM_ADAPT_MASK\t(0xffff << I40E_NVM_ADAPT_SHIFT)\n@@ -561,6 +568,7 @@ struct i40e_hw {\n \t/* state of nvm update process */\n \tenum i40e_nvmupd_state nvmupd_state;\n \tstruct i40e_aq_desc nvm_wb_desc;\n+\tstruct i40e_aq_desc nvm_aq_event_desc;\n \tstruct i40e_virt_mem nvm_buff;\n \tbool nvm_release_on_done;\n \tu16 nvm_wait_opcode;\n", "prefixes": [ "next", "S83-V5", "1/9" ] }