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GET /api/patches/849010/?format=api
{ "id": 849010, "url": "http://patchwork.ozlabs.org/api/patches/849010/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1513323522-15021-2-git-send-email-sagar.a.kamble@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1513323522-15021-2-git-send-email-sagar.a.kamble@intel.com>", "list_archive_url": null, "date": "2017-12-15T07:38:16", "name": "[01/27] timecounter: Make cyclecounter struct part of timecounter struct", "commit_ref": null, "pull_url": null, "state": "awaiting-upstream", "archived": false, "hash": "06153995b34d79603da6e8a1dfade0baf12fad81", "submitter": { "id": 72926, "url": "http://patchwork.ozlabs.org/api/people/72926/?format=api", "name": "Sagar Arun Kamble", "email": "sagar.a.kamble@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1513323522-15021-2-git-send-email-sagar.a.kamble@intel.com/mbox/", "series": [ { "id": 18670, "url": "http://patchwork.ozlabs.org/api/series/18670/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=18670", "date": "2017-12-15T07:38:16", "name": "[01/27] timecounter: Make cyclecounter struct part of timecounter struct", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/18670/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/849010/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/849010/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.133; helo=hemlock.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yyhzg1fLtz9sNr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Dec 2017 18:35:26 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 1631B87F4B;\n\tFri, 15 Dec 2017 07:35:24 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 9FTH0b3IlYmG; Fri, 15 Dec 2017 07:35:20 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 00499870AF;\n\tFri, 15 Dec 2017 07:35:19 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 159AD1C21D9\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Dec 2017 07:35:19 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 00DF688736\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Dec 2017 07:35:19 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Yzsn0O0WY7s0 for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Dec 2017 07:35:15 +0000 (UTC)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 4B2D981F4D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 15 Dec 2017 07:35:15 +0000 (UTC)", "from orsmga004.jf.intel.com ([10.7.209.38])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t14 Dec 2017 23:35:14 -0800", "from sakamble-desktop.iind.intel.com ([10.223.26.118])\n\tby orsmga004.jf.intel.com with ESMTP; 14 Dec 2017 23:35:10 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.45,403,1508828400\"; d=\"scan'208\";a=\"158949190\"", "From": "Sagar Arun Kamble <sagar.a.kamble@intel.com>", "To": "linux-kernel@vger.kernel.org", "Date": "Fri, 15 Dec 2017 13:08:16 +0530", "Message-Id": "<1513323522-15021-2-git-send-email-sagar.a.kamble@intel.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1513323522-15021-1-git-send-email-sagar.a.kamble@intel.com>", "References": "<1513323522-15021-1-git-send-email-sagar.a.kamble@intel.com>", "Subject": "[Intel-wired-lan] [PATCH 01/27] timecounter: Make cyclecounter\n\tstruct part of timecounter struct", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "alsa-devel@alsa-project.org, linux-rdma@vger.kernel.org,\n\tnetdev@vger.kernel.org, Richard Cochran <richardcochran@gmail.com>,\n\tStephen Boyd <sboyd@codeaurora.org>,\n\tChris Wilson <chris@chris-wilson.co.uk>, \n\tJohn Stultz <john.stultz@linaro.org>, intel-wired-lan@lists.osuosl.org,\n\tThomas Gleixner <tglx@linutronix.de>,\n\tSagar Arun Kamble <sagar.a.kamble@intel.com>,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "There is no real need for the users of timecounters to define cyclecounter\nand timecounter variables separately. Since timecounter will always be\nbased on cyclecounter, have cyclecounter struct as member of timecounter\nstruct.\n\nv2: Rebase.\n\nSuggested-by: Chris Wilson <chris@chris-wilson.co.uk>\nSigned-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>\nCc: Chris Wilson <chris@chris-wilson.co.uk>\nCc: Richard Cochran <richardcochran@gmail.com>\nCc: John Stultz <john.stultz@linaro.org>\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Stephen Boyd <sboyd@codeaurora.org>\nCc: linux-kernel@vger.kernel.org\nCc: linux-arm-kernel@lists.infradead.org\nCc: netdev@vger.kernel.org\nCc: intel-wired-lan@lists.osuosl.org\nCc: linux-rdma@vger.kernel.org\nCc: alsa-devel@alsa-project.org\nCc: kvmarm@lists.cs.columbia.edu\nAcked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> (Intel drivers)\n---\n arch/microblaze/kernel/timer.c | 20 ++++++------\n drivers/clocksource/arm_arch_timer.c | 19 ++++++------\n drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 3 +-\n drivers/net/ethernet/amd/xgbe/xgbe-ptp.c | 9 +++---\n drivers/net/ethernet/amd/xgbe/xgbe.h | 1 -\n drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 1 -\n drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 20 ++++++------\n drivers/net/ethernet/freescale/fec.h | 1 -\n drivers/net/ethernet/freescale/fec_ptp.c | 30 +++++++++---------\n drivers/net/ethernet/intel/e1000e/e1000.h | 1 -\n drivers/net/ethernet/intel/e1000e/netdev.c | 27 ++++++++--------\n drivers/net/ethernet/intel/e1000e/ptp.c | 2 +-\n drivers/net/ethernet/intel/igb/igb.h | 1 -\n drivers/net/ethernet/intel/igb/igb_ptp.c | 25 ++++++++-------\n drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 -\n drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c | 17 +++++-----\n drivers/net/ethernet/mellanox/mlx4/en_clock.c | 28 ++++++++---------\n drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 1 -\n .../net/ethernet/mellanox/mlx5/core/lib/clock.c | 34 ++++++++++----------\n drivers/net/ethernet/qlogic/qede/qede_ptp.c | 20 ++++++------\n drivers/net/ethernet/ti/cpts.c | 36 ++++++++++++----------\n drivers/net/ethernet/ti/cpts.h | 1 -\n include/linux/mlx5/driver.h | 1 -\n include/linux/timecounter.h | 4 +--\n include/sound/hdaudio.h | 1 -\n kernel/time/timecounter.c | 28 ++++++++---------\n sound/hda/hdac_stream.c | 7 +++--\n virt/kvm/arm/arch_timer.c | 6 ++--\n 28 files changed, 163 insertions(+), 182 deletions(-)", "diff": "diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c\nindex 7de941c..b7f89e9 100644\n--- a/arch/microblaze/kernel/timer.c\n+++ b/arch/microblaze/kernel/timer.c\n@@ -199,27 +199,25 @@ static u64 xilinx_read(struct clocksource *cs)\n \treturn (u64)xilinx_clock_read();\n }\n \n-static struct timecounter xilinx_tc = {\n-\t.cc = NULL,\n-};\n-\n static u64 xilinx_cc_read(const struct cyclecounter *cc)\n {\n \treturn xilinx_read(NULL);\n }\n \n-static struct cyclecounter xilinx_cc = {\n-\t.read = xilinx_cc_read,\n-\t.mask = CLOCKSOURCE_MASK(32),\n-\t.shift = 8,\n+static struct timecounter xilinx_tc = {\n+\t.cc.read = xilinx_cc_read,\n+\t.cc.mask = CLOCKSOURCE_MASK(32),\n+\t.cc.mult = 0,\n+\t.cc.shift = 8,\n };\n \n static int __init init_xilinx_timecounter(void)\n {\n-\txilinx_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC,\n-\t\t\t\txilinx_cc.shift);\n+\tstruct cyclecounter *cc = &xilinx_tc.cc;\n+\n+\tcc->mult = div_sc(timer_clock_freq, NSEC_PER_SEC, cc->shift);\n \n-\ttimecounter_init(&xilinx_tc, &xilinx_cc, sched_clock());\n+\ttimecounter_init(&xilinx_tc, sched_clock());\n \n \treturn 0;\n }\ndiff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c\nindex 57cb2f0..31543e5 100644\n--- a/drivers/clocksource/arm_arch_timer.c\n+++ b/drivers/clocksource/arm_arch_timer.c\n@@ -179,11 +179,6 @@ static u64 arch_counter_read_cc(const struct cyclecounter *cc)\n \t.flags\t= CLOCK_SOURCE_IS_CONTINUOUS,\n };\n \n-static struct cyclecounter cyclecounter __ro_after_init = {\n-\t.read\t= arch_counter_read_cc,\n-\t.mask\t= CLOCKSOURCE_MASK(56),\n-};\n-\n struct ate_acpi_oem_info {\n \tchar oem_id[ACPI_OEM_ID_SIZE + 1];\n \tchar oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];\n@@ -915,7 +910,10 @@ static u64 arch_counter_get_cntvct_mem(void)\n \treturn ((u64) vct_hi << 32) | vct_lo;\n }\n \n-static struct arch_timer_kvm_info arch_timer_kvm_info;\n+static struct arch_timer_kvm_info arch_timer_kvm_info = {\n+\t.timecounter.cc.read = arch_counter_read_cc,\n+\t.timecounter.cc.mask = CLOCKSOURCE_MASK(56),\n+};\n \n struct arch_timer_kvm_info *arch_timer_get_kvm_info(void)\n {\n@@ -925,6 +923,7 @@ struct arch_timer_kvm_info *arch_timer_get_kvm_info(void)\n static void __init arch_counter_register(unsigned type)\n {\n \tu64 start_count;\n+\tstruct cyclecounter *cc = &arch_timer_kvm_info.timecounter.cc;\n \n \t/* Register the CP15 based counter if we have one */\n \tif (type & ARCH_TIMER_TYPE_CP15) {\n@@ -943,10 +942,10 @@ static void __init arch_counter_register(unsigned type)\n \t\tclocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;\n \tstart_count = arch_timer_read_counter();\n \tclocksource_register_hz(&clocksource_counter, arch_timer_rate);\n-\tcyclecounter.mult = clocksource_counter.mult;\n-\tcyclecounter.shift = clocksource_counter.shift;\n-\ttimecounter_init(&arch_timer_kvm_info.timecounter,\n-\t\t\t &cyclecounter, start_count);\n+\n+\tcc->mult = clocksource_counter.mult;\n+\tcc->shift = clocksource_counter.shift;\n+\ttimecounter_init(&arch_timer_kvm_info.timecounter, start_count);\n \n \t/* 56 bits minimum, so we assume worst case rollover */\n \tsched_clock_register(arch_timer_read_counter, 56, arch_timer_rate);\ndiff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c\nindex e107e18..5005c87 100644\n--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c\n+++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c\n@@ -1622,8 +1622,7 @@ static int xgbe_config_tstamp(struct xgbe_prv_data *pdata,\n \txgbe_set_tstamp_time(pdata, 0, 0);\n \n \t/* Initialize the timecounter */\n-\ttimecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc,\n-\t\t\t ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&pdata->tstamp_tc, ktime_to_ns(ktime_get_real()));\n \n \treturn 0;\n }\ndiff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c\nindex d06d260..5ea4edf 100644\n--- a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c\n+++ b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c\n@@ -126,7 +126,7 @@ static u64 xgbe_cc_read(const struct cyclecounter *cc)\n {\n \tstruct xgbe_prv_data *pdata = container_of(cc,\n \t\t\t\t\t\t struct xgbe_prv_data,\n-\t\t\t\t\t\t tstamp_cc);\n+\t\t\t\t\t\t tstamp_tc.cc);\n \tu64 nsec;\n \n \tnsec = pdata->hw_if.get_tstamp_time(pdata);\n@@ -211,7 +211,7 @@ static int xgbe_settime(struct ptp_clock_info *info,\n \n \tspin_lock_irqsave(&pdata->tstamp_lock, flags);\n \n-\ttimecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec);\n+\ttimecounter_init(&pdata->tstamp_tc, nsec);\n \n \tspin_unlock_irqrestore(&pdata->tstamp_lock, flags);\n \n@@ -228,7 +228,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)\n {\n \tstruct ptp_clock_info *info = &pdata->ptp_clock_info;\n \tstruct ptp_clock *clock;\n-\tstruct cyclecounter *cc = &pdata->tstamp_cc;\n+\tstruct cyclecounter *cc = &pdata->tstamp_tc.cc;\n \tu64 dividend;\n \n \tsnprintf(info->name, sizeof(info->name), \"%s\",\n@@ -263,8 +263,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)\n \tcc->mult = 1;\n \tcc->shift = 0;\n \n-\ttimecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc,\n-\t\t\t ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&pdata->tstamp_tc, ktime_to_ns(ktime_get_real()));\n \n \t/* Disable all timestamping to start */\n \tXGMAC_IOWRITE(pdata, MAC_TSCR, 0);\ndiff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h\nindex ad102c8..2445103 100644\n--- a/drivers/net/ethernet/amd/xgbe/xgbe.h\n+++ b/drivers/net/ethernet/amd/xgbe/xgbe.h\n@@ -1168,7 +1168,6 @@ struct xgbe_prv_data {\n \tstruct ptp_clock_info ptp_clock_info;\n \tstruct ptp_clock *ptp_clock;\n \tstruct hwtstamp_config tstamp_config;\n-\tstruct cyclecounter tstamp_cc;\n \tstruct timecounter tstamp_tc;\n \tunsigned int tstamp_addend;\n \tstruct work_struct tx_tstamp_work;\ndiff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h\nindex 352beff..f164fe0 100644\n--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h\n+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h\n@@ -1827,7 +1827,6 @@ struct bnx2x {\n \tstruct ptp_clock *ptp_clock;\n \tstruct ptp_clock_info ptp_clock_info;\n \tstruct work_struct ptp_task;\n-\tstruct cyclecounter cyclecounter;\n \tstruct timecounter timecounter;\n \tbool timecounter_init_done;\n \tstruct sk_buff *ptp_tx_skb;\ndiff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c\nindex 91e2a75..83624ad 100644\n--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c\n+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c\n@@ -13850,7 +13850,7 @@ static int bnx2x_ptp_settime(struct ptp_clock_info *ptp,\n \tDP(BNX2X_MSG_PTP, \"PTP settime called, ns = %llu\\n\", ns);\n \n \t/* Re-init the timecounter */\n-\ttimecounter_init(&bp->timecounter, &bp->cyclecounter, ns);\n+\ttimecounter_init(&bp->timecounter, ns);\n \n \treturn 0;\n }\n@@ -15254,7 +15254,7 @@ void bnx2x_set_rx_ts(struct bnx2x *bp, struct sk_buff *skb)\n /* Read the PHC */\n static u64 bnx2x_cyclecounter_read(const struct cyclecounter *cc)\n {\n-\tstruct bnx2x *bp = container_of(cc, struct bnx2x, cyclecounter);\n+\tstruct bnx2x *bp = container_of(cc, struct bnx2x, timecounter.cc);\n \tint port = BP_PORT(bp);\n \tu32 wb_data[2];\n \tu64 phc_cycles;\n@@ -15269,13 +15269,13 @@ static u64 bnx2x_cyclecounter_read(const struct cyclecounter *cc)\n \treturn phc_cycles;\n }\n \n-static void bnx2x_init_cyclecounter(struct bnx2x *bp)\n+static void bnx2x_init_cyclecounter(struct cyclecounter *cc)\n {\n-\tmemset(&bp->cyclecounter, 0, sizeof(bp->cyclecounter));\n-\tbp->cyclecounter.read = bnx2x_cyclecounter_read;\n-\tbp->cyclecounter.mask = CYCLECOUNTER_MASK(64);\n-\tbp->cyclecounter.shift = 0;\n-\tbp->cyclecounter.mult = 1;\n+\tmemset(cc, 0, sizeof(*cc));\n+\tcc->read = bnx2x_cyclecounter_read;\n+\tcc->mask = CYCLECOUNTER_MASK(64);\n+\tcc->shift = 0;\n+\tcc->mult = 1;\n }\n \n static int bnx2x_send_reset_timesync_ramrod(struct bnx2x *bp)\n@@ -15511,8 +15511,8 @@ void bnx2x_init_ptp(struct bnx2x *bp)\n \t * unload / load (e.g. MTU change) while it is running.\n \t */\n \tif (!bp->timecounter_init_done) {\n-\t\tbnx2x_init_cyclecounter(bp);\n-\t\ttimecounter_init(&bp->timecounter, &bp->cyclecounter,\n+\t\tbnx2x_init_cyclecounter(&bp->timecounter.cc);\n+\t\ttimecounter_init(&bp->timecounter,\n \t\t\t\t ktime_to_ns(ktime_get_real()));\n \t\tbp->timecounter_init_done = 1;\n \t}\ndiff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h\nindex 5385074..d54b501 100644\n--- a/drivers/net/ethernet/freescale/fec.h\n+++ b/drivers/net/ethernet/freescale/fec.h\n@@ -549,7 +549,6 @@ struct fec_enet_private {\n \tstruct ptp_clock_info ptp_caps;\n \tunsigned long last_overflow_check;\n \tspinlock_t tmreg_lock;\n-\tstruct cyclecounter cc;\n \tstruct timecounter tc;\n \tint rx_hwtstamp_filter;\n \tu32 base_incval;\ndiff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c\nindex f814397..b1261d1 100644\n--- a/drivers/net/ethernet/freescale/fec_ptp.c\n+++ b/drivers/net/ethernet/freescale/fec_ptp.c\n@@ -186,13 +186,14 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)\n \t\t * ptp counter, which maybe cause 32-bit wrap. Since the\n \t\t * (NSEC_PER_SEC - (u32)ts.tv_nsec) is less than 2 second.\n \t\t * We can ensure the wrap will not cause issue. If the offset\n-\t\t * is bigger than fep->cc.mask would be a error.\n+\t\t * is bigger than fep->tc.cc.mask would be a error.\n \t\t */\n-\t\tval &= fep->cc.mask;\n+\t\tval &= fep->tc.cc.mask;\n \t\twritel(val, fep->hwp + FEC_TCCR(fep->pps_channel));\n \n \t\t/* Calculate the second the compare event timestamp */\n-\t\tfep->next_counter = (val + fep->reload_period) & fep->cc.mask;\n+\t\tfep->next_counter = (val + fep->reload_period) &\n+\t\t\t\t fep->tc.cc.mask;\n \n \t\t/* * Enable compare event when overflow */\n \t\tval = readl(fep->hwp + FEC_ATIME_CTRL);\n@@ -211,7 +212,8 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)\n \t\t * the third timestamp. Refer the TCCR register detail in the spec.\n \t\t */\n \t\twritel(fep->next_counter, fep->hwp + FEC_TCCR(fep->pps_channel));\n-\t\tfep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask;\n+\t\tfep->next_counter = (fep->next_counter + fep->reload_period) &\n+\t\t\t\t fep->tc.cc.mask;\n \t} else {\n \t\twritel(0, fep->hwp + FEC_TCSR(fep->pps_channel));\n \t}\n@@ -233,7 +235,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)\n static u64 fec_ptp_read(const struct cyclecounter *cc)\n {\n \tstruct fec_enet_private *fep =\n-\t\tcontainer_of(cc, struct fec_enet_private, cc);\n+\t\tcontainer_of(cc, struct fec_enet_private, tc.cc);\n \tconst struct platform_device_id *id_entry =\n \t\tplatform_get_device_id(fep->pdev);\n \tu32 tempval;\n@@ -276,14 +278,14 @@ void fec_ptp_start_cyclecounter(struct net_device *ndev)\n \twritel(FEC_T_CTRL_ENABLE | FEC_T_CTRL_PERIOD_RST,\n \t\tfep->hwp + FEC_ATIME_CTRL);\n \n-\tmemset(&fep->cc, 0, sizeof(fep->cc));\n-\tfep->cc.read = fec_ptp_read;\n-\tfep->cc.mask = CLOCKSOURCE_MASK(31);\n-\tfep->cc.shift = 31;\n-\tfep->cc.mult = FEC_CC_MULT;\n+\tmemset(&fep->tc.cc, 0, sizeof(fep->tc.cc));\n+\tfep->tc.cc.read = fec_ptp_read;\n+\tfep->tc.cc.mask = CLOCKSOURCE_MASK(31);\n+\tfep->tc.cc.shift = 31;\n+\tfep->tc.cc.mult = FEC_CC_MULT;\n \n \t/* reset the ns time counter */\n-\ttimecounter_init(&fep->tc, &fep->cc, ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&fep->tc, ktime_to_ns(ktime_get_real()));\n \n \tspin_unlock_irqrestore(&fep->tmreg_lock, flags);\n }\n@@ -434,11 +436,11 @@ static int fec_ptp_settime(struct ptp_clock_info *ptp,\n \t/* Get the timer value based on timestamp.\n \t * Update the counter with the masked value.\n \t */\n-\tcounter = ns & fep->cc.mask;\n+\tcounter = ns & fep->tc.cc.mask;\n \n \tspin_lock_irqsave(&fep->tmreg_lock, flags);\n \twritel(counter, fep->hwp + FEC_ATIME);\n-\ttimecounter_init(&fep->tc, &fep->cc, ns);\n+\ttimecounter_init(&fep->tc, ns);\n \tspin_unlock_irqrestore(&fep->tmreg_lock, flags);\n \tmutex_unlock(&fep->ptp_clk_mutex);\n \treturn 0;\n@@ -570,7 +572,7 @@ static irqreturn_t fec_pps_interrupt(int irq, void *dev_id)\n \n \t\t/* Update the counter; */\n \t\tfep->next_counter = (fep->next_counter + fep->reload_period) &\n-\t\t\t\tfep->cc.mask;\n+\t\t\t\t fep->tc.cc.mask;\n \n \t\tevent.type = PTP_CLOCK_PPS;\n \t\tptp_clock_event(fep->ptp_clock, &event);\ndiff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h\nindex 2311b31..b59f82a 100644\n--- a/drivers/net/ethernet/intel/e1000e/e1000.h\n+++ b/drivers/net/ethernet/intel/e1000e/e1000.h\n@@ -340,7 +340,6 @@ struct e1000_adapter {\n \tunsigned long tx_hwtstamp_start;\n \tstruct work_struct tx_hwtstamp_work;\n \tspinlock_t systim_lock;\t/* protects SYSTIML/H regsters */\n-\tstruct cyclecounter cc;\n \tstruct timecounter tc;\n \tstruct ptp_clock *ptp_clock;\n \tstruct ptp_clock_info ptp_clock_info;\ndiff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c\nindex 9f18d39..c9f7ba3 100644\n--- a/drivers/net/ethernet/intel/e1000e/netdev.c\n+++ b/drivers/net/ethernet/intel/e1000e/netdev.c\n@@ -3536,7 +3536,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)\n \t\tincperiod = INCPERIOD_96MHZ;\n \t\tincvalue = INCVALUE_96MHZ;\n \t\tshift = INCVALUE_SHIFT_96MHZ;\n-\t\tadapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;\n+\t\tadapter->tc.cc.shift = shift + INCPERIOD_SHIFT_96MHZ;\n \t\tbreak;\n \tcase e1000_pch_lpt:\n \t\tif (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {\n@@ -3544,13 +3544,13 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)\n \t\t\tincperiod = INCPERIOD_96MHZ;\n \t\t\tincvalue = INCVALUE_96MHZ;\n \t\t\tshift = INCVALUE_SHIFT_96MHZ;\n-\t\t\tadapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;\n+\t\t\tadapter->tc.cc.shift = shift + INCPERIOD_SHIFT_96MHZ;\n \t\t} else {\n \t\t\t/* Stable 25MHz frequency */\n \t\t\tincperiod = INCPERIOD_25MHZ;\n \t\t\tincvalue = INCVALUE_25MHZ;\n \t\t\tshift = INCVALUE_SHIFT_25MHZ;\n-\t\t\tadapter->cc.shift = shift;\n+\t\t\tadapter->tc.cc.shift = shift;\n \t\t}\n \t\tbreak;\n \tcase e1000_pch_spt:\n@@ -3559,7 +3559,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)\n \t\t\tincperiod = INCPERIOD_24MHZ;\n \t\t\tincvalue = INCVALUE_24MHZ;\n \t\t\tshift = INCVALUE_SHIFT_24MHZ;\n-\t\t\tadapter->cc.shift = shift;\n+\t\t\tadapter->tc.cc.shift = shift;\n \t\t\tbreak;\n \t\t}\n \t\treturn -EINVAL;\n@@ -3569,13 +3569,13 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)\n \t\t\tincperiod = INCPERIOD_24MHZ;\n \t\t\tincvalue = INCVALUE_24MHZ;\n \t\t\tshift = INCVALUE_SHIFT_24MHZ;\n-\t\t\tadapter->cc.shift = shift;\n+\t\t\tadapter->tc.cc.shift = shift;\n \t\t} else {\n \t\t\t/* Stable 38400KHz frequency */\n \t\t\tincperiod = INCPERIOD_38400KHZ;\n \t\t\tincvalue = INCVALUE_38400KHZ;\n \t\t\tshift = INCVALUE_SHIFT_38400KHZ;\n-\t\t\tadapter->cc.shift = shift;\n+\t\t\tadapter->tc.cc.shift = shift;\n \t\t}\n \t\tbreak;\n \tcase e1000_82574:\n@@ -3584,7 +3584,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)\n \t\tincperiod = INCPERIOD_25MHZ;\n \t\tincvalue = INCVALUE_25MHZ;\n \t\tshift = INCVALUE_SHIFT_25MHZ;\n-\t\tadapter->cc.shift = shift;\n+\t\tadapter->tc.cc.shift = shift;\n \t\tbreak;\n \tdefault:\n \t\treturn -EINVAL;\n@@ -3955,8 +3955,7 @@ static void e1000e_systim_reset(struct e1000_adapter *adapter)\n \n \t/* reset the systim ns time counter */\n \tspin_lock_irqsave(&adapter->systim_lock, flags);\n-\ttimecounter_init(&adapter->tc, &adapter->cc,\n-\t\t\t ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&adapter->tc, ktime_to_ns(ktime_get_real()));\n \tspin_unlock_irqrestore(&adapter->systim_lock, flags);\n \n \t/* restore the previous hwtstamp configuration settings */\n@@ -4389,7 +4388,7 @@ static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim)\n static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)\n {\n \tstruct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,\n-\t\t\t\t\t\t cc);\n+\t\t\t\t\t\t tc.cc);\n \tstruct e1000_hw *hw = &adapter->hw;\n \tu32 systimel, systimeh;\n \tu64 systim;\n@@ -4449,10 +4448,10 @@ static int e1000_sw_init(struct e1000_adapter *adapter)\n \n \t/* Setup hardware time stamping cyclecounter */\n \tif (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {\n-\t\tadapter->cc.read = e1000e_cyclecounter_read;\n-\t\tadapter->cc.mask = CYCLECOUNTER_MASK(64);\n-\t\tadapter->cc.mult = 1;\n-\t\t/* cc.shift set in e1000e_get_base_tininca() */\n+\t\tadapter->tc.cc.read = e1000e_cyclecounter_read;\n+\t\tadapter->tc.cc.mask = CYCLECOUNTER_MASK(64);\n+\t\tadapter->tc.cc.mult = 1;\n+\t\t/* tc.cc.shift set in e1000e_get_base_tininca() */\n \n \t\tspin_lock_init(&adapter->systim_lock);\n \t\tINIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);\ndiff --git a/drivers/net/ethernet/intel/e1000e/ptp.c b/drivers/net/ethernet/intel/e1000e/ptp.c\nindex b366885..03d5f2a 100644\n--- a/drivers/net/ethernet/intel/e1000e/ptp.c\n+++ b/drivers/net/ethernet/intel/e1000e/ptp.c\n@@ -222,7 +222,7 @@ static int e1000e_phc_settime(struct ptp_clock_info *ptp,\n \n \t/* reset the timecounter */\n \tspin_lock_irqsave(&adapter->systim_lock, flags);\n-\ttimecounter_init(&adapter->tc, &adapter->cc, ns);\n+\ttimecounter_init(&adapter->tc, ns);\n \tspin_unlock_irqrestore(&adapter->systim_lock, flags);\n \n \treturn 0;\ndiff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h\nindex 9284569..4eac4f2 100644\n--- a/drivers/net/ethernet/intel/igb/igb.h\n+++ b/drivers/net/ethernet/intel/igb/igb.h\n@@ -565,7 +565,6 @@ struct igb_adapter {\n \tunsigned long last_rx_timestamp;\n \tunsigned int ptp_flags;\n \tspinlock_t tmreg_lock;\n-\tstruct cyclecounter cc;\n \tstruct timecounter tc;\n \tu32 tx_hwtstamp_timeouts;\n \tu32 tx_hwtstamp_skipped;\ndiff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c\nindex 841c2a0..0745eff 100644\n--- a/drivers/net/ethernet/intel/igb/igb_ptp.c\n+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c\n@@ -79,7 +79,7 @@\n /* SYSTIM read access for the 82576 */\n static u64 igb_ptp_read_82576(const struct cyclecounter *cc)\n {\n-\tstruct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);\n+\tstruct igb_adapter *igb = container_of(cc, struct igb_adapter, tc.cc);\n \tstruct e1000_hw *hw = &igb->hw;\n \tu64 val;\n \tu32 lo, hi;\n@@ -96,7 +96,7 @@ static u64 igb_ptp_read_82576(const struct cyclecounter *cc)\n /* SYSTIM read access for the 82580 */\n static u64 igb_ptp_read_82580(const struct cyclecounter *cc)\n {\n-\tstruct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);\n+\tstruct igb_adapter *igb = container_of(cc, struct igb_adapter, tc.cc);\n \tstruct e1000_hw *hw = &igb->hw;\n \tu32 lo, hi;\n \tu64 val;\n@@ -330,7 +330,7 @@ static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,\n \n \tspin_lock_irqsave(&igb->tmreg_lock, flags);\n \n-\ttimecounter_init(&igb->tc, &igb->cc, ns);\n+\ttimecounter_init(&igb->tc, ns);\n \n \tspin_unlock_irqrestore(&igb->tmreg_lock, flags);\n \n@@ -1126,10 +1126,10 @@ void igb_ptp_init(struct igb_adapter *adapter)\n \t\tadapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;\n \t\tadapter->ptp_caps.settime64 = igb_ptp_settime_82576;\n \t\tadapter->ptp_caps.enable = igb_ptp_feature_enable;\n-\t\tadapter->cc.read = igb_ptp_read_82576;\n-\t\tadapter->cc.mask = CYCLECOUNTER_MASK(64);\n-\t\tadapter->cc.mult = 1;\n-\t\tadapter->cc.shift = IGB_82576_TSYNC_SHIFT;\n+\t\tadapter->tc.cc.read = igb_ptp_read_82576;\n+\t\tadapter->tc.cc.mask = CYCLECOUNTER_MASK(64);\n+\t\tadapter->tc.cc.mult = 1;\n+\t\tadapter->tc.cc.shift = IGB_82576_TSYNC_SHIFT;\n \t\tadapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;\n \t\tbreak;\n \tcase e1000_82580:\n@@ -1145,10 +1145,10 @@ void igb_ptp_init(struct igb_adapter *adapter)\n \t\tadapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;\n \t\tadapter->ptp_caps.settime64 = igb_ptp_settime_82576;\n \t\tadapter->ptp_caps.enable = igb_ptp_feature_enable;\n-\t\tadapter->cc.read = igb_ptp_read_82580;\n-\t\tadapter->cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);\n-\t\tadapter->cc.mult = 1;\n-\t\tadapter->cc.shift = 0;\n+\t\tadapter->tc.cc.read = igb_ptp_read_82580;\n+\t\tadapter->tc.cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);\n+\t\tadapter->tc.cc.mult = 1;\n+\t\tadapter->tc.cc.shift = 0;\n \t\tadapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;\n \t\tbreak;\n \tcase e1000_i210:\n@@ -1289,8 +1289,7 @@ void igb_ptp_reset(struct igb_adapter *adapter)\n \n \t\tigb_ptp_write_i210(adapter, &ts);\n \t} else {\n-\t\ttimecounter_init(&adapter->tc, &adapter->cc,\n-\t\t\t\t ktime_to_ns(ktime_get_real()));\n+\t\ttimecounter_init(&adapter->tc, ktime_to_ns(ktime_get_real()));\n \t}\n out:\n \tspin_unlock_irqrestore(&adapter->tmreg_lock, flags);\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\nindex 468c355..5c391a0 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n@@ -738,7 +738,6 @@ struct ixgbe_adapter {\n \tunsigned long last_rx_ptp_check;\n \tunsigned long last_rx_timestamp;\n \tspinlock_t tmreg_lock;\n-\tstruct cyclecounter hw_cc;\n \tstruct timecounter hw_tc;\n \tu32 base_incval;\n \tu32 tx_hwtstamp_timeouts;\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c\nindex ae312c4..6e9f2c0 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c\n@@ -179,7 +179,7 @@\n static void ixgbe_ptp_setup_sdp_x540(struct ixgbe_adapter *adapter)\n {\n \tstruct ixgbe_hw *hw = &adapter->hw;\n-\tint shift = adapter->hw_cc.shift;\n+\tint shift = adapter->hw_tc.cc.shift;\n \tu32 esdp, tsauxc, clktiml, clktimh, trgttiml, trgttimh, rem;\n \tu64 ns = 0, clock_edge = 0;\n \n@@ -237,7 +237,7 @@ static void ixgbe_ptp_setup_sdp_x540(struct ixgbe_adapter *adapter)\n \n /**\n * ixgbe_ptp_read_X550 - read cycle counter value\n- * @hw_cc: cyclecounter structure\n+ * @cc: cyclecounter structure\n *\n * This function reads SYSTIME registers. It is called by the cyclecounter\n * structure to convert from internal representation into nanoseconds. We need\n@@ -245,10 +245,10 @@ static void ixgbe_ptp_setup_sdp_x540(struct ixgbe_adapter *adapter)\n * result of SYSTIME is 32bits of \"billions of cycles\" and 32 bits of\n * \"cycles\", rather than seconds and nanoseconds.\n */\n-static u64 ixgbe_ptp_read_X550(const struct cyclecounter *hw_cc)\n+static u64 ixgbe_ptp_read_X550(const struct cyclecounter *cc)\n {\n \tstruct ixgbe_adapter *adapter =\n-\t\t\tcontainer_of(hw_cc, struct ixgbe_adapter, hw_cc);\n+\t\t\tcontainer_of(cc, struct ixgbe_adapter, hw_tc.cc);\n \tstruct ixgbe_hw *hw = &adapter->hw;\n \tstruct timespec64 ts;\n \n@@ -285,7 +285,7 @@ static u64 ixgbe_ptp_read_X550(const struct cyclecounter *hw_cc)\n static u64 ixgbe_ptp_read_82599(const struct cyclecounter *cc)\n {\n \tstruct ixgbe_adapter *adapter =\n-\t\tcontainer_of(cc, struct ixgbe_adapter, hw_cc);\n+\t\tcontainer_of(cc, struct ixgbe_adapter, hw_tc.cc);\n \tstruct ixgbe_hw *hw = &adapter->hw;\n \tu64 stamp = 0;\n \n@@ -508,7 +508,7 @@ static int ixgbe_ptp_settime(struct ptp_clock_info *ptp,\n \n \t/* reset the timecounter */\n \tspin_lock_irqsave(&adapter->tmreg_lock, flags);\n-\ttimecounter_init(&adapter->hw_tc, &adapter->hw_cc, ns);\n+\ttimecounter_init(&adapter->hw_tc, ns);\n \tspin_unlock_irqrestore(&adapter->tmreg_lock, flags);\n \n \tif (adapter->ptp_setup_sdp)\n@@ -1164,7 +1164,7 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter)\n \n \t/* need lock to prevent incorrect read while modifying cyclecounter */\n \tspin_lock_irqsave(&adapter->tmreg_lock, flags);\n-\tmemcpy(&adapter->hw_cc, &cc, sizeof(adapter->hw_cc));\n+\tmemcpy(&adapter->hw_tc.cc, &cc, sizeof(adapter->hw_tc.cc));\n \tspin_unlock_irqrestore(&adapter->tmreg_lock, flags);\n }\n \n@@ -1195,8 +1195,7 @@ void ixgbe_ptp_reset(struct ixgbe_adapter *adapter)\n \tixgbe_ptp_start_cyclecounter(adapter);\n \n \tspin_lock_irqsave(&adapter->tmreg_lock, flags);\n-\ttimecounter_init(&adapter->hw_tc, &adapter->hw_cc,\n-\t\t\t ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&adapter->hw_tc, ktime_to_ns(ktime_get_real()));\n \tspin_unlock_irqrestore(&adapter->tmreg_lock, flags);\n \n \tadapter->last_overflow_check = jiffies;\ndiff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c\nindex 0247885..35987b5 100644\n--- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c\n+++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c\n@@ -38,13 +38,13 @@\n \n /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)\n */\n-static u64 mlx4_en_read_clock(const struct cyclecounter *tc)\n+static u64 mlx4_en_read_clock(const struct cyclecounter *cc)\n {\n \tstruct mlx4_en_dev *mdev =\n-\t\tcontainer_of(tc, struct mlx4_en_dev, cycles);\n+\t\tcontainer_of(cc, struct mlx4_en_dev, clock.cc);\n \tstruct mlx4_dev *dev = mdev->dev;\n \n-\treturn mlx4_read_clock(dev) & tc->mask;\n+\treturn mlx4_read_clock(dev) & cc->mask;\n }\n \n u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)\n@@ -138,7 +138,7 @@ static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)\n \n \twrite_seqlock_irqsave(&mdev->clock_lock, flags);\n \ttimecounter_read(&mdev->clock);\n-\tmdev->cycles.mult = neg_adj ? mult - diff : mult + diff;\n+\tmdev->clock.cc.mult = neg_adj ? mult - diff : mult + diff;\n \twrite_sequnlock_irqrestore(&mdev->clock_lock, flags);\n \n \treturn 0;\n@@ -207,7 +207,7 @@ static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,\n \n \t/* reset the timecounter */\n \twrite_seqlock_irqsave(&mdev->clock_lock, flags);\n-\ttimecounter_init(&mdev->clock, &mdev->cycles, ns);\n+\ttimecounter_init(&mdev->clock, ns);\n \twrite_sequnlock_irqrestore(&mdev->clock_lock, flags);\n \n \treturn 0;\n@@ -274,17 +274,17 @@ void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)\n \n \tseqlock_init(&mdev->clock_lock);\n \n-\tmemset(&mdev->cycles, 0, sizeof(mdev->cycles));\n-\tmdev->cycles.read = mlx4_en_read_clock;\n-\tmdev->cycles.mask = CLOCKSOURCE_MASK(48);\n-\tmdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock);\n-\tmdev->cycles.mult =\n-\t\tclocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);\n-\tmdev->nominal_c_mult = mdev->cycles.mult;\n+\tmemset(&mdev->clock.cc, 0, sizeof(mdev->clock.cc));\n+\tmdev->clock.cc.read = mlx4_en_read_clock;\n+\tmdev->clock.cc.mask = CLOCKSOURCE_MASK(48);\n+\tmdev->clock.cc.shift = freq_to_shift(dev->caps.hca_core_clock);\n+\tmdev->clock.cc.mult =\n+\t\tclocksource_khz2mult(1000 * dev->caps.hca_core_clock,\n+\t\t\t\t mdev->clock.cc.shift);\n+\tmdev->nominal_c_mult = mdev->clock.cc.mult;\n \n \twrite_seqlock_irqsave(&mdev->clock_lock, flags);\n-\ttimecounter_init(&mdev->clock, &mdev->cycles,\n-\t\t\t ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&mdev->clock, ktime_to_ns(ktime_get_real()));\n \twrite_sequnlock_irqrestore(&mdev->clock_lock, flags);\n \n \t/* Configure the PHC */\ndiff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h\nindex 1856e27..e301dcf 100644\n--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h\n+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h\n@@ -422,7 +422,6 @@ struct mlx4_en_dev {\n \tspinlock_t uar_lock;\n \tu8\t\t\tmac_removed[MLX4_MAX_PORTS + 1];\n \tu32\t\t\tnominal_c_mult;\n-\tstruct cyclecounter\tcycles;\n \tseqlock_t\t\tclock_lock;\n \tstruct timecounter\tclock;\n \tunsigned long\t\tlast_overflow_check;\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c\nindex fa8aed6..8cb6838 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c\n@@ -64,7 +64,7 @@ enum {\n \n static u64 read_internal_timer(const struct cyclecounter *cc)\n {\n-\tstruct mlx5_clock *clock = container_of(cc, struct mlx5_clock, cycles);\n+\tstruct mlx5_clock *clock = container_of(cc, struct mlx5_clock, tc.cc);\n \tstruct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev,\n \t\t\t\t\t\t clock);\n \n@@ -122,7 +122,7 @@ static int mlx5_ptp_settime(struct ptp_clock_info *ptp,\n \tunsigned long flags;\n \n \twrite_lock_irqsave(&clock->lock, flags);\n-\ttimecounter_init(&clock->tc, &clock->cycles, ns);\n+\ttimecounter_init(&clock->tc, ns);\n \twrite_unlock_irqrestore(&clock->lock, flags);\n \n \treturn 0;\n@@ -177,8 +177,8 @@ static int mlx5_ptp_adjfreq(struct ptp_clock_info *ptp, s32 delta)\n \n \twrite_lock_irqsave(&clock->lock, flags);\n \ttimecounter_read(&clock->tc);\n-\tclock->cycles.mult = neg_adj ? clock->nominal_c_mult - diff :\n-\t\t\t\t clock->nominal_c_mult + diff;\n+\tclock->tc.cc.mult = neg_adj ? clock->nominal_c_mult - diff :\n+\t\t\t\t clock->nominal_c_mult + diff;\n \twrite_unlock_irqrestore(&clock->lock, flags);\n \n \treturn 0;\n@@ -281,8 +281,8 @@ static int mlx5_perout_configure(struct ptp_clock_info *ptp,\n \t\twrite_lock_irqsave(&clock->lock, flags);\n \t\tnsec_now = timecounter_cyc2time(&clock->tc, cycles_now);\n \t\tnsec_delta = ns - nsec_now;\n-\t\tcycles_delta = div64_u64(nsec_delta << clock->cycles.shift,\n-\t\t\t\t\t clock->cycles.mult);\n+\t\tcycles_delta = div64_u64(nsec_delta << clock->tc.cc.shift,\n+\t\t\t\t\t clock->tc.cc.mult);\n \t\twrite_unlock_irqrestore(&clock->lock, flags);\n \t\ttime_stamp = cycles_now + cycles_delta;\n \t\tfield_select = MLX5_MTPPS_FS_PIN_MODE |\n@@ -440,8 +440,8 @@ void mlx5_pps_event(struct mlx5_core_dev *mdev,\n \t\twrite_lock_irqsave(&clock->lock, flags);\n \t\tnsec_now = timecounter_cyc2time(&clock->tc, cycles_now);\n \t\tnsec_delta = ns - nsec_now;\n-\t\tcycles_delta = div64_u64(nsec_delta << clock->cycles.shift,\n-\t\t\t\t\t clock->cycles.mult);\n+\t\tcycles_delta = div64_u64(nsec_delta << clock->tc.cc.shift,\n+\t\t\t\t\t clock->tc.cc.mult);\n \t\tclock->pps_info.start[pin] = cycles_now + cycles_delta;\n \t\tschedule_work(&clock->pps_info.out_work);\n \t\twrite_unlock_irqrestore(&clock->lock, flags);\n@@ -454,6 +454,7 @@ void mlx5_pps_event(struct mlx5_core_dev *mdev,\n void mlx5_init_clock(struct mlx5_core_dev *mdev)\n {\n \tstruct mlx5_clock *clock = &mdev->clock;\n+\tstruct cyclecounter *cc = &clock->tc.cc;\n \tu64 ns;\n \tu64 frac = 0;\n \tu32 dev_freq;\n@@ -464,21 +465,18 @@ void mlx5_init_clock(struct mlx5_core_dev *mdev)\n \t\treturn;\n \t}\n \trwlock_init(&clock->lock);\n-\tclock->cycles.read = read_internal_timer;\n-\tclock->cycles.shift = MLX5_CYCLES_SHIFT;\n-\tclock->cycles.mult = clocksource_khz2mult(dev_freq,\n-\t\t\t\t\t\t clock->cycles.shift);\n-\tclock->nominal_c_mult = clock->cycles.mult;\n-\tclock->cycles.mask = CLOCKSOURCE_MASK(41);\n+\tcc->read = read_internal_timer;\n+\tcc->shift = MLX5_CYCLES_SHIFT;\n+\tcc->mult = clocksource_khz2mult(dev_freq, cc->shift);\n+\tclock->nominal_c_mult = cc->mult;\n+\tcc->mask = CLOCKSOURCE_MASK(41);\n \n-\ttimecounter_init(&clock->tc, &clock->cycles,\n-\t\t\t ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&clock->tc, ktime_to_ns(ktime_get_real()));\n \n \t/* Calculate period in seconds to call the overflow watchdog - to make\n \t * sure counter is checked at least once every wrap around.\n \t */\n-\tns = cyclecounter_cyc2ns(&clock->cycles, clock->cycles.mask,\n-\t\t\t\t frac, &frac);\n+\tns = cyclecounter_cyc2ns(cc, cc->mask, frac, &frac);\n \tdo_div(ns, NSEC_PER_SEC / 2 / HZ);\n \tclock->overflow_period = ns;\n \ndiff --git a/drivers/net/ethernet/qlogic/qede/qede_ptp.c b/drivers/net/ethernet/qlogic/qede/qede_ptp.c\nindex 9b2280b..95bb8a8 100644\n--- a/drivers/net/ethernet/qlogic/qede/qede_ptp.c\n+++ b/drivers/net/ethernet/qlogic/qede/qede_ptp.c\n@@ -34,7 +34,6 @@\n struct qede_ptp {\n \tconst struct qed_eth_ptp_ops\t*ops;\n \tstruct ptp_clock_info\t\tclock_info;\n-\tstruct cyclecounter\t\tcc;\n \tstruct timecounter\t\ttc;\n \tstruct ptp_clock\t\t*clock;\n \tstruct work_struct\t\twork;\n@@ -132,7 +131,7 @@ static int qede_ptp_settime(struct ptp_clock_info *info,\n \n \t/* Re-init the timecounter */\n \tspin_lock_bh(&ptp->lock);\n-\ttimecounter_init(&ptp->tc, &ptp->cc, ns);\n+\ttimecounter_init(&ptp->tc, ns);\n \tspin_unlock_bh(&ptp->lock);\n \n \treturn 0;\n@@ -196,7 +195,7 @@ static u64 qede_ptp_read_cc(const struct cyclecounter *cc)\n \tu64 phc_cycles;\n \tint rc;\n \n-\tptp = container_of(cc, struct qede_ptp, cc);\n+\tptp = container_of(cc, struct qede_ptp, tc.cc);\n \tedev = ptp->edev;\n \trc = ptp->ops->read_cc(edev->cdev, &phc_cycles);\n \tif (rc)\n@@ -428,14 +427,13 @@ static int qede_ptp_init(struct qede_dev *edev, bool init_tc)\n \t * unload / load (e.g. MTU change) while it is running.\n \t */\n \tif (init_tc) {\n-\t\tmemset(&ptp->cc, 0, sizeof(ptp->cc));\n-\t\tptp->cc.read = qede_ptp_read_cc;\n-\t\tptp->cc.mask = CYCLECOUNTER_MASK(64);\n-\t\tptp->cc.shift = 0;\n-\t\tptp->cc.mult = 1;\n-\n-\t\ttimecounter_init(&ptp->tc, &ptp->cc,\n-\t\t\t\t ktime_to_ns(ktime_get_real()));\n+\t\tmemset(&ptp->tc.cc, 0, sizeof(ptp->tc.cc));\n+\t\tptp->tc.cc.read = qede_ptp_read_cc;\n+\t\tptp->tc.cc.mask = CYCLECOUNTER_MASK(64);\n+\t\tptp->tc.cc.shift = 0;\n+\t\tptp->tc.cc.mult = 1;\n+\n+\t\ttimecounter_init(&ptp->tc, ktime_to_ns(ktime_get_real()));\n \t}\n \n \treturn rc;\ndiff --git a/drivers/net/ethernet/ti/cpts.c b/drivers/net/ethernet/ti/cpts.c\nindex e7b76f6..b8fe843 100644\n--- a/drivers/net/ethernet/ti/cpts.c\n+++ b/drivers/net/ethernet/ti/cpts.c\n@@ -182,7 +182,7 @@ static u64 cpts_systim_read(const struct cyclecounter *cc)\n \tu64 val = 0;\n \tstruct cpts_event *event;\n \tstruct list_head *this, *next;\n-\tstruct cpts *cpts = container_of(cc, struct cpts, cc);\n+\tstruct cpts *cpts = container_of(cc, struct cpts, tc.cc);\n \n \tcpts_write32(cpts, TS_PUSH, ts_push);\n \tif (cpts_fifo_read(cpts, CPTS_EV_PUSH))\n@@ -224,7 +224,7 @@ static int cpts_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)\n \n \ttimecounter_read(&cpts->tc);\n \n-\tcpts->cc.mult = neg_adj ? mult - diff : mult + diff;\n+\tcpts->tc.cc.mult = neg_adj ? mult - diff : mult + diff;\n \n \tspin_unlock_irqrestore(&cpts->lock, flags);\n \n@@ -268,7 +268,7 @@ static int cpts_ptp_settime(struct ptp_clock_info *ptp,\n \tns = timespec64_to_ns(ts);\n \n \tspin_lock_irqsave(&cpts->lock, flags);\n-\ttimecounter_init(&cpts->tc, &cpts->cc, ns);\n+\ttimecounter_init(&cpts->tc, ns);\n \tspin_unlock_irqrestore(&cpts->lock, flags);\n \n \treturn 0;\n@@ -447,7 +447,7 @@ int cpts_register(struct cpts *cpts)\n \tcpts_write32(cpts, CPTS_EN, control);\n \tcpts_write32(cpts, TS_PEND_EN, int_enable);\n \n-\ttimecounter_init(&cpts->tc, &cpts->cc, ktime_to_ns(ktime_get_real()));\n+\ttimecounter_init(&cpts->tc, ktime_to_ns(ktime_get_real()));\n \n \tcpts->clock = ptp_clock_register(&cpts->info, cpts->dev);\n \tif (IS_ERR(cpts->clock)) {\n@@ -486,6 +486,7 @@ void cpts_unregister(struct cpts *cpts)\n \n static void cpts_calc_mult_shift(struct cpts *cpts)\n {\n+\tstruct cyclecounter *cc = &cpts->tc.cc;\n \tu64 frac, maxsec, ns;\n \tu32 freq;\n \n@@ -494,7 +495,7 @@ static void cpts_calc_mult_shift(struct cpts *cpts)\n \t/* Calc the maximum number of seconds which we can run before\n \t * wrapping around.\n \t */\n-\tmaxsec = cpts->cc.mask;\n+\tmaxsec = cc->mask;\n \tdo_div(maxsec, freq);\n \t/* limit conversation rate to 10 sec as higher values will produce\n \t * too small mult factors and so reduce the conversion accuracy\n@@ -507,18 +508,19 @@ static void cpts_calc_mult_shift(struct cpts *cpts)\n \tdev_info(cpts->dev, \"cpts: overflow check period %lu (jiffies)\\n\",\n \t\t cpts->ov_check_period);\n \n-\tif (cpts->cc.mult || cpts->cc.shift)\n+\tif (cc->mult || cc->shift)\n \t\treturn;\n \n-\tclocks_calc_mult_shift(&cpts->cc.mult, &cpts->cc.shift,\n+\tclocks_calc_mult_shift(&cc->mult, &cc->shift,\n \t\t\t freq, NSEC_PER_SEC, maxsec);\n \n \tfrac = 0;\n-\tns = cyclecounter_cyc2ns(&cpts->cc, freq, cpts->cc.mask, &frac);\n+\tns = cyclecounter_cyc2ns(cc, freq, cc->mask, &frac);\n \n \tdev_info(cpts->dev,\n \t\t \"CPTS: ref_clk_freq:%u calc_mult:%u calc_shift:%u error:%lld nsec/sec\\n\",\n-\t\t freq, cpts->cc.mult, cpts->cc.shift, (ns - NSEC_PER_SEC));\n+\t\t freq, cc->mult, cc->shift,\n+\t\t (ns - NSEC_PER_SEC));\n }\n \n static int cpts_of_parse(struct cpts *cpts, struct device_node *node)\n@@ -527,13 +529,13 @@ static int cpts_of_parse(struct cpts *cpts, struct device_node *node)\n \tu32 prop;\n \n \tif (!of_property_read_u32(node, \"cpts_clock_mult\", &prop))\n-\t\tcpts->cc.mult = prop;\n+\t\tcpts->tc.cc.mult = prop;\n \n \tif (!of_property_read_u32(node, \"cpts_clock_shift\", &prop))\n-\t\tcpts->cc.shift = prop;\n+\t\tcpts->tc.cc.shift = prop;\n \n-\tif ((cpts->cc.mult && !cpts->cc.shift) ||\n-\t (!cpts->cc.mult && cpts->cc.shift))\n+\tif ((cpts->tc.cc.mult && !cpts->tc.cc.shift) ||\n+\t (!cpts->tc.cc.mult && cpts->tc.cc.shift))\n \t\tgoto of_error;\n \n \treturn 0;\n@@ -569,15 +571,15 @@ struct cpts *cpts_create(struct device *dev, void __iomem *regs,\n \n \tclk_prepare(cpts->refclk);\n \n-\tcpts->cc.read = cpts_systim_read;\n-\tcpts->cc.mask = CLOCKSOURCE_MASK(32);\n+\tcpts->tc.cc.read = cpts_systim_read;\n+\tcpts->tc.cc.mask = CLOCKSOURCE_MASK(32);\n \tcpts->info = cpts_info;\n \n \tcpts_calc_mult_shift(cpts);\n-\t/* save cc.mult original value as it can be modified\n+\t/* save tc.cc.mult original value as it can be modified\n \t * by cpts_ptp_adjfreq().\n \t */\n-\tcpts->cc_mult = cpts->cc.mult;\n+\tcpts->cc_mult = cpts->tc.cc.mult;\n \n \treturn cpts;\n }\ndiff --git a/drivers/net/ethernet/ti/cpts.h b/drivers/net/ethernet/ti/cpts.h\nindex 73d73fa..a7174eb 100644\n--- a/drivers/net/ethernet/ti/cpts.h\n+++ b/drivers/net/ethernet/ti/cpts.h\n@@ -117,7 +117,6 @@ struct cpts {\n \tstruct ptp_clock *clock;\n \tspinlock_t lock; /* protects time registers */\n \tu32 cc_mult; /* for the nominal frequency */\n-\tstruct cyclecounter cc;\n \tstruct timecounter tc;\n \tint phc_index;\n \tstruct clk *refclk;\ndiff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h\nindex a886b51..c81c615 100644\n--- a/include/linux/mlx5/driver.h\n+++ b/include/linux/mlx5/driver.h\n@@ -780,7 +780,6 @@ struct mlx5_pps {\n \n struct mlx5_clock {\n \trwlock_t lock;\n-\tstruct cyclecounter cycles;\n \tstruct timecounter tc;\n \tstruct hwtstamp_config hwtstamp_config;\n \tu32 nominal_c_mult;\ndiff --git a/include/linux/timecounter.h b/include/linux/timecounter.h\nindex 2496ad4..6daca06 100644\n--- a/include/linux/timecounter.h\n+++ b/include/linux/timecounter.h\n@@ -62,7 +62,7 @@ struct cyclecounter {\n * @frac:\t\taccumulated fractional nanoseconds\n */\n struct timecounter {\n-\tconst struct cyclecounter *cc;\n+\tstruct cyclecounter cc;\n \tu64 cycle_last;\n \tu64 nsec;\n \tu64 mask;\n@@ -98,7 +98,6 @@ static inline void timecounter_adjtime(struct timecounter *tc, s64 delta)\n /**\n * timecounter_init - initialize a time counter\n * @tc:\t\t\tPointer to time counter which is to be initialized/reset\n- * @cc:\t\t\tA cycle counter, ready to be used.\n * @start_tstamp:\tArbitrary initial time stamp.\n *\n * After this call the current cycle register (roughly) corresponds to\n@@ -106,7 +105,6 @@ static inline void timecounter_adjtime(struct timecounter *tc, s64 delta)\n * the time stamp counter by the number of elapsed nanoseconds.\n */\n extern void timecounter_init(struct timecounter *tc,\n-\t\t\t const struct cyclecounter *cc,\n \t\t\t u64 start_tstamp);\n \n /**\ndiff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h\nindex 68169e3..3061f44 100644\n--- a/include/sound/hdaudio.h\n+++ b/include/sound/hdaudio.h\n@@ -445,7 +445,6 @@ struct hdac_stream {\n \tunsigned long start_wallclk;\t/* start + minimum wallclk */\n \tunsigned long period_wallclk;\t/* wallclk for period */\n \tstruct timecounter tc;\n-\tstruct cyclecounter cc;\n \tint delay_negative_threshold;\n \n \tstruct list_head list;\ndiff --git a/kernel/time/timecounter.c b/kernel/time/timecounter.c\nindex 8afd789..7919acb 100644\n--- a/kernel/time/timecounter.c\n+++ b/kernel/time/timecounter.c\n@@ -18,11 +18,10 @@\n #include <linux/export.h>\n #include <linux/timecounter.h>\n \n-void timecounter_init(struct timecounter *tc,\n-\t\t const struct cyclecounter *cc,\n-\t\t u64 start_tstamp)\n+void timecounter_init(struct timecounter *tc, u64 start_tstamp)\n {\n-\ttc->cc = cc;\n+\tstruct cyclecounter *cc = &tc->cc;\n+\n \ttc->cycle_last = cc->read(cc);\n \ttc->nsec = start_tstamp;\n \ttc->mask = (1ULL << cc->shift) - 1;\n@@ -43,17 +42,18 @@ void timecounter_init(struct timecounter *tc,\n */\n static u64 timecounter_read_delta(struct timecounter *tc)\n {\n+\tstruct cyclecounter *cc = &tc->cc;\n \tu64 cycle_now, cycle_delta;\n \tu64 ns_offset;\n \n \t/* read cycle counter: */\n-\tcycle_now = tc->cc->read(tc->cc);\n+\tcycle_now = cc->read(cc);\n \n \t/* calculate the delta since the last timecounter_read_delta(): */\n-\tcycle_delta = (cycle_now - tc->cycle_last) & tc->cc->mask;\n+\tcycle_delta = (cycle_now - tc->cycle_last) & cc->mask;\n \n \t/* convert to nanoseconds: */\n-\tns_offset = cyclecounter_cyc2ns(tc->cc, cycle_delta,\n+\tns_offset = cyclecounter_cyc2ns(cc, cycle_delta,\n \t\t\t\t\ttc->mask, &tc->frac);\n \n \t/* update time stamp of timecounter_read_delta() call: */\n@@ -89,10 +89,10 @@ static u64 cc_cyc2ns_backwards(const struct cyclecounter *cc,\n \treturn ns;\n }\n \n-u64 timecounter_cyc2time(struct timecounter *tc,\n-\t\t\t u64 cycle_tstamp)\n+u64 timecounter_cyc2time(struct timecounter *tc, u64 cycle_tstamp)\n {\n-\tu64 delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask;\n+\tstruct cyclecounter *cc = &tc->cc;\n+\tu64 delta = (cycle_tstamp - tc->cycle_last) & cc->mask;\n \tu64 nsec = tc->nsec, frac = tc->frac;\n \n \t/*\n@@ -100,11 +100,11 @@ u64 timecounter_cyc2time(struct timecounter *tc,\n \t * than tc->cycle_last, detect when it is too far in the\n \t * future and treat it as old time stamp instead.\n \t */\n-\tif (delta > tc->cc->mask / 2) {\n-\t\tdelta = (tc->cycle_last - cycle_tstamp) & tc->cc->mask;\n-\t\tnsec -= cc_cyc2ns_backwards(tc->cc, delta, tc->mask, frac);\n+\tif (delta > cc->mask / 2) {\n+\t\tdelta = (tc->cycle_last - cycle_tstamp) & cc->mask;\n+\t\tnsec -= cc_cyc2ns_backwards(cc, delta, tc->mask, frac);\n \t} else {\n-\t\tnsec += cyclecounter_cyc2ns(tc->cc, delta, tc->mask, &frac);\n+\t\tnsec += cyclecounter_cyc2ns(cc, delta, tc->mask, &frac);\n \t}\n \n \treturn nsec;\ndiff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c\nindex e1472c7..9426c1a 100644\n--- a/sound/hda/hdac_stream.c\n+++ b/sound/hda/hdac_stream.c\n@@ -467,7 +467,8 @@ int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,\n \n static u64 azx_cc_read(const struct cyclecounter *cc)\n {\n-\tstruct hdac_stream *azx_dev = container_of(cc, struct hdac_stream, cc);\n+\tstruct hdac_stream *azx_dev = container_of(cc, struct hdac_stream,\n+\t\t\t\t\t\t tc.cc);\n \n \treturn snd_hdac_chip_readl(azx_dev->bus, WALLCLK);\n }\n@@ -476,7 +477,7 @@ static void azx_timecounter_init(struct hdac_stream *azx_dev,\n \t\t\t\t bool force, u64 last)\n {\n \tstruct timecounter *tc = &azx_dev->tc;\n-\tstruct cyclecounter *cc = &azx_dev->cc;\n+\tstruct cyclecounter *cc = &azx_dev->tc.cc;\n \tu64 nsec;\n \n \tcc->read = azx_cc_read;\n@@ -496,7 +497,7 @@ static void azx_timecounter_init(struct hdac_stream *azx_dev,\n \tcc->shift = 0;\n \n \tnsec = 0; /* audio time is elapsed time since trigger */\n-\ttimecounter_init(tc, cc, nsec);\n+\ttimecounter_init(tc, nsec);\n \tif (force) {\n \t\t/*\n \t\t * force timecounter to use predefined value,\ndiff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c\nindex f9555b1..5683c0c 100644\n--- a/virt/kvm/arm/arch_timer.c\n+++ b/virt/kvm/arm/arch_timer.c\n@@ -53,7 +53,7 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,\n \n u64 kvm_phys_timer_read(void)\n {\n-\treturn timecounter->cc->read(timecounter->cc);\n+\treturn timecounter->cc.read(&timecounter->cc);\n }\n \n static void soft_timer_start(struct hrtimer *hrt, u64 ns)\n@@ -138,7 +138,7 @@ static u64 kvm_timer_compute_delta(struct arch_timer_context *timer_ctx)\n \tif (now < cval) {\n \t\tu64 ns;\n \n-\t\tns = cyclecounter_cyc2ns(timecounter->cc,\n+\t\tns = cyclecounter_cyc2ns(&timecounter->cc,\n \t\t\t\t\t cval - now,\n \t\t\t\t\t timecounter->mask,\n \t\t\t\t\t &timecounter->frac);\n@@ -728,7 +728,7 @@ int kvm_timer_hyp_init(void)\n \tinfo = arch_timer_get_kvm_info();\n \ttimecounter = &info->timecounter;\n \n-\tif (!timecounter->cc) {\n+\tif (!timecounter->cc.mask) {\n \t\tkvm_err(\"kvm_arch_timer: uninitialized timecounter\\n\");\n \t\treturn -ENODEV;\n \t}\n", "prefixes": [ "01/27" ] }