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GET /api/patches/840488/?format=api
{ "id": 840488, "url": "http://patchwork.ozlabs.org/api/patches/840488/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20171122185640.29785.25035.stgit@localhost.localdomain/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20171122185640.29785.25035.stgit@localhost.localdomain>", "list_archive_url": null, "date": "2017-11-22T18:56:40", "name": "[jkirsher/next-queue,05/16] ixgbe: Fix limitations on macvlan so we can support up to 63 offloaded devices", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "7e7b00549d1d00a8645b69a7fe58dc45ee6634c3", "submitter": { "id": 252, "url": "http://patchwork.ozlabs.org/api/people/252/?format=api", "name": "Alexander Duyck", "email": "alexander.duyck@gmail.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20171122185640.29785.25035.stgit@localhost.localdomain/mbox/", "series": [ { "id": 14756, "url": "http://patchwork.ozlabs.org/api/series/14756/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=14756", "date": "2017-11-22T18:56:10", "name": "ixgbe/fm10k: macvlan fixes", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/14756/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/840488/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/840488/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.137; helo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"fbOh5UGs\"; dkim-atps=neutral" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yhsXj3cGvz9ryv\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 23 Nov 2017 06:12:37 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 0D9BD87A1F;\n\tWed, 22 Nov 2017 19:12:36 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id nEVq95xPDJc6; Wed, 22 Nov 2017 19:12:32 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 7366E87A3A;\n\tWed, 22 Nov 2017 19:12:31 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 7487E1C2314\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 22 Nov 2017 18:56:43 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 6CFF087966\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 22 Nov 2017 18:56:43 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 6YyF3DCTM5uq for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 22 Nov 2017 18:56:42 +0000 (UTC)", "from mail-pf0-f194.google.com (mail-pf0-f194.google.com\n\t[209.85.192.194])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id 89D3B87963\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 22 Nov 2017 18:56:42 +0000 (UTC)", "by mail-pf0-f194.google.com with SMTP id i15so12464339pfa.3\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 22 Nov 2017 10:56:42 -0800 (PST)", "from localhost.localdomain ([2001:470:b:9c3:9e5c:8eff:fe4f:f2d0])\n\tby smtp.gmail.com with ESMTPSA id\n\tu13sm24584499pgb.68.2017.11.22.10.56.41\n\tfor <intel-wired-lan@lists.osuosl.org>\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tWed, 22 Nov 2017 10:56:41 -0800 (PST)" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=subject:from:to:date:message-id:in-reply-to:references:user-agent\n\t:mime-version:content-transfer-encoding;\n\tbh=IA9KMdTzxxWQyvA56BsAk47ooW4/rzlXySq8d8z+EMI=;\n\tb=fbOh5UGsUjdvYBFw+r1ZnyYsmlnBJY5Wa43XbSO1GilKnMpEaGmO5b6TVK23wvtXom\n\twrBkrSC93NiynySgyrwBZFvzK5GKD1YJRckYSiCo7mDqOeACrwCT8HX+kqOfqEN+VHkJ\n\tvyinFr8w9fFIQTTG7z2Gf7fH18jFP1m1rPj8+l1kgzloahD63PDD9pu5X3q4wvmUheH3\n\toEL39if5cBHrrDXQ+OIp3Z6Nl8hpTF5+WQFvSOYgXCfaEp+FOFq5w4NsTSaini/iKhFi\n\tao5Uq/NpsItWxik9ooRP2zCqeo9D2H8o0dQmdOvXmX4o+jMKsuhowb2WA3DtTlV53Tdf\n\tgBnw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:subject:from:to:date:message-id:in-reply-to\n\t:references:user-agent:mime-version:content-transfer-encoding;\n\tbh=IA9KMdTzxxWQyvA56BsAk47ooW4/rzlXySq8d8z+EMI=;\n\tb=DxXCEmyWsVnfL9GPyA6CCheiF5gctznflsLnUAj/EOK21PLnWYE5WOi30Kun+lgo4n\n\t4urldCezt7oqS5dBtQ7XRTCy7wURY9dQT/oCyo/p0QaJBZ5nyPDeWi4pmFsC5l6ccimH\n\td2uHHiHUhkkes+p4QVh04TAL6U59hxPdoKeDro2OzV+9AXKSFq2DGGgxZ96Kusnv703M\n\t7mRAaAgyFhnW5HdHCXJP9nOUybNpGYM406p6XVRHgWQgSeGDjy9LLODempmUcbxczVWa\n\tJBVvkOV/Stz7Oqxpz6gXxsfjP1UHej7NTfn1+IxC5LRvyl8pQ8hsgQ/jPLZNlZKrTtwX\n\tXDjQ==", "X-Gm-Message-State": "AJaThX6ieajH8Y6QRT2jLuL9CzIbJEfj853G7sTs/pC3qwhtY0Gio9bG\n\t0bHlq+2T17s6eFYrlvriR9NvwbPR", "X-Google-Smtp-Source": "AGs4zMZLIbLHxom0u4Qik8ontbnwmTV1tcOp5H128XAo6wsTDBLVbsftsSMZvvN3LmTBYdYRmxvd0g==", "X-Received": "by 10.101.101.151 with SMTP id u23mr13266587pgv.74.1511377001747;\n\tWed, 22 Nov 2017 10:56:41 -0800 (PST)", "From": "Alexander Duyck <alexander.duyck@gmail.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 22 Nov 2017 10:56:40 -0800", "Message-ID": "<20171122185640.29785.25035.stgit@localhost.localdomain>", "In-Reply-To": "<20171122185256.29785.93548.stgit@localhost.localdomain>", "References": "<20171122185256.29785.93548.stgit@localhost.localdomain>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [jkirsher/next-queue PATCH 05/16] ixgbe: Fix\n\tlimitations on macvlan so we can support up to 63 offloaded devices", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Alexander Duyck <alexander.h.duyck@intel.com>\n\nThis change is a fix of the macvlan offload so that we correctly handle\nmacvlan offloaded devices. Specificaly we were configuring our limits based\non the assumption that we were going to max out the RSS indices for every\nmode. As a result when we went to 15 or more macvlan interfaces we were\nforced into the 2 queue RSS mode on VFs even though they could have still\nsupported 4.\n\nThis change splits the logic up so that we limit either the total number of\nmacvlan instances if DCB is enabled, or limit the number of RSS queues used\nper macvlan (instead of per pool) if SR-IOV is enabled. By doing this we\ncan make best use of the part.\n\nIn addition I have increased the maximum number of supported interfaces to\n63 with one queue per offloaded interface as this more closely reflects the\nactual values supported by the interface.\n\nSigned-off-by: Alexander Duyck <alexander.h.duyck@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe.h | 6 ++--\n drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 9 +++++-\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 35 ++++++++++--------------\n drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c | 27 ++++++-------------\n 4 files changed, 34 insertions(+), 43 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\nindex 92a784bd2ca2..7a421b70afce 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n@@ -395,8 +395,7 @@ enum ixgbe_ring_f_enum {\n #define MAX_XDP_QUEUES\t\t\t(IXGBE_MAX_FDIR_INDICES + 1)\n #define IXGBE_MAX_L2A_QUEUES\t\t4\n #define IXGBE_BAD_L2A_QUEUE\t\t3\n-#define IXGBE_MAX_MACVLANS\t\t31\n-#define IXGBE_MAX_DCBMACVLANS\t\t8\n+#define IXGBE_MAX_MACVLANS\t\t63\n \n struct ixgbe_ring_feature {\n \tu16 limit;\t/* upper limit on feature indices */\n@@ -765,7 +764,8 @@ struct ixgbe_adapter {\n #endif /*CONFIG_DEBUG_FS*/\n \n \tu8 default_up;\n-\tunsigned long fwd_bitmask; /* Bitmask indicating in use pools */\n+\t/* Bitmask indicating in use pools */\n+\tDECLARE_BITMAP(fwd_bitmask, IXGBE_MAX_MACVLANS + 1);\n \n #define IXGBE_MAX_LINK_HANDLE 10\n \tstruct ixgbe_jump_table *jump_tables[IXGBE_MAX_LINK_HANDLE];\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c\nindex 56622adc76dc..cceafbc3f1db 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c\n@@ -350,6 +350,9 @@ static bool ixgbe_set_dcb_sriov_queues(struct ixgbe_adapter *adapter)\n \tif (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))\n \t\treturn false;\n \n+\t/* limit VMDq instances on the PF by number of Tx queues */\n+\tvmdq_i = min_t(u16, vmdq_i, MAX_TX_QUEUES / tcs);\n+\n \t/* Add starting offset to total pool count */\n \tvmdq_i += adapter->ring_feature[RING_F_VMDQ].offset;\n \n@@ -512,12 +515,14 @@ static bool ixgbe_set_sriov_queues(struct ixgbe_adapter *adapter)\n #ifdef IXGBE_FCOE\n \tu16 fcoe_i = 0;\n #endif\n-\tbool pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);\n \n \t/* only proceed if SR-IOV is enabled */\n \tif (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))\n \t\treturn false;\n \n+\t/* limit l2fwd RSS based on total Tx queue limit */\n+\trss_i = min_t(u16, rss_i, MAX_TX_QUEUES / vmdq_i);\n+\n \t/* Add starting offset to total pool count */\n \tvmdq_i += adapter->ring_feature[RING_F_VMDQ].offset;\n \n@@ -525,7 +530,7 @@ static bool ixgbe_set_sriov_queues(struct ixgbe_adapter *adapter)\n \tvmdq_i = min_t(u16, IXGBE_MAX_VMDQ_INDICES, vmdq_i);\n \n \t/* 64 pool mode with 2 queues per pool */\n-\tif ((vmdq_i > 32) || (vmdq_i > 16 && pools)) {\n+\tif (vmdq_i > 32) {\n \t\tvmdq_m = IXGBE_82599_VMDQ_2Q_MASK;\n \t\trss_m = IXGBE_RSS_2Q_MASK;\n \t\trss_i = min_t(u16, rss_i, 2);\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex c1df873faf68..101b3521ab0b 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -5377,14 +5377,13 @@ static int ixgbe_fwd_ring_up(struct net_device *vdev,\n \tunsigned int rxbase, txbase, queues;\n \tint i, baseq, err = 0;\n \n-\tif (!test_bit(accel->pool, &adapter->fwd_bitmask))\n+\tif (!test_bit(accel->pool, adapter->fwd_bitmask))\n \t\treturn 0;\n \n \tbaseq = accel->pool * adapter->num_rx_queues_per_pool;\n-\tnetdev_dbg(vdev, \"pool %i:%i queues %i:%i VSI bitmask %lx\\n\",\n+\tnetdev_dbg(vdev, \"pool %i:%i queues %i:%i\\n\",\n \t\t accel->pool, adapter->num_rx_pools,\n-\t\t baseq, baseq + adapter->num_rx_queues_per_pool,\n-\t\t adapter->fwd_bitmask);\n+\t\t baseq, baseq + adapter->num_rx_queues_per_pool);\n \n \taccel->netdev = vdev;\n \taccel->rx_base_queue = rxbase = baseq;\n@@ -6282,7 +6281,7 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter,\n \t}\n \n \t/* PF holds first pool slot */\n-\tset_bit(0, &adapter->fwd_bitmask);\n+\tset_bit(0, adapter->fwd_bitmask);\n \tset_bit(__IXGBE_DOWN, &adapter->state);\n \n \treturn 0;\n@@ -8848,7 +8847,6 @@ int ixgbe_setup_tc(struct net_device *dev, u8 tc)\n {\n \tstruct ixgbe_adapter *adapter = netdev_priv(dev);\n \tstruct ixgbe_hw *hw = &adapter->hw;\n-\tbool pools;\n \n \t/* Hardware supports up to 8 traffic classes */\n \tif (tc > adapter->dcb_cfg.num_tcs.pg_tcs)\n@@ -8857,10 +8855,6 @@ int ixgbe_setup_tc(struct net_device *dev, u8 tc)\n \tif (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)\n \t\treturn -EINVAL;\n \n-\tpools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);\n-\tif (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)\n-\t\treturn -EBUSY;\n-\n \t/* Hardware has to reinitialize queues and interrupts to\n \t * match packet buffer alignment. Unfortunately, the\n \t * hardware is not flexible enough to do this dynamically.\n@@ -9797,6 +9791,7 @@ static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)\n \tstruct ixgbe_fwd_adapter *fwd_adapter = NULL;\n \tstruct ixgbe_adapter *adapter = netdev_priv(pdev);\n \tint used_pools = adapter->num_vfs + adapter->num_rx_pools;\n+\tint tcs = netdev_get_num_tc(pdev) ? : 1;\n \tunsigned int limit;\n \tint pool, err;\n \n@@ -9824,7 +9819,7 @@ static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)\n \t}\n \n \tif (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&\n-\t adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||\n+\t adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||\n \t (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))\n \t\treturn ERR_PTR(-EBUSY);\n \n@@ -9832,9 +9827,9 @@ static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)\n \tif (!fwd_adapter)\n \t\treturn ERR_PTR(-ENOMEM);\n \n-\tpool = find_first_zero_bit(&adapter->fwd_bitmask, 32);\n-\tset_bit(pool, &adapter->fwd_bitmask);\n-\tlimit = find_last_bit(&adapter->fwd_bitmask, 32);\n+\tpool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);\n+\tset_bit(pool, adapter->fwd_bitmask);\n+\tlimit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools + 1);\n \n \t/* Enable VMDq flag so device will be set in VM mode */\n \tadapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;\n@@ -9860,7 +9855,7 @@ static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)\n \t/* unwind counter and free adapter struct */\n \tnetdev_info(pdev,\n \t\t \"%s: dfwd hardware acceleration failed\\n\", vdev->name);\n-\tclear_bit(pool, &adapter->fwd_bitmask);\n+\tclear_bit(pool, adapter->fwd_bitmask);\n \tkfree(fwd_adapter);\n \treturn ERR_PTR(err);\n }\n@@ -9871,9 +9866,9 @@ static void ixgbe_fwd_del(struct net_device *pdev, void *priv)\n \tstruct ixgbe_adapter *adapter = fwd_adapter->real_adapter;\n \tunsigned int limit;\n \n-\tclear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);\n+\tclear_bit(fwd_adapter->pool, adapter->fwd_bitmask);\n \n-\tlimit = find_last_bit(&adapter->fwd_bitmask, 32);\n+\tlimit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools);\n \tadapter->ring_feature[RING_F_VMDQ].limit = limit + 1;\n \tixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);\n \n@@ -9888,11 +9883,11 @@ static void ixgbe_fwd_del(struct net_device *pdev, void *priv)\n \t}\n \n \tixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));\n-\tnetdev_dbg(pdev, \"pool %i:%i queues %i:%i VSI bitmask %lx\\n\",\n+\tnetdev_dbg(pdev, \"pool %i:%i queues %i:%i\\n\",\n \t\t fwd_adapter->pool, adapter->num_rx_pools,\n \t\t fwd_adapter->rx_base_queue,\n-\t\t fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,\n-\t\t adapter->fwd_bitmask);\n+\t\t fwd_adapter->rx_base_queue +\n+\t\t adapter->num_rx_queues_per_pool);\n \tkfree(fwd_adapter);\n }\n \ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c\nindex 15d89258fbc3..0085f4632966 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c\n@@ -290,10 +290,9 @@ static int ixgbe_pci_sriov_enable(struct pci_dev *dev, int num_vfs)\n {\n #ifdef CONFIG_PCI_IOV\n \tstruct ixgbe_adapter *adapter = pci_get_drvdata(dev);\n-\tint err = 0;\n-\tu8 num_tc;\n-\tint i;\n \tint pre_existing_vfs = pci_num_vf(dev);\n+\tint err = 0, num_rx_pools, i, limit;\n+\tu8 num_tc;\n \n \tif (pre_existing_vfs && pre_existing_vfs != num_vfs)\n \t\terr = ixgbe_disable_sriov(adapter);\n@@ -316,22 +315,14 @@ static int ixgbe_pci_sriov_enable(struct pci_dev *dev, int num_vfs)\n \t * other values out of range.\n \t */\n \tnum_tc = netdev_get_num_tc(adapter->netdev);\n+\tnum_rx_pools = adapter->num_rx_pools;\n+\tlimit = (num_tc > 4) ? IXGBE_MAX_VFS_8TC :\n+\t\t(num_tc > 1) ? IXGBE_MAX_VFS_4TC : IXGBE_MAX_VFS_1TC;\n \n-\tif (num_tc > 4) {\n-\t\tif ((num_vfs + adapter->num_rx_pools) > IXGBE_MAX_VFS_8TC) {\n-\t\t\te_dev_err(\"Currently the device is configured with %d TCs, Creating more than %d VFs is not allowed\\n\", num_tc, IXGBE_MAX_VFS_8TC);\n-\t\t\treturn -EPERM;\n-\t\t}\n-\t} else if ((num_tc > 1) && (num_tc <= 4)) {\n-\t\tif ((num_vfs + adapter->num_rx_pools) > IXGBE_MAX_VFS_4TC) {\n-\t\t\te_dev_err(\"Currently the device is configured with %d TCs, Creating more than %d VFs is not allowed\\n\", num_tc, IXGBE_MAX_VFS_4TC);\n-\t\t\treturn -EPERM;\n-\t\t}\n-\t} else {\n-\t\tif ((num_vfs + adapter->num_rx_pools) > IXGBE_MAX_VFS_1TC) {\n-\t\t\te_dev_err(\"Currently the device is configured with %d TCs, Creating more than %d VFs is not allowed\\n\", num_tc, IXGBE_MAX_VFS_1TC);\n-\t\t\treturn -EPERM;\n-\t\t}\n+\tif (num_vfs > (limit - num_rx_pools)) {\n+\t\te_dev_err(\"Currently configured with %d TCs, and %d offloaded macvlans. Creating more than %d VFs is not allowed\\n\",\n+\t\t\t num_tc, num_rx_pools - 1, limit - num_rx_pools);\n+\t\treturn -EPERM;\n \t}\n \n \terr = __ixgbe_enable_sriov(adapter, num_vfs);\n", "prefixes": [ "jkirsher/next-queue", "05/16" ] }