Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/831167/?format=api
{ "id": 831167, "url": "http://patchwork.ozlabs.org/api/patches/831167/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/150909696126.48377.794676088838721605.stgit@anamdev.jf.intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<150909696126.48377.794676088838721605.stgit@anamdev.jf.intel.com>", "list_archive_url": null, "date": "2017-10-27T09:36:01", "name": "[jkirsher/next-queue,v5,6/6] i40e: Enable cloud filters via tc-flower", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "c743408011d0ac0c9768ba2017677474bfceee03", "submitter": { "id": 68504, "url": "http://patchwork.ozlabs.org/api/people/68504/?format=api", "name": "Nambiar, Amritha", "email": "amritha.nambiar@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/150909696126.48377.794676088838721605.stgit@anamdev.jf.intel.com/mbox/", "series": [ { "id": 10540, "url": "http://patchwork.ozlabs.org/api/series/10540/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=10540", "date": "2017-10-27T09:35:29", "name": "tc-flower based cloud filters in i40e", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/10540/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/831167/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/831167/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.137; helo=fraxinus.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yNf1Q4qXqz9t2h\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 27 Oct 2017 20:37:46 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 3BFE1881B5;\n\tFri, 27 Oct 2017 09:37:45 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id EHwBhiNkHRXJ; Fri, 27 Oct 2017 09:37:41 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id B2563887E6;\n\tFri, 27 Oct 2017 09:37:41 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 36F4E1C071F\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 27 Oct 2017 09:37:41 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 2F90A89F67\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 27 Oct 2017 09:37:41 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id uvGmwkNYLr6N for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 27 Oct 2017 09:37:38 +0000 (UTC)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 6EB4B89DEB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 27 Oct 2017 09:37:38 +0000 (UTC)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby fmsmga105.fm.intel.com with ESMTP; 27 Oct 2017 02:37:37 -0700", "from anamdev.jf.intel.com ([10.166.29.110])\n\tby orsmga002.jf.intel.com with ESMTP; 27 Oct 2017 02:37:37 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.44,304,1505804400\"; d=\"scan'208\";a=\"2027408\"", "From": "Amritha Nambiar <amritha.nambiar@intel.com>", "To": "intel-wired-lan@lists.osuosl.org, jeffrey.t.kirsher@intel.com", "Date": "Fri, 27 Oct 2017 02:36:01 -0700", "Message-ID": "<150909696126.48377.794676088838721605.stgit@anamdev.jf.intel.com>", "In-Reply-To": "<150909628755.48377.16561267691881106259.stgit@anamdev.jf.intel.com>", "References": "<150909628755.48377.16561267691881106259.stgit@anamdev.jf.intel.com>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Cc": "jiri@resnulli.us, netdev@vger.kernel.org, jhs@mojatatu.com,\n\txiyou.wangcong@gmail.com", "Subject": "[Intel-wired-lan] [jkirsher/next-queue PATCH v5 6/6] i40e: Enable\n\tcloud filters via tc-flower", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "This patch enables tc-flower based hardware offloads. tc flower\nfilter provided by the kernel is configured as driver specific\ncloud filter. The patch implements functions and admin queue\ncommands needed to support cloud filters in the driver and\nadds cloud filters to configure these tc-flower filters.\n\nThe classification function of the filter is to direct matched\npackets to a traffic class. The hardware traffic class is set\nbased on the the classid reserved in the range :ffe0 - :ffef.\n\n# tc qdisc add dev eth0 ingress\n# ethtool -K eth0 hw-tc-offload on\n\nMatch Dst MAC and route to TC0:\n# tc filter add dev eth0 protocol ip parent ffff:\\\n prio 1 flower dst_mac 3c:fd:fe:a0:d6:70 skip_sw\\\n hw_tc 1\n\nMatch Dst IPv4,Dst Port and route to TC1:\n# tc filter add dev eth0 protocol ip parent ffff:\\\n prio 2 flower dst_ip 192.168.3.5/32\\\n ip_proto udp dst_port 25 skip_sw\\\n hw_tc 2\n\nMatch Dst IPv6,Dst Port and route to TC1:\n# tc filter add dev eth0 protocol ipv6 parent ffff:\\\n prio 3 flower dst_ip fe8::200:1\\\n ip_proto udp dst_port 66 skip_sw\\\n hw_tc 2\n\nDelete tc flower filter:\nExample:\n\n# tc filter del dev eth0 parent ffff: prio 3 handle 0x1 flower\n# tc filter del dev eth0 parent ffff:\n\nFlow Director Sideband is disabled while configuring cloud filters\nvia tc-flower and until any cloud filter exists.\n\nUnsupported matches when cloud filters are added using enhanced\nbig buffer cloud filter mode of underlying switch include:\n1. source port and source IP\n2. Combined MAC address and IP fields.\n3. Not specifying L4 port\n\nThese filter matches can however be used to redirect traffic to\nthe main VSI (tc 0) which does not require the enhanced big buffer\ncloud filter support.\n\nv5: Changes to align with Jiri's filter-block series. Use the\nhelper function to get the HW traffic class value from classid.\nPack cloud filter struct and other code cleanup based on Shannon's\ncomments.\nv4: Use classid to set traffic class for matched packets. Do not\nallow disabling hw-tc-offloads when offloaded tc filters are active.\nv3: Cleaned up some lengthy function names. Changed ipv6 address to\n__be32 array instead of u8 array. Used macro for IP version. Minor\nformatting changes.\nv2:\n1. Moved I40E_SWITCH_MODE_MASK definition to i40e_type.h\n2. Moved dev_info for add/deleting cloud filters in else condition\n3. Fixed some format specifier in dev_err logs\n4. Refactored i40e_get_capabilities to take an additional\n list_type parameter and use it to query device and function\n level capabilities.\n5. Fixed parsing tc redirect action to check for the is_tcf_mirred_tc()\n to verify if redirect to a traffic class is supported.\n6. Added comments for Geneve fix in cloud filter big buffer AQ\n function definitions.\n7. Cleaned up setup_tc interface to rebase and work with Jiri's\n updates, separate function to process tc cls flower offloads.\n8. Changes to make Flow Director Sideband and Cloud filters mutually\n exclusive.\n\nSigned-off-by: Amritha Nambiar <amritha.nambiar@intel.com>\nSigned-off-by: Kiran Patil <kiran.patil@intel.com>\nSigned-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e.h | 54 +\n drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h | 3 \n drivers/net/ethernet/intel/i40e/i40e_common.c | 189 ++++\n drivers/net/ethernet/intel/i40e/i40e_main.c | 957 +++++++++++++++++++-\n drivers/net/ethernet/intel/i40e/i40e_prototype.h | 16 \n drivers/net/ethernet/intel/i40e/i40e_type.h | 1 \n .../net/ethernet/intel/i40evf/i40e_adminq_cmd.h | 3 \n 7 files changed, 1192 insertions(+), 31 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h\nindex b938bb4a..5829715 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e.h\n@@ -55,6 +55,8 @@\n #include <linux/net_tstamp.h>\n #include <linux/ptp_clock_kernel.h>\n #include <net/pkt_cls.h>\n+#include <net/tc_act/tc_gact.h>\n+#include <net/tc_act/tc_mirred.h>\n #include \"i40e_type.h\"\n #include \"i40e_prototype.h\"\n #include \"i40e_client.h\"\n@@ -253,10 +255,56 @@ struct i40e_fdir_filter {\n \tu32 fd_id;\n };\n \n+#define I40E_CLOUD_FIELD_OMAC\t0x01\n+#define I40E_CLOUD_FIELD_IMAC\t0x02\n+#define I40E_CLOUD_FIELD_IVLAN\t0x04\n+#define I40E_CLOUD_FIELD_TEN_ID\t0x08\n+#define I40E_CLOUD_FIELD_IIP\t0x10\n+\n+#define I40E_CLOUD_FILTER_FLAGS_OMAC\tI40E_CLOUD_FIELD_OMAC\n+#define I40E_CLOUD_FILTER_FLAGS_IMAC\tI40E_CLOUD_FIELD_IMAC\n+#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN\t(I40E_CLOUD_FIELD_IMAC | \\\n+\t\t\t\t\t\t I40E_CLOUD_FIELD_IVLAN)\n+#define I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID\t(I40E_CLOUD_FIELD_IMAC | \\\n+\t\t\t\t\t\t I40E_CLOUD_FIELD_TEN_ID)\n+#define I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC (I40E_CLOUD_FIELD_OMAC | \\\n+\t\t\t\t\t\t I40E_CLOUD_FIELD_IMAC | \\\n+\t\t\t\t\t\t I40E_CLOUD_FIELD_TEN_ID)\n+#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID (I40E_CLOUD_FIELD_IMAC | \\\n+\t\t\t\t\t\t I40E_CLOUD_FIELD_IVLAN | \\\n+\t\t\t\t\t\t I40E_CLOUD_FIELD_TEN_ID)\n+#define I40E_CLOUD_FILTER_FLAGS_IIP\tI40E_CLOUD_FIELD_IIP\n+\n struct i40e_cloud_filter {\n \tstruct hlist_node cloud_node;\n \tunsigned long cookie;\n-\tu16 seid;\t/* filter control */\n+\t/* cloud filter input set follows */\n+\tu8 dst_mac[ETH_ALEN];\n+\tu8 src_mac[ETH_ALEN];\n+\t__be16 vlan_id;\n+\tu16 seid; /* filter control */\n+\t__be16 dst_port;\n+\t__be16 src_port;\n+\tu32 tenant_id;\n+\tunion {\n+\t\tstruct {\n+\t\t\tstruct in_addr dst_ip;\n+\t\t\tstruct in_addr src_ip;\n+\t\t} v4;\n+\t\tstruct {\n+\t\t\tstruct in6_addr dst_ip6;\n+\t\t\tstruct in6_addr src_ip6;\n+\t\t} v6;\n+\t} ip;\n+#define dst_ipv6\tip.v6.dst_ip6.s6_addr32\n+#define src_ipv6\tip.v6.src_ip6.s6_addr32\n+#define dst_ipv4\tip.v4.dst_ip.s_addr\n+#define src_ipv4\tip.v4.src_ip.s_addr\n+\tu16 n_proto; /* Ethernet Protocol */\n+\tu8 ip_proto; /* IPPROTO value */\n+\tu8 flags;\n+#define I40E_CLOUD_TNL_TYPE_NONE 0xff\n+\tu8 tunnel_type;\n };\n \n #define I40E_ETH_P_LLDP\t\t\t0x88cc\n@@ -492,6 +540,8 @@ struct i40e_pf {\n #define I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED\tBIT(27)\n #define I40E_FLAG_SOURCE_PRUNING_DISABLED\tBIT(28)\n #define I40E_FLAG_TC_MQPRIO\t\t\tBIT(29)\n+#define I40E_FLAG_FD_SB_INACTIVE\t\tBIT(30)\n+#define I40E_FLAG_FD_SB_TO_CLOUD_FILTER\t\tBIT(31)\n \n \tstruct i40e_client_instance *cinst;\n \tbool stat_offsets_loaded;\n@@ -574,6 +624,8 @@ struct i40e_pf {\n \tu16 phy_led_val;\n \n \tu16 override_q_count;\n+\tu16 last_sw_conf_flags;\n+\tu16 last_sw_conf_valid_flags;\n };\n \n /**\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\nindex 9f1f578..b0188b8 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n@@ -1392,6 +1392,9 @@ struct i40e_aqc_cloud_filters_element_data {\n \t\tstruct {\n \t\t\tu8 data[16];\n \t\t} v6;\n+\t\tstruct {\n+\t\t\t__le16 data[8];\n+\t\t} raw_v6;\n \t} ipaddr;\n \t__le16\tflags;\n #define I40E_AQC_ADD_CLOUD_FILTER_SHIFT\t\t\t0\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c\nindex a9460e0..0203665 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_common.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c\n@@ -5436,5 +5436,194 @@ i40e_add_pinfo_to_list(struct i40e_hw *hw,\n \n \tstatus = i40e_aq_write_ppp(hw, (void *)sec, sec->data_end,\n \t\t\t\t track_id, &offset, &info, NULL);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40e_aq_add_cloud_filters\n+ * @hw: pointer to the hardware structure\n+ * @seid: VSI seid to add cloud filters from\n+ * @filters: Buffer which contains the filters to be added\n+ * @filter_count: number of filters contained in the buffer\n+ *\n+ * Set the cloud filters for a given VSI. The contents of the\n+ * i40e_aqc_cloud_filters_element_data are filled in by the caller\n+ * of the function.\n+ *\n+ **/\n+enum i40e_status_code\n+i40e_aq_add_cloud_filters(struct i40e_hw *hw, u16 seid,\n+\t\t\t struct i40e_aqc_cloud_filters_element_data *filters,\n+\t\t\t u8 filter_count)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_add_remove_cloud_filters *cmd =\n+\t(struct i40e_aqc_add_remove_cloud_filters *)&desc.params.raw;\n+\tenum i40e_status_code status;\n+\tu16 buff_len;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_add_cloud_filters);\n+\n+\tbuff_len = filter_count * sizeof(*filters);\n+\tdesc.datalen = cpu_to_le16(buff_len);\n+\tdesc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));\n+\tcmd->num_filters = filter_count;\n+\tcmd->seid = cpu_to_le16(seid);\n+\n+\tstatus = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40e_aq_add_cloud_filters_bb\n+ * @hw: pointer to the hardware structure\n+ * @seid: VSI seid to add cloud filters from\n+ * @filters: Buffer which contains the filters in big buffer to be added\n+ * @filter_count: number of filters contained in the buffer\n+ *\n+ * Set the big buffer cloud filters for a given VSI. The contents of the\n+ * i40e_aqc_cloud_filters_element_bb are filled in by the caller of the\n+ * function.\n+ *\n+ **/\n+i40e_status\n+i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid,\n+\t\t\t struct i40e_aqc_cloud_filters_element_bb *filters,\n+\t\t\t u8 filter_count)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_add_remove_cloud_filters *cmd =\n+\t(struct i40e_aqc_add_remove_cloud_filters *)&desc.params.raw;\n+\ti40e_status status;\n+\tu16 buff_len;\n+\tint i;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_add_cloud_filters);\n+\n+\tbuff_len = filter_count * sizeof(*filters);\n+\tdesc.datalen = cpu_to_le16(buff_len);\n+\tdesc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));\n+\tcmd->num_filters = filter_count;\n+\tcmd->seid = cpu_to_le16(seid);\n+\tcmd->big_buffer_flag = I40E_AQC_ADD_CLOUD_CMD_BB;\n+\n+\tfor (i = 0; i < filter_count; i++) {\n+\t\tu16 tnl_type;\n+\t\tu32 ti;\n+\n+\t\ttnl_type = (le16_to_cpu(filters[i].element.flags) &\n+\t\t\t I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK) >>\n+\t\t\t I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT;\n+\n+\t\t/* Due to hardware eccentricities, the VNI for Geneve is shifted\n+\t\t * one more byte further than normally used for Tenant ID in\n+\t\t * other tunnel types.\n+\t\t */\n+\t\tif (tnl_type == I40E_AQC_ADD_CLOUD_TNL_TYPE_GENEVE) {\n+\t\t\tti = le32_to_cpu(filters[i].element.tenant_id);\n+\t\t\tfilters[i].element.tenant_id = cpu_to_le32(ti << 8);\n+\t\t}\n+\t}\n+\n+\tstatus = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40e_aq_rem_cloud_filters\n+ * @hw: pointer to the hardware structure\n+ * @seid: VSI seid to remove cloud filters from\n+ * @filters: Buffer which contains the filters to be removed\n+ * @filter_count: number of filters contained in the buffer\n+ *\n+ * Remove the cloud filters for a given VSI. The contents of the\n+ * i40e_aqc_cloud_filters_element_data are filled in by the caller\n+ * of the function.\n+ *\n+ **/\n+enum i40e_status_code\n+i40e_aq_rem_cloud_filters(struct i40e_hw *hw, u16 seid,\n+\t\t\t struct i40e_aqc_cloud_filters_element_data *filters,\n+\t\t\t u8 filter_count)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_add_remove_cloud_filters *cmd =\n+\t(struct i40e_aqc_add_remove_cloud_filters *)&desc.params.raw;\n+\tenum i40e_status_code status;\n+\tu16 buff_len;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_remove_cloud_filters);\n+\n+\tbuff_len = filter_count * sizeof(*filters);\n+\tdesc.datalen = cpu_to_le16(buff_len);\n+\tdesc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));\n+\tcmd->num_filters = filter_count;\n+\tcmd->seid = cpu_to_le16(seid);\n+\n+\tstatus = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40e_aq_rem_cloud_filters_bb\n+ * @hw: pointer to the hardware structure\n+ * @seid: VSI seid to remove cloud filters from\n+ * @filters: Buffer which contains the filters in big buffer to be removed\n+ * @filter_count: number of filters contained in the buffer\n+ *\n+ * Remove the big buffer cloud filters for a given VSI. The contents of the\n+ * i40e_aqc_cloud_filters_element_bb are filled in by the caller of the\n+ * function.\n+ *\n+ **/\n+i40e_status\n+i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid,\n+\t\t\t struct i40e_aqc_cloud_filters_element_bb *filters,\n+\t\t\t u8 filter_count)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_add_remove_cloud_filters *cmd =\n+\t(struct i40e_aqc_add_remove_cloud_filters *)&desc.params.raw;\n+\ti40e_status status;\n+\tu16 buff_len;\n+\tint i;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_remove_cloud_filters);\n+\n+\tbuff_len = filter_count * sizeof(*filters);\n+\tdesc.datalen = cpu_to_le16(buff_len);\n+\tdesc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));\n+\tcmd->num_filters = filter_count;\n+\tcmd->seid = cpu_to_le16(seid);\n+\tcmd->big_buffer_flag = I40E_AQC_ADD_CLOUD_CMD_BB;\n+\n+\tfor (i = 0; i < filter_count; i++) {\n+\t\tu16 tnl_type;\n+\t\tu32 ti;\n+\n+\t\ttnl_type = (le16_to_cpu(filters[i].element.flags) &\n+\t\t\t I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK) >>\n+\t\t\t I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT;\n+\n+\t\t/* Due to hardware eccentricities, the VNI for Geneve is shifted\n+\t\t * one more byte further than normally used for Tenant ID in\n+\t\t * other tunnel types.\n+\t\t */\n+\t\tif (tnl_type == I40E_AQC_ADD_CLOUD_TNL_TYPE_GENEVE) {\n+\t\t\tti = le32_to_cpu(filters[i].element.tenant_id);\n+\t\t\tfilters[i].element.tenant_id = cpu_to_le32(ti << 8);\n+\t\t}\n+\t}\n+\n+\tstatus = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);\n+\n \treturn status;\n }\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex fbe3450..5b1bd3c 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -69,6 +69,15 @@ static int i40e_reset(struct i40e_pf *pf);\n static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);\n static void i40e_fdir_sb_setup(struct i40e_pf *pf);\n static int i40e_veb_get_bw_info(struct i40e_veb *veb);\n+static int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,\n+\t\t\t\t struct i40e_cloud_filter *filter,\n+\t\t\t\t bool add);\n+static int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,\n+\t\t\t\t\t struct i40e_cloud_filter *filter,\n+\t\t\t\t\t bool add);\n+static int i40e_get_capabilities(struct i40e_pf *pf,\n+\t\t\t\t enum i40e_admin_queue_opc list_type);\n+\n \n /* i40e_pci_tbl - PCI Device ID Table\n *\n@@ -5480,7 +5489,11 @@ int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)\n **/\n static void i40e_remove_queue_channels(struct i40e_vsi *vsi)\n {\n+\tenum i40e_admin_queue_err last_aq_status;\n+\tstruct i40e_cloud_filter *cfilter;\n \tstruct i40e_channel *ch, *ch_tmp;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tstruct hlist_node *node;\n \tint ret, i;\n \n \t/* Reset rss size that was stored when reconfiguring rss for\n@@ -5521,6 +5534,29 @@ static void i40e_remove_queue_channels(struct i40e_vsi *vsi)\n \t\t\t\t \"Failed to reset tx rate for ch->seid %u\\n\",\n \t\t\t\t ch->seid);\n \n+\t\t/* delete cloud filters associated with this channel */\n+\t\thlist_for_each_entry_safe(cfilter, node,\n+\t\t\t\t\t &pf->cloud_filter_list, cloud_node) {\n+\t\t\tif (cfilter->seid != ch->seid)\n+\t\t\t\tcontinue;\n+\n+\t\t\thash_del(&cfilter->cloud_node);\n+\t\t\tif (cfilter->dst_port)\n+\t\t\t\tret = i40e_add_del_cloud_filter_big_buf(vsi,\n+\t\t\t\t\t\t\t\t\tcfilter,\n+\t\t\t\t\t\t\t\t\tfalse);\n+\t\t\telse\n+\t\t\t\tret = i40e_add_del_cloud_filter(vsi, cfilter,\n+\t\t\t\t\t\t\t\tfalse);\n+\t\t\tlast_aq_status = pf->hw.aq.asq_last_status;\n+\t\t\tif (ret)\n+\t\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t\t \"Failed to delete cloud filter, err %s aq_err %s\\n\",\n+\t\t\t\t\t i40e_stat_str(&pf->hw, ret),\n+\t\t\t\t\t i40e_aq_str(&pf->hw, last_aq_status));\n+\t\t\tkfree(cfilter);\n+\t\t}\n+\n \t\t/* delete VSI from FW */\n \t\tret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,\n \t\t\t\t\t NULL);\n@@ -5972,6 +6008,63 @@ static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,\n }\n \n /**\n+ * i40e_validate_and_set_switch_mode - sets up switch mode correctly\n+ * @vsi: ptr to VSI which has PF backing\n+ *\n+ * Sets up switch mode correctly if it needs to be changed and perform\n+ * what are allowed modes.\n+ **/\n+static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)\n+{\n+\tu8 mode;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tstruct i40e_hw *hw = &pf->hw;\n+\tint ret;\n+\n+\tret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);\n+\tif (ret)\n+\t\treturn -EINVAL;\n+\n+\tif (hw->dev_caps.switch_mode) {\n+\t\t/* if switch mode is set, support mode2 (non-tunneled for\n+\t\t * cloud filter) for now\n+\t\t */\n+\t\tu32 switch_mode = hw->dev_caps.switch_mode &\n+\t\t\t\t\t\t\tI40E_SWITCH_MODE_MASK;\n+\t\tif (switch_mode >= I40E_CLOUD_FILTER_MODE1) {\n+\t\t\tif (switch_mode == I40E_CLOUD_FILTER_MODE2)\n+\t\t\t\treturn 0;\n+\t\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\t\"Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\\n\",\n+\t\t\t\thw->dev_caps.switch_mode);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\t/* Set Bit 7 to be valid */\n+\tmode = I40E_AQ_SET_SWITCH_BIT7_VALID;\n+\n+\t/* Set L4type to both TCP and UDP support */\n+\tmode |= I40E_AQ_SET_SWITCH_L4_TYPE_BOTH;\n+\n+\t/* Set cloud filter mode */\n+\tmode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;\n+\n+\t/* Prep mode field for set_switch_config */\n+\tret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,\n+\t\t\t\t\tpf->last_sw_conf_valid_flags,\n+\t\t\t\t\tmode, NULL);\n+\tif (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)\n+\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\"couldn't set switch config bits, err %s aq_err %s\\n\",\n+\t\t\ti40e_stat_str(hw, ret),\n+\t\t\ti40e_aq_str(hw,\n+\t\t\t\t hw->aq.asq_last_status));\n+\n+\treturn ret;\n+}\n+\n+/**\n * i40e_create_queue_channel - function to create channel\n * @vsi: VSI to be configured\n * @ch: ptr to channel (it contains channel specific params)\n@@ -6750,13 +6843,720 @@ static int i40e_setup_tc(struct net_device *netdev, void *type_data)\n \treturn ret;\n }\n \n+/**\n+ * i40e_set_cld_element - sets cloud filter element data\n+ * @filter: cloud filter rule\n+ * @cld: ptr to cloud filter element data\n+ *\n+ * This is helper function to copy data into cloud filter element\n+ **/\n+static inline void\n+i40e_set_cld_element(struct i40e_cloud_filter *filter,\n+\t\t struct i40e_aqc_cloud_filters_element_data *cld)\n+{\n+\tint i, j;\n+\tu32 ipa;\n+\n+\tmemset(cld, 0, sizeof(*cld));\n+\tether_addr_copy(cld->outer_mac, filter->dst_mac);\n+\tether_addr_copy(cld->inner_mac, filter->src_mac);\n+\n+\tif (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)\n+\t\treturn;\n+\n+\tif (filter->n_proto == ETH_P_IPV6) {\n+#define IPV6_MAX_INDEX\t(ARRAY_SIZE(filter->dst_ipv6) - 1)\n+\t\tfor (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6);\n+\t\t i++, j += 2) {\n+\t\t\tipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);\n+\t\t\tipa = cpu_to_le32(ipa);\n+\t\t\tmemcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa));\n+\t\t}\n+\t} else {\n+\t\tipa = be32_to_cpu(filter->dst_ipv4);\n+\t\tmemcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));\n+\t}\n+\n+\tcld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));\n+\n+\t/* tenant_id is not supported by FW now, once the support is enabled\n+\t * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)\n+\t */\n+\tif (filter->tenant_id)\n+\t\treturn;\n+}\n+\n+/**\n+ * i40e_add_del_cloud_filter - Add/del cloud filter\n+ * @vsi: pointer to VSI\n+ * @filter: cloud filter rule\n+ * @add: if true, add, if false, delete\n+ *\n+ * Add or delete a cloud filter for a specific flow spec.\n+ * Returns 0 if the filter were successfully added.\n+ **/\n+static int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,\n+\t\t\t\t struct i40e_cloud_filter *filter, bool add)\n+{\n+\tstruct i40e_aqc_cloud_filters_element_data cld_filter;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tint ret;\n+\tstatic const u16 flag_table[128] = {\n+\t\t[I40E_CLOUD_FILTER_FLAGS_OMAC] =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_OMAC,\n+\t\t[I40E_CLOUD_FILTER_FLAGS_IMAC] =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_IMAC,\n+\t\t[I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,\n+\t\t[I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,\n+\t\t[I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,\n+\t\t[I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,\n+\t\t[I40E_CLOUD_FILTER_FLAGS_IIP] =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_IIP,\n+\t};\n+\n+\tif (filter->flags >= ARRAY_SIZE(flag_table))\n+\t\treturn I40E_ERR_CONFIG;\n+\n+\t/* copy element needed to add cloud filter from filter */\n+\ti40e_set_cld_element(filter, &cld_filter);\n+\n+\tif (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)\n+\t\tcld_filter.flags = cpu_to_le16(filter->tunnel_type <<\n+\t\t\t\t\t I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);\n+\n+\tif (filter->n_proto == ETH_P_IPV6)\n+\t\tcld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |\n+\t\t\t\t\t\tI40E_AQC_ADD_CLOUD_FLAGS_IPV6);\n+\telse\n+\t\tcld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |\n+\t\t\t\t\t\tI40E_AQC_ADD_CLOUD_FLAGS_IPV4);\n+\n+\tif (add)\n+\t\tret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,\n+\t\t\t\t\t\t&cld_filter, 1);\n+\telse\n+\t\tret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,\n+\t\t\t\t\t\t&cld_filter, 1);\n+\tif (ret)\n+\t\tdev_dbg(&pf->pdev->dev,\n+\t\t\t\"Failed to %s cloud filter using l4 port %u, err %d aq_err %d\\n\",\n+\t\t\tadd ? \"add\" : \"delete\", filter->dst_port, ret,\n+\t\t\tpf->hw.aq.asq_last_status);\n+\telse\n+\t\tdev_info(&pf->pdev->dev,\n+\t\t\t \"%s cloud filter for VSI: %d\\n\",\n+\t\t\t add ? \"Added\" : \"Deleted\", filter->seid);\n+\treturn ret;\n+}\n+\n+/**\n+ * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf\n+ * @vsi: pointer to VSI\n+ * @filter: cloud filter rule\n+ * @add: if true, add, if false, delete\n+ *\n+ * Add or delete a cloud filter for a specific flow spec using big buffer.\n+ * Returns 0 if the filter were successfully added.\n+ **/\n+static int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,\n+\t\t\t\t\t struct i40e_cloud_filter *filter,\n+\t\t\t\t\t bool add)\n+{\n+\tstruct i40e_aqc_cloud_filters_element_bb cld_filter;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tint ret;\n+\n+\t/* Both (src/dst) valid mac_addr are not supported */\n+\tif ((is_valid_ether_addr(filter->dst_mac) &&\n+\t is_valid_ether_addr(filter->src_mac)) ||\n+\t (is_multicast_ether_addr(filter->dst_mac) &&\n+\t is_multicast_ether_addr(filter->src_mac)))\n+\t\treturn -EINVAL;\n+\n+\t/* Make sure port is specified, otherwise bail out, for channel\n+\t * specific cloud filter needs 'L4 port' to be non-zero\n+\t */\n+\tif (!filter->dst_port)\n+\t\treturn -EINVAL;\n+\n+\t/* adding filter using src_port/src_ip is not supported at this stage */\n+\tif (filter->src_port || filter->src_ipv4 ||\n+\t !ipv6_addr_any(&filter->ip.v6.src_ip6))\n+\t\treturn -EINVAL;\n+\n+\t/* copy element needed to add cloud filter from filter */\n+\ti40e_set_cld_element(filter, &cld_filter.element);\n+\n+\tif (is_valid_ether_addr(filter->dst_mac) ||\n+\t is_valid_ether_addr(filter->src_mac) ||\n+\t is_multicast_ether_addr(filter->dst_mac) ||\n+\t is_multicast_ether_addr(filter->src_mac)) {\n+\t\t/* MAC + IP : unsupported mode */\n+\t\tif (filter->dst_ipv4)\n+\t\t\treturn -EINVAL;\n+\n+\t\t/* since we validated that L4 port must be valid before\n+\t\t * we get here, start with respective \"flags\" value\n+\t\t * and update if vlan is present or not\n+\t\t */\n+\t\tcld_filter.element.flags =\n+\t\t\tcpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);\n+\n+\t\tif (filter->vlan_id) {\n+\t\t\tcld_filter.element.flags =\n+\t\t\tcpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);\n+\t\t}\n+\n+\t} else if (filter->dst_ipv4 ||\n+\t\t !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {\n+\t\tcld_filter.element.flags =\n+\t\t\t\tcpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);\n+\t\tif (filter->n_proto == ETH_P_IPV6)\n+\t\t\tcld_filter.element.flags |=\n+\t\t\t\tcpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);\n+\t\telse\n+\t\t\tcld_filter.element.flags |=\n+\t\t\t\tcpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);\n+\t} else {\n+\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\"either mac or ip has to be valid for cloud filter\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Now copy L4 port in Byte 6..7 in general fields */\n+\tcld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =\n+\t\t\t\t\t\tbe16_to_cpu(filter->dst_port);\n+\n+\tif (add) {\n+\t\t/* Validate current device switch mode, change if necessary */\n+\t\tret = i40e_validate_and_set_switch_mode(vsi);\n+\t\tif (ret) {\n+\t\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\t\"failed to set switch mode, ret %d\\n\",\n+\t\t\t\tret);\n+\t\t\treturn ret;\n+\t\t}\n+\n+\t\tret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,\n+\t\t\t\t\t\t &cld_filter, 1);\n+\t} else {\n+\t\tret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,\n+\t\t\t\t\t\t &cld_filter, 1);\n+\t}\n+\n+\tif (ret)\n+\t\tdev_dbg(&pf->pdev->dev,\n+\t\t\t\"Failed to %s cloud filter(big buffer) err %d aq_err %d\\n\",\n+\t\t\tadd ? \"add\" : \"delete\", ret, pf->hw.aq.asq_last_status);\n+\telse\n+\t\tdev_info(&pf->pdev->dev,\n+\t\t\t \"%s cloud filter for VSI: %d, L4 port: %d\\n\",\n+\t\t\t add ? \"add\" : \"delete\", filter->seid,\n+\t\t\t ntohs(filter->dst_port));\n+\treturn ret;\n+}\n+\n+/**\n+ * i40e_parse_cls_flower - Parse tc flower filters provided by kernel\n+ * @vsi: Pointer to VSI\n+ * @cls_flower: Pointer to struct tc_cls_flower_offload\n+ * @filter: Pointer to cloud filter structure\n+ *\n+ **/\n+static int i40e_parse_cls_flower(struct i40e_vsi *vsi,\n+\t\t\t\t struct tc_cls_flower_offload *f,\n+\t\t\t\t struct i40e_cloud_filter *filter)\n+{\n+\tu16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tu8 field_flags = 0;\n+\n+\tif (f->dissector->used_keys &\n+\t ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |\n+\t BIT(FLOW_DISSECTOR_KEY_BASIC) |\n+\t BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |\n+\t BIT(FLOW_DISSECTOR_KEY_VLAN) |\n+\t BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |\n+\t BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |\n+\t BIT(FLOW_DISSECTOR_KEY_PORTS) |\n+\t BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {\n+\t\tdev_err(&pf->pdev->dev, \"Unsupported key used: 0x%x\\n\",\n+\t\t\tf->dissector->used_keys);\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\tif (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {\n+\t\tstruct flow_dissector_key_keyid *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_ENC_KEYID,\n+\t\t\t\t\t\t f->key);\n+\n+\t\tstruct flow_dissector_key_keyid *mask =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_ENC_KEYID,\n+\t\t\t\t\t\t f->mask);\n+\n+\t\tif (mask->keyid != 0)\n+\t\t\tfield_flags |= I40E_CLOUD_FIELD_TEN_ID;\n+\n+\t\tfilter->tenant_id = be32_to_cpu(key->keyid);\n+\t}\n+\n+\tif (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {\n+\t\tstruct flow_dissector_key_basic *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_BASIC,\n+\t\t\t\t\t\t f->key);\n+\n+\t\tstruct flow_dissector_key_basic *mask =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_BASIC,\n+\t\t\t\t\t\t f->mask);\n+\n+\t\tn_proto_key = ntohs(key->n_proto);\n+\t\tn_proto_mask = ntohs(mask->n_proto);\n+\n+\t\tif (n_proto_key == ETH_P_ALL) {\n+\t\t\tn_proto_key = 0;\n+\t\t\tn_proto_mask = 0;\n+\t\t}\n+\t\tfilter->n_proto = n_proto_key & n_proto_mask;\n+\t\tfilter->ip_proto = key->ip_proto;\n+\t}\n+\n+\tif (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {\n+\t\tstruct flow_dissector_key_eth_addrs *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_ETH_ADDRS,\n+\t\t\t\t\t\t f->key);\n+\n+\t\tstruct flow_dissector_key_eth_addrs *mask =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_ETH_ADDRS,\n+\t\t\t\t\t\t f->mask);\n+\n+\t\t/* use is_broadcast and is_zero to check for all 0xf or 0 */\n+\t\tif (!is_zero_ether_addr(mask->dst)) {\n+\t\t\tif (is_broadcast_ether_addr(mask->dst)) {\n+\t\t\t\tfield_flags |= I40E_CLOUD_FIELD_OMAC;\n+\t\t\t} else {\n+\t\t\t\tdev_err(&pf->pdev->dev, \"Bad ether dest mask %pM\\n\",\n+\t\t\t\t\tmask->dst);\n+\t\t\t\treturn I40E_ERR_CONFIG;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (!is_zero_ether_addr(mask->src)) {\n+\t\t\tif (is_broadcast_ether_addr(mask->src)) {\n+\t\t\t\tfield_flags |= I40E_CLOUD_FIELD_IMAC;\n+\t\t\t} else {\n+\t\t\t\tdev_err(&pf->pdev->dev, \"Bad ether src mask %pM\\n\",\n+\t\t\t\t\tmask->src);\n+\t\t\t\treturn I40E_ERR_CONFIG;\n+\t\t\t}\n+\t\t}\n+\t\tether_addr_copy(filter->dst_mac, key->dst);\n+\t\tether_addr_copy(filter->src_mac, key->src);\n+\t}\n+\n+\tif (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {\n+\t\tstruct flow_dissector_key_vlan *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_VLAN,\n+\t\t\t\t\t\t f->key);\n+\t\tstruct flow_dissector_key_vlan *mask =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_VLAN,\n+\t\t\t\t\t\t f->mask);\n+\n+\t\tif (mask->vlan_id) {\n+\t\t\tif (mask->vlan_id == VLAN_VID_MASK) {\n+\t\t\t\tfield_flags |= I40E_CLOUD_FIELD_IVLAN;\n+\n+\t\t\t} else {\n+\t\t\t\tdev_err(&pf->pdev->dev, \"Bad vlan mask 0x%04x\\n\",\n+\t\t\t\t\tmask->vlan_id);\n+\t\t\t\treturn I40E_ERR_CONFIG;\n+\t\t\t}\n+\t\t}\n+\n+\t\tfilter->vlan_id = cpu_to_be16(key->vlan_id);\n+\t}\n+\n+\tif (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {\n+\t\tstruct flow_dissector_key_control *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_CONTROL,\n+\t\t\t\t\t\t f->key);\n+\n+\t\taddr_type = key->addr_type;\n+\t}\n+\n+\tif (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {\n+\t\tstruct flow_dissector_key_ipv4_addrs *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_IPV4_ADDRS,\n+\t\t\t\t\t\t f->key);\n+\t\tstruct flow_dissector_key_ipv4_addrs *mask =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_IPV4_ADDRS,\n+\t\t\t\t\t\t f->mask);\n+\n+\t\tif (mask->dst) {\n+\t\t\tif (mask->dst == cpu_to_be32(0xffffffff)) {\n+\t\t\t\tfield_flags |= I40E_CLOUD_FIELD_IIP;\n+\t\t\t} else {\n+\t\t\t\tmask->dst = be32_to_cpu(mask->dst);\n+\t\t\t\tdev_err(&pf->pdev->dev, \"Bad ip dst mask %pI4\\n\",\n+\t\t\t\t\t&mask->dst);\n+\t\t\t\treturn I40E_ERR_CONFIG;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (mask->src) {\n+\t\t\tif (mask->src == cpu_to_be32(0xffffffff)) {\n+\t\t\t\tfield_flags |= I40E_CLOUD_FIELD_IIP;\n+\t\t\t} else {\n+\t\t\t\tmask->src = be32_to_cpu(mask->src);\n+\t\t\t\tdev_err(&pf->pdev->dev, \"Bad ip src mask %pI4\\n\",\n+\t\t\t\t\t&mask->src);\n+\t\t\t\treturn I40E_ERR_CONFIG;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (field_flags & I40E_CLOUD_FIELD_TEN_ID) {\n+\t\t\tdev_err(&pf->pdev->dev, \"Tenant id not allowed for ip filter\\n\");\n+\t\t\treturn I40E_ERR_CONFIG;\n+\t\t}\n+\t\tfilter->dst_ipv4 = key->dst;\n+\t\tfilter->src_ipv4 = key->src;\n+\t}\n+\n+\tif (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {\n+\t\tstruct flow_dissector_key_ipv6_addrs *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_IPV6_ADDRS,\n+\t\t\t\t\t\t f->key);\n+\t\tstruct flow_dissector_key_ipv6_addrs *mask =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_IPV6_ADDRS,\n+\t\t\t\t\t\t f->mask);\n+\n+\t\t/* src and dest IPV6 address should not be LOOPBACK\n+\t\t * (0:0:0:0:0:0:0:1), which can be represented as ::1\n+\t\t */\n+\t\tif (ipv6_addr_loopback(&key->dst) ||\n+\t\t ipv6_addr_loopback(&key->src)) {\n+\t\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\t\"Bad ipv6, addr is LOOPBACK\\n\");\n+\t\t\treturn I40E_ERR_CONFIG;\n+\t\t}\n+\t\tif (!ipv6_addr_any(&mask->dst) || !ipv6_addr_any(&mask->src))\n+\t\t\tfield_flags |= I40E_CLOUD_FIELD_IIP;\n+\n+\t\tmemcpy(&filter->src_ipv6, &key->src.s6_addr32,\n+\t\t sizeof(filter->src_ipv6));\n+\t\tmemcpy(&filter->dst_ipv6, &key->dst.s6_addr32,\n+\t\t sizeof(filter->dst_ipv6));\n+\t}\n+\n+\tif (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {\n+\t\tstruct flow_dissector_key_ports *key =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_PORTS,\n+\t\t\t\t\t\t f->key);\n+\t\tstruct flow_dissector_key_ports *mask =\n+\t\t\tskb_flow_dissector_target(f->dissector,\n+\t\t\t\t\t\t FLOW_DISSECTOR_KEY_PORTS,\n+\t\t\t\t\t\t f->mask);\n+\n+\t\tif (mask->src) {\n+\t\t\tif (mask->src == cpu_to_be16(0xffff)) {\n+\t\t\t\tfield_flags |= I40E_CLOUD_FIELD_IIP;\n+\t\t\t} else {\n+\t\t\t\tdev_err(&pf->pdev->dev, \"Bad src port mask 0x%04x\\n\",\n+\t\t\t\t\tbe16_to_cpu(mask->src));\n+\t\t\t\treturn I40E_ERR_CONFIG;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (mask->dst) {\n+\t\t\tif (mask->dst == cpu_to_be16(0xffff)) {\n+\t\t\t\tfield_flags |= I40E_CLOUD_FIELD_IIP;\n+\t\t\t} else {\n+\t\t\t\tdev_err(&pf->pdev->dev, \"Bad dst port mask 0x%04x\\n\",\n+\t\t\t\t\tbe16_to_cpu(mask->dst));\n+\t\t\t\treturn I40E_ERR_CONFIG;\n+\t\t\t}\n+\t\t}\n+\n+\t\tfilter->dst_port = key->dst;\n+\t\tfilter->src_port = key->src;\n+\n+\t\tswitch (filter->ip_proto) {\n+\t\tcase IPPROTO_TCP:\n+\t\tcase IPPROTO_UDP:\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\t\"Only UDP and TCP transport are supported\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\tfilter->flags = field_flags;\n+\treturn 0;\n+}\n+\n+/**\n+ * i40e_handle_tclass: Forward to a traffic class on the device\n+ * @vsi: Pointer to VSI\n+ * @tc: traffic class index on the device\n+ * @filter: Pointer to cloud filter structure\n+ *\n+ **/\n+static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,\n+\t\t\t struct i40e_cloud_filter *filter)\n+{\n+\tstruct i40e_channel *ch, *ch_tmp;\n+\n+\t/* direct to a traffic class on the same device */\n+\tif (tc == 0) {\n+\t\tfilter->seid = vsi->seid;\n+\t\treturn 0;\n+\t} else if (vsi->tc_config.enabled_tc & BIT(tc)) {\n+\t\tif (!filter->dst_port) {\n+\t\t\tdev_err(&vsi->back->pdev->dev,\n+\t\t\t\t\"Specify destination port to direct to traffic class that is not default\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tif (list_empty(&vsi->ch_list))\n+\t\t\treturn -EINVAL;\n+\t\tlist_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,\n+\t\t\t\t\t list) {\n+\t\t\tif (ch->seid == vsi->tc_seid_map[tc])\n+\t\t\t\tfilter->seid = ch->seid;\n+\t\t}\n+\t\treturn 0;\n+\t}\n+\tdev_err(&vsi->back->pdev->dev, \"TC is not enabled\\n\");\n+\treturn -EINVAL;\n+}\n+\n+/**\n+ * i40e_configure_clsflower - Configure tc flower filters\n+ * @vsi: Pointer to VSI\n+ * @cls_flower: Pointer to struct tc_cls_flower_offload\n+ *\n+ **/\n+static int i40e_configure_clsflower(struct i40e_vsi *vsi,\n+\t\t\t\t struct tc_cls_flower_offload *cls_flower)\n+{\n+\tint tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);\n+\tstruct i40e_cloud_filter *filter = NULL;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tint err = 0;\n+\n+\tif (tc < 0) {\n+\t\tdev_err(&vsi->back->pdev->dev, \"Invalid traffic class\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||\n+\t test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))\n+\t\treturn -EBUSY;\n+\n+\tif (pf->fdir_pf_active_filters ||\n+\t (!hlist_empty(&pf->fdir_filter_list))) {\n+\t\tdev_err(&vsi->back->pdev->dev,\n+\t\t\t\"Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {\n+\t\tdev_err(&vsi->back->pdev->dev,\n+\t\t\t\"Disable Flow Director Sideband, configuring Cloud filters via tc-flower\\n\");\n+\t\tvsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;\n+\t\tvsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;\n+\t}\n+\n+\tfilter = kzalloc(sizeof(*filter), GFP_KERNEL);\n+\tif (!filter)\n+\t\treturn -ENOMEM;\n+\n+\tfilter->cookie = cls_flower->cookie;\n+\n+\terr = i40e_parse_cls_flower(vsi, cls_flower, filter);\n+\tif (err < 0)\n+\t\tgoto err;\n+\n+\terr = i40e_handle_tclass(vsi, tc, filter);\n+\tif (err < 0)\n+\t\tgoto err;\n+\n+\t/* Add cloud filter */\n+\tif (filter->dst_port)\n+\t\terr = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);\n+\telse\n+\t\terr = i40e_add_del_cloud_filter(vsi, filter, true);\n+\n+\tif (err) {\n+\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\"Failed to add cloud filter, err %s\\n\",\n+\t\t\ti40e_stat_str(&pf->hw, err));\n+\t\terr = i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);\n+\t\tgoto err;\n+\t}\n+\n+\t/* add filter to the ordered list */\n+\tINIT_HLIST_NODE(&filter->cloud_node);\n+\n+\thlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);\n+\n+\tpf->num_cloud_filters++;\n+\n+\treturn err;\n+err:\n+\tkfree(filter);\n+\treturn err;\n+}\n+\n+/**\n+ * i40e_find_cloud_filter - Find the could filter in the list\n+ * @vsi: Pointer to VSI\n+ * @cookie: filter specific cookie\n+ *\n+ **/\n+static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,\n+\t\t\t\t\t\t\tunsigned long *cookie)\n+{\n+\tstruct i40e_cloud_filter *filter = NULL;\n+\tstruct hlist_node *node2;\n+\n+\thlist_for_each_entry_safe(filter, node2,\n+\t\t\t\t &vsi->back->cloud_filter_list, cloud_node)\n+\t\tif (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))\n+\t\t\treturn filter;\n+\treturn NULL;\n+}\n+\n+/**\n+ * i40e_delete_clsflower - Remove tc flower filters\n+ * @vsi: Pointer to VSI\n+ * @cls_flower: Pointer to struct tc_cls_flower_offload\n+ *\n+ **/\n+static int i40e_delete_clsflower(struct i40e_vsi *vsi,\n+\t\t\t\t struct tc_cls_flower_offload *cls_flower)\n+{\n+\tstruct i40e_cloud_filter *filter = NULL;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tint err = 0;\n+\n+\tfilter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);\n+\n+\tif (!filter)\n+\t\treturn -EINVAL;\n+\n+\thash_del(&filter->cloud_node);\n+\n+\tif (filter->dst_port)\n+\t\terr = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);\n+\telse\n+\t\terr = i40e_add_del_cloud_filter(vsi, filter, false);\n+\n+\tkfree(filter);\n+\tif (err) {\n+\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\"Failed to delete cloud filter, err %s\\n\",\n+\t\t\ti40e_stat_str(&pf->hw, err));\n+\t\treturn i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);\n+\t}\n+\n+\tpf->num_cloud_filters--;\n+\tif (!pf->num_cloud_filters)\n+\t\tif ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&\n+\t\t !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {\n+\t\t\tpf->flags |= I40E_FLAG_FD_SB_ENABLED;\n+\t\t\tpf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;\n+\t\t\tpf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;\n+\t\t}\n+\treturn 0;\n+}\n+\n+/**\n+ * i40e_setup_tc_cls_flower - flower classifier offloads\n+ * @netdev: net device to configure\n+ * @type_data: offload data\n+ **/\n+static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,\n+\t\t\t\t struct tc_cls_flower_offload *cls_flower)\n+{\n+\tstruct i40e_vsi *vsi = np->vsi;\n+\n+\tif (cls_flower->common.chain_index)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tswitch (cls_flower->command) {\n+\tcase TC_CLSFLOWER_REPLACE:\n+\t\treturn i40e_configure_clsflower(vsi, cls_flower);\n+\tcase TC_CLSFLOWER_DESTROY:\n+\t\treturn i40e_delete_clsflower(vsi, cls_flower);\n+\tcase TC_CLSFLOWER_STATS:\n+\t\treturn -EOPNOTSUPP;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,\n+\t\t\t\t void *cb_priv)\n+{\n+\tstruct i40e_netdev_priv *np = cb_priv;\n+\n+\tswitch (type) {\n+\tcase TC_SETUP_CLSFLOWER:\n+\t\treturn i40e_setup_tc_cls_flower(np, type_data);\n+\n+\tdefault:\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+}\n+\n+static int i40e_setup_tc_block(struct net_device *dev,\n+\t\t\t struct tc_block_offload *f)\n+{\n+\tstruct i40e_netdev_priv *np = netdev_priv(dev);\n+\n+\tif (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tswitch (f->command) {\n+\tcase TC_BLOCK_BIND:\n+\t\treturn tcf_block_cb_register(f->block, i40e_setup_tc_block_cb,\n+\t\t\t\t\t np, np);\n+\tcase TC_BLOCK_UNBIND:\n+\t\ttcf_block_cb_unregister(f->block, i40e_setup_tc_block_cb, np);\n+\t\treturn 0;\n+\tdefault:\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+}\n+\n static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,\n \t\t\t void *type_data)\n {\n-\tif (type != TC_SETUP_MQPRIO)\n+\tswitch (type) {\n+\tcase TC_SETUP_MQPRIO:\n+\t\treturn i40e_setup_tc(netdev, type_data);\n+\tcase TC_SETUP_BLOCK:\n+\t\treturn i40e_setup_tc_block(netdev, type_data);\n+\tdefault:\n \t\treturn -EOPNOTSUPP;\n-\n-\treturn i40e_setup_tc(netdev, type_data);\n+\t}\n }\n \n /**\n@@ -6954,6 +7754,13 @@ static void i40e_cloud_filter_exit(struct i40e_pf *pf)\n \t\tkfree(cfilter);\n \t}\n \tpf->num_cloud_filters = 0;\n+\n+\tif ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&\n+\t !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {\n+\t\tpf->flags |= I40E_FLAG_FD_SB_ENABLED;\n+\t\tpf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;\n+\t\tpf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;\n+\t}\n }\n \n /**\n@@ -8061,7 +8868,8 @@ static int i40e_reconstitute_veb(struct i40e_veb *veb)\n * i40e_get_capabilities - get info about the HW\n * @pf: the PF struct\n **/\n-static int i40e_get_capabilities(struct i40e_pf *pf)\n+static int i40e_get_capabilities(struct i40e_pf *pf,\n+\t\t\t\t enum i40e_admin_queue_opc list_type)\n {\n \tstruct i40e_aqc_list_capabilities_element_resp *cap_buf;\n \tu16 data_size;\n@@ -8076,9 +8884,8 @@ static int i40e_get_capabilities(struct i40e_pf *pf)\n \n \t\t/* this loads the data into the hw struct for us */\n \t\terr = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,\n-\t\t\t\t\t &data_size,\n-\t\t\t\t\t i40e_aqc_opc_list_func_capabilities,\n-\t\t\t\t\t NULL);\n+\t\t\t\t\t\t &data_size, list_type,\n+\t\t\t\t\t\t NULL);\n \t\t/* data loaded, buffer no longer needed */\n \t\tkfree(cap_buf);\n \n@@ -8095,26 +8902,44 @@ static int i40e_get_capabilities(struct i40e_pf *pf)\n \t\t}\n \t} while (err);\n \n-\tif (pf->hw.debug_mask & I40E_DEBUG_USER)\n-\t\tdev_info(&pf->pdev->dev,\n-\t\t\t \"pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\\n\",\n-\t\t\t pf->hw.pf_id, pf->hw.func_caps.num_vfs,\n-\t\t\t pf->hw.func_caps.num_msix_vectors,\n-\t\t\t pf->hw.func_caps.num_msix_vectors_vf,\n-\t\t\t pf->hw.func_caps.fd_filters_guaranteed,\n-\t\t\t pf->hw.func_caps.fd_filters_best_effort,\n-\t\t\t pf->hw.func_caps.num_tx_qp,\n-\t\t\t pf->hw.func_caps.num_vsis);\n-\n+\tif (pf->hw.debug_mask & I40E_DEBUG_USER) {\n+\t\tif (list_type == i40e_aqc_opc_list_func_capabilities) {\n+\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t \"pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\\n\",\n+\t\t\t\t pf->hw.pf_id, pf->hw.func_caps.num_vfs,\n+\t\t\t\t pf->hw.func_caps.num_msix_vectors,\n+\t\t\t\t pf->hw.func_caps.num_msix_vectors_vf,\n+\t\t\t\t pf->hw.func_caps.fd_filters_guaranteed,\n+\t\t\t\t pf->hw.func_caps.fd_filters_best_effort,\n+\t\t\t\t pf->hw.func_caps.num_tx_qp,\n+\t\t\t\t pf->hw.func_caps.num_vsis);\n+\t\t} else if (list_type == i40e_aqc_opc_list_dev_capabilities) {\n+\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t \"switch_mode=0x%04x, function_valid=0x%08x\\n\",\n+\t\t\t\t pf->hw.dev_caps.switch_mode,\n+\t\t\t\t pf->hw.dev_caps.valid_functions);\n+\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t \"SR-IOV=%d, num_vfs for all function=%u\\n\",\n+\t\t\t\t pf->hw.dev_caps.sr_iov_1_1,\n+\t\t\t\t pf->hw.dev_caps.num_vfs);\n+\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t \"num_vsis=%u, num_rx:%u, num_tx=%u\\n\",\n+\t\t\t\t pf->hw.dev_caps.num_vsis,\n+\t\t\t\t pf->hw.dev_caps.num_rx_qp,\n+\t\t\t\t pf->hw.dev_caps.num_tx_qp);\n+\t\t}\n+\t}\n+\tif (list_type == i40e_aqc_opc_list_func_capabilities) {\n #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \\\n \t\t + pf->hw.func_caps.num_vfs)\n-\tif (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {\n-\t\tdev_info(&pf->pdev->dev,\n-\t\t\t \"got num_vsis %d, setting num_vsis to %d\\n\",\n-\t\t\t pf->hw.func_caps.num_vsis, DEF_NUM_VSI);\n-\t\tpf->hw.func_caps.num_vsis = DEF_NUM_VSI;\n+\t\tif (pf->hw.revision_id == 0 &&\n+\t\t pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {\n+\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t \"got num_vsis %d, setting num_vsis to %d\\n\",\n+\t\t\t\t pf->hw.func_caps.num_vsis, DEF_NUM_VSI);\n+\t\t\tpf->hw.func_caps.num_vsis = DEF_NUM_VSI;\n+\t\t}\n \t}\n-\n \treturn 0;\n }\n \n@@ -8156,6 +8981,7 @@ static void i40e_fdir_sb_setup(struct i40e_pf *pf)\n \t\tif (!vsi) {\n \t\t\tdev_info(&pf->pdev->dev, \"Couldn't create FDir VSI\\n\");\n \t\t\tpf->flags &= ~I40E_FLAG_FD_SB_ENABLED;\n+\t\t\tpf->flags |= I40E_FLAG_FD_SB_INACTIVE;\n \t\t\treturn;\n \t\t}\n \t}\n@@ -8178,6 +9004,45 @@ static void i40e_fdir_teardown(struct i40e_pf *pf)\n }\n \n /**\n+ * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs\n+ * @vsi: PF main vsi\n+ * @seid: seid of main or channel VSIs\n+ *\n+ * Rebuilds cloud filters associated with main VSI and channel VSIs if they\n+ * existed before reset\n+ **/\n+static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)\n+{\n+\tstruct i40e_cloud_filter *cfilter;\n+\tstruct i40e_pf *pf = vsi->back;\n+\tstruct hlist_node *node;\n+\ti40e_status ret;\n+\n+\t/* Add cloud filters back if they exist */\n+\thlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,\n+\t\t\t\t cloud_node) {\n+\t\tif (cfilter->seid != seid)\n+\t\t\tcontinue;\n+\n+\t\tif (cfilter->dst_port)\n+\t\t\tret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,\n+\t\t\t\t\t\t\t\ttrue);\n+\t\telse\n+\t\t\tret = i40e_add_del_cloud_filter(vsi, cfilter, true);\n+\n+\t\tif (ret) {\n+\t\t\tdev_dbg(&pf->pdev->dev,\n+\t\t\t\t\"Failed to rebuild cloud filter, err %s aq_err %s\\n\",\n+\t\t\t\ti40e_stat_str(&pf->hw, ret),\n+\t\t\t\ti40e_aq_str(&pf->hw,\n+\t\t\t\t\t pf->hw.aq.asq_last_status));\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset\n * @vsi: PF main vsi\n *\n@@ -8216,6 +9081,13 @@ static int i40e_rebuild_channels(struct i40e_vsi *vsi)\n \t\t\t\tcredits,\n \t\t\t\tch->seid);\n \t\t}\n+\t\tret = i40e_rebuild_cloud_filters(vsi, ch->seid);\n+\t\tif (ret) {\n+\t\t\tdev_dbg(&vsi->back->pdev->dev,\n+\t\t\t\t\"Failed to rebuild cloud filters for channel VSI %u\\n\",\n+\t\t\t\tch->seid);\n+\t\t\treturn ret;\n+\t\t}\n \t}\n \treturn 0;\n }\n@@ -8382,7 +9254,7 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)\n \t\ti40e_verify_eeprom(pf);\n \n \ti40e_clear_pxe_mode(hw);\n-\tret = i40e_get_capabilities(pf);\n+\tret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);\n \tif (ret)\n \t\tgoto end_core_reset;\n \n@@ -8503,6 +9375,10 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)\n \t\t\tvsi->seid);\n \t}\n \n+\tret = i40e_rebuild_cloud_filters(vsi, vsi->seid);\n+\tif (ret)\n+\t\tgoto end_unlock;\n+\n \t/* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs\n \t * for this main VSI if they exist\n \t */\n@@ -9426,6 +10302,7 @@ static int i40e_init_msix(struct i40e_pf *pf)\n \t (pf->num_fdsb_msix == 0)) {\n \t\tdev_info(&pf->pdev->dev, \"Sideband Flowdir disabled, not enough MSI-X vectors\\n\");\n \t\tpf->flags &= ~I40E_FLAG_FD_SB_ENABLED;\n+\t\tpf->flags |= I40E_FLAG_FD_SB_INACTIVE;\n \t}\n \tif ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&\n \t (pf->num_vmdq_msix == 0)) {\n@@ -9543,6 +10420,7 @@ static int i40e_init_interrupt_scheme(struct i40e_pf *pf)\n \t\t\t\t I40E_FLAG_FD_SB_ENABLED\t|\n \t\t\t\t I40E_FLAG_FD_ATR_ENABLED\t|\n \t\t\t\t I40E_FLAG_VMDQ_ENABLED);\n+\t\t\tpf->flags |= I40E_FLAG_FD_SB_INACTIVE;\n \n \t\t\t/* rework the queue expectations without MSIX */\n \t\t\ti40e_determine_queue_usage(pf);\n@@ -10283,9 +11161,13 @@ bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)\n \t\t/* Enable filters and mark for reset */\n \t\tif (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))\n \t\t\tneed_reset = true;\n-\t\t/* enable FD_SB only if there is MSI-X vector */\n-\t\tif (pf->num_fdsb_msix > 0)\n+\t\t/* enable FD_SB only if there is MSI-X vector and no cloud\n+\t\t * filters exist\n+\t\t */\n+\t\tif (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {\n \t\t\tpf->flags |= I40E_FLAG_FD_SB_ENABLED;\n+\t\t\tpf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;\n+\t\t}\n \t} else {\n \t\t/* turn off filters, mark for reset and clear SW filter list */\n \t\tif (pf->flags & I40E_FLAG_FD_SB_ENABLED) {\n@@ -10294,6 +11176,8 @@ bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)\n \t\t}\n \t\tpf->flags &= ~(I40E_FLAG_FD_SB_ENABLED |\n \t\t\t I40E_FLAG_FD_SB_AUTO_DISABLED);\n+\t\tpf->flags |= I40E_FLAG_FD_SB_INACTIVE;\n+\n \t\t/* reset fd counters */\n \t\tpf->fd_add_err = 0;\n \t\tpf->fd_atr_cnt = 0;\n@@ -10355,6 +11239,12 @@ static int i40e_set_features(struct net_device *netdev,\n \telse\n \t\ti40e_vlan_stripping_disable(vsi);\n \n+\tif (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {\n+\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\"Offloaded tc filters active, can't turn hw_tc_offload off\");\n+\t\treturn -EINVAL;\n+\t}\n+\n \tneed_reset = i40e_set_ntuple(pf, features);\n \n \tif (need_reset)\n@@ -10874,7 +11764,8 @@ static int i40e_config_netdev(struct i40e_vsi *vsi)\n \tnetdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;\n \n \tif (!(pf->flags & I40E_FLAG_MFP_ENABLED))\n-\t\tnetdev->hw_features |= NETIF_F_NTUPLE;\n+\t\tnetdev->hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;\n+\n \thw_features = hw_enc_features\t\t|\n \t\t NETIF_F_HW_VLAN_CTAG_TX\t|\n \t\t NETIF_F_HW_VLAN_CTAG_RX;\n@@ -12179,8 +13070,10 @@ static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)\n \t*/\n \n \tif ((pf->hw.pf_id == 0) &&\n-\t !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))\n+\t !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {\n \t\tflags = I40E_AQ_SET_SWITCH_CFG_PROMISC;\n+\t\tpf->last_sw_conf_flags = flags;\n+\t}\n \n \tif (pf->hw.pf_id == 0) {\n \t\tu16 valid_flags;\n@@ -12196,6 +13089,7 @@ static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)\n \t\t\t\t\t pf->hw.aq.asq_last_status));\n \t\t\t/* not a fatal problem, just keep going */\n \t\t}\n+\t\tpf->last_sw_conf_valid_flags = valid_flags;\n \t}\n \n \t/* first time setup */\n@@ -12293,6 +13187,7 @@ static void i40e_determine_queue_usage(struct i40e_pf *pf)\n \t\t\t I40E_FLAG_DCB_ENABLED\t|\n \t\t\t I40E_FLAG_SRIOV_ENABLED\t|\n \t\t\t I40E_FLAG_VMDQ_ENABLED);\n+\t\tpf->flags |= I40E_FLAG_FD_SB_INACTIVE;\n \t} else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |\n \t\t\t\t I40E_FLAG_FD_SB_ENABLED |\n \t\t\t\t I40E_FLAG_FD_ATR_ENABLED |\n@@ -12307,6 +13202,7 @@ static void i40e_determine_queue_usage(struct i40e_pf *pf)\n \t\t\t I40E_FLAG_FD_ATR_ENABLED\t|\n \t\t\t I40E_FLAG_DCB_ENABLED\t|\n \t\t\t I40E_FLAG_VMDQ_ENABLED);\n+\t\tpf->flags |= I40E_FLAG_FD_SB_INACTIVE;\n \t} else {\n \t\t/* Not enough queues for all TCs */\n \t\tif ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&\n@@ -12330,6 +13226,7 @@ static void i40e_determine_queue_usage(struct i40e_pf *pf)\n \t\t\tqueues_left -= 1; /* save 1 queue for FD */\n \t\t} else {\n \t\t\tpf->flags &= ~I40E_FLAG_FD_SB_ENABLED;\n+\t\t\tpf->flags |= I40E_FLAG_FD_SB_INACTIVE;\n \t\t\tdev_info(&pf->pdev->dev, \"not enough queues for Flow Director. Flow Director feature is disabled\\n\");\n \t\t}\n \t}\n@@ -12633,7 +13530,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\tdev_warn(&pdev->dev, \"This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\\n\");\n \n \ti40e_clear_pxe_mode(hw);\n-\terr = i40e_get_capabilities(pf);\n+\terr = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);\n \tif (err)\n \t\tgoto err_adminq_setup;\n \ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h\nindex 92869f5..3bb6659 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h\n@@ -283,6 +283,22 @@ i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,\n \t\tstruct i40e_asq_cmd_details *cmd_details);\n i40e_status i40e_aq_resume_port_tx(struct i40e_hw *hw,\n \t\t\t\t struct i40e_asq_cmd_details *cmd_details);\n+i40e_status\n+i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid,\n+\t\t\t struct i40e_aqc_cloud_filters_element_bb *filters,\n+\t\t\t u8 filter_count);\n+enum i40e_status_code\n+i40e_aq_add_cloud_filters(struct i40e_hw *hw, u16 vsi,\n+\t\t\t struct i40e_aqc_cloud_filters_element_data *filters,\n+\t\t\t u8 filter_count);\n+enum i40e_status_code\n+i40e_aq_rem_cloud_filters(struct i40e_hw *hw, u16 vsi,\n+\t\t\t struct i40e_aqc_cloud_filters_element_data *filters,\n+\t\t\t u8 filter_count);\n+i40e_status\n+i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid,\n+\t\t\t struct i40e_aqc_cloud_filters_element_bb *filters,\n+\t\t\t u8 filter_count);\n i40e_status i40e_read_lldp_cfg(struct i40e_hw *hw,\n \t\t\t struct i40e_lldp_variables *lldp_cfg);\n /* i40e_common */\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h\nindex e4e5a0c..00d4833 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h\n@@ -291,6 +291,7 @@ struct i40e_hw_capabilities {\n #define I40E_CLOUD_FILTER_MODE1\t0x6\n #define I40E_CLOUD_FILTER_MODE2\t0x7\n #define I40E_CLOUD_FILTER_MODE3\t0x8\n+#define I40E_SWITCH_MODE_MASK\t0xF\n \n \tu32 management_mode;\n \tu32 mng_protocols_over_mctp;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\nindex af82c30..06b0457 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n@@ -1360,6 +1360,9 @@ struct i40e_aqc_cloud_filters_element_data {\n \t\tstruct {\n \t\t\tu8 data[16];\n \t\t} v6;\n+\t\tstruct {\n+\t\t\t__le16 data[8];\n+\t\t} raw_v6;\n \t} ipaddr;\n \t__le16\tflags;\n #define I40E_AQC_ADD_CLOUD_FILTER_SHIFT\t\t\t0\n", "prefixes": [ "jkirsher/next-queue", "v5", "6/6" ] }