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GET /api/patches/819132/?format=api
{ "id": 819132, "url": "http://patchwork.ozlabs.org/api/patches/819132/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1506515969-1472-9-git-send-email-kever.yang@rock-chips.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506515969-1472-9-git-send-email-kever.yang@rock-chips.com>", "list_archive_url": null, "date": "2017-09-27T12:39:29", "name": "[U-Boot,8/8] rockchip: rk3128: add sdram driver", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "de619ead3dff45ac528c191bb3dca47261f1c47b", "submitter": { "id": 64532, "url": "http://patchwork.ozlabs.org/api/people/64532/?format=api", "name": "Kever Yang", "email": "kever.yang@rock-chips.com" }, "delegate": { "id": 69486, "url": "http://patchwork.ozlabs.org/api/users/69486/?format=api", "username": "ptomsich", "first_name": "Philipp", "last_name": "Tomsich", "email": "philipp.tomsich@theobroma-systems.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1506515969-1472-9-git-send-email-kever.yang@rock-chips.com/mbox/", "series": [ { "id": 5353, "url": "http://patchwork.ozlabs.org/api/series/5353/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=5353", "date": "2017-09-27T12:39:21", "name": "rockchip: add new SoC support for RK3128", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/5353/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/819132/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/819132/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"goE3HsYP\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2Hb75XvGz9t5l\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 27 Sep 2017 22:44:51 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 8AEF5C21DE8; Wed, 27 Sep 2017 12:42:57 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 788C3C21E21;\n\tWed, 27 Sep 2017 12:40:26 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 430F1C21D95; Wed, 27 Sep 2017 12:40:17 +0000 (UTC)", "from mail-pg0-f65.google.com (mail-pg0-f65.google.com\n\t[74.125.83.65])\n\tby lists.denx.de (Postfix) with ESMTPS id 8D5C4C21DED\n\tfor <u-boot@lists.denx.de>; Wed, 27 Sep 2017 12:40:06 +0000 (UTC)", "by mail-pg0-f65.google.com with SMTP id j16so9094376pga.2\n\tfor <u-boot@lists.denx.de>; Wed, 27 Sep 2017 05:40:06 -0700 (PDT)", "from localhost.localdomain ([103.29.142.67])\n\tby smtp.gmail.com with ESMTPSA id\n\tv24sm21833899pfi.132.2017.09.27.05.40.02\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tWed, 27 Sep 2017 05:40:03 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=Rx156Z50bO1XJyxKlq5SMTkM1VieijzLR/npKRY1Gg4=;\n\tb=goE3HsYPR7EMbRkqFgZ9EXyZ87uaCZvlPlWiQdFQGEkYtqq4D6NRf53trMCAIowKLG\n\tOxZJYtgp3XaHJDMvxFqI8Qki/Em5TYncjAk541NvPl9wFzP7fl1KONdM9uUhTa7jLErq\n\tJ7kvAr9xANFhDi2ziyUTHjdklTWBJ1LeU2mq9fPwkZ2OAHXx2yR1rY1lh82jzo1uMO2m\n\tXHDzg203QtxfjORdutzC7FHW82UjNvOvWIMumnKcAPDodM5O6VAV6cge/mRHtaiBQlCS\n\tW8rr63fRC6/dkRz7RvxLzD25wJ5CxByKqPnh/GPDEyhQAndFpxOWE9Fe4+Wz4dBtjHLG\n\tFayQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=Rx156Z50bO1XJyxKlq5SMTkM1VieijzLR/npKRY1Gg4=;\n\tb=Y0c8ytbrZqe/SX5lpNOXuf/EzJFe5ib/e88VJ9x1RdJigX0y+h2Fisg0TtR78UePhV\n\tEIMa5SFqzxiTN8GjR+veUQpqfokp6tBvJOkEuoUkqdtLXXal162X58lvJLa1VxM2YRWD\n\tY70Vna5UlgyFCXFsbZ3Cal6x5tOM/udayVDo32eXUQlsdlnSg4WT+AxdBQ/nGatVC9KZ\n\tW81xkil4we8qMlK1x8T4HbLdnXmmyHV8zSTG/gO/IFcsgUqx/vgEM/aQtMAMzma7c1lE\n\tWiGBqkAyPLqs/27BaSyT2KInldPLOi32VUiaWn33qDQTVsnJfy/FMoyn/xaTQ4zuUmNU\n\tycBQ==", "X-Gm-Message-State": "AHPjjUhBvaXiq+M1q1zCW2aFUxX3O77O/q436ASNTBZTxWwdZ02LuDAE\n\tKhu8dpXU++S/q/Xcxe2bEZTLFg==", "X-Google-Smtp-Source": "AOwi7QC2ULTfI4Ex3L1dO9LbZWiqhlg90VxH2X03gGytG6Z78wj0EnqoiXBMKOd/5KUAsQxfTra+Fg==", "X-Received": "by 10.99.95.212 with SMTP id t203mr1214862pgb.391.1506516004253; \n\tWed, 27 Sep 2017 05:40:04 -0700 (PDT)", "From": "Kever Yang <kever.yang@rock-chips.com>", "To": "u-boot@lists.denx.de", "Date": "Wed, 27 Sep 2017 20:39:29 +0800", "Message-Id": "<1506515969-1472-9-git-send-email-kever.yang@rock-chips.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1506515969-1472-1-git-send-email-kever.yang@rock-chips.com>", "References": "<1506515969-1472-1-git-send-email-kever.yang@rock-chips.com>", "Subject": "[U-Boot] [PATCH 8/8] rockchip: rk3128: add sdram driver", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.\n\nThis patch is only used for U-Boot, but not for SPL which will\ncomes later, maybe after we merge all the common code into a common\nfile.\n\nSigned-off-by: Kever Yang <kever.yang@rock-chips.com>\n---\n\n drivers/ram/rockchip/Makefile | 1 +\n drivers/ram/rockchip/sdram_rk3128.c | 60 +++++++++++++++++++++++++++++++++++++\n 2 files changed, 61 insertions(+)\n create mode 100644 drivers/ram/rockchip/sdram_rk3128.c", "diff": "diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile\nindex 45b5fe7..1a1e557 100644\n--- a/drivers/ram/rockchip/Makefile\n+++ b/drivers/ram/rockchip/Makefile\n@@ -5,6 +5,7 @@\n #\n \n obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o\n+obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o\n obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o\n obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o\n obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o\ndiff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c\nnew file mode 100644\nindex 0000000..04ad2bb\n--- /dev/null\n+++ b/drivers/ram/rockchip/sdram_rk3128.c\n@@ -0,0 +1,60 @@\n+/*\n+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.\n+ *\n+ * SPDX-License-Identifier: GPL-2.0\n+ */\n+\n+#include <common.h>\n+#include <dm.h>\n+#include <ram.h>\n+#include <syscon.h>\n+#include <asm/arch/clock.h>\n+#include <asm/arch/grf_rk3128.h>\n+#include <asm/arch/sdram_common.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+struct dram_info {\n+\tstruct ram_info info;\n+\tstruct rk3128_grf *grf;\n+};\n+\n+static int rk3128_dmc_probe(struct udevice *dev)\n+{\n+\tstruct dram_info *priv = dev_get_priv(dev);\n+\n+\tpriv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n+\tprintf(\"%s: grf=%p\\n\", __func__, priv->grf);\n+\tpriv->info.base = CONFIG_SYS_SDRAM_BASE;\n+\tpriv->info.size = rockchip_sdram_size(\n+\t\t\t\t(phys_addr_t)&priv->grf->os_reg[1]);\n+\n+\treturn 0;\n+}\n+\n+static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)\n+{\n+\tstruct dram_info *priv = dev_get_priv(dev);\n+\n+\t*info = priv->info;\n+\n+\treturn 0;\n+}\n+\n+static struct ram_ops rk3128_dmc_ops = {\n+\t.get_info = rk3128_dmc_get_info,\n+};\n+\n+\n+static const struct udevice_id rk3128_dmc_ids[] = {\n+\t{ .compatible = \"rockchip,rk3128-dmc\" },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(dmc_rk3128) = {\n+\t.name = \"rockchip_rk3128_dmc\",\n+\t.id = UCLASS_RAM,\n+\t.of_match = rk3128_dmc_ids,\n+\t.ops = &rk3128_dmc_ops,\n+\t.probe = rk3128_dmc_probe,\n+\t.priv_auto_alloc_size = sizeof(struct dram_info),\n+};\n", "prefixes": [ "U-Boot", "8/8" ] }