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GET /api/patches/818134/?format=api
{ "id": 818134, "url": "http://patchwork.ozlabs.org/api/patches/818134/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1506330344-31556-3-git-send-email-vladimir.murzin@arm.com/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506330344-31556-3-git-send-email-vladimir.murzin@arm.com>", "list_archive_url": null, "date": "2017-09-25T09:05:38", "name": "[v3,2/8] ARM: NOMMU: Update MPU accessors to use cp15 helpers", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "47e94fae32fc622bd66ff9ce5eb5e23a26a129cb", "submitter": { "id": 65248, "url": "http://patchwork.ozlabs.org/api/people/65248/?format=api", "name": "Vladimir Murzin", "email": "vladimir.murzin@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1506330344-31556-3-git-send-email-vladimir.murzin@arm.com/mbox/", "series": [ { "id": 4911, "url": "http://patchwork.ozlabs.org/api/series/4911/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=4911", "date": "2017-09-25T09:05:36", "name": "ARM: NOMMU: MPU updates", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/4911/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/818134/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/818134/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"EIR5rxmh\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y0yrb4DMcz9sDB\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tMon, 25 Sep 2017 19:06:55 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dwPLm-0001tm-Ub; Mon, 25 Sep 2017 09:06:50 +0000", "from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dwPLP-0001LO-2d for linux-arm-kernel@lists.infradead.org;\n\tMon, 25 Sep 2017 09:06:29 +0000", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73726164F;\n\tMon, 25 Sep 2017 02:06:08 -0700 (PDT)", "from bc-c11-3-12.euhpc.arm.com. (bc-c11-3-12.euhpc.arm.com\n\t[10.6.2.250])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id\n\tEEB5F3F3E1; Mon, 25 Sep 2017 02:06:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=W5K8vlyU/HxXXKYKYh8TaYSzT3qTA4uJVHSYOhhTjeg=;\n\tb=EIR5rxmhFp8WNd\n\tw+CHihz424GkHSh8xepy9ddpIUEhMM9WapSZQFNZLF1+vwSxXQVZZtlvz69YpNRale0byz8GcfN8b\n\tX+OeodFeIsSygXw25AeT3PxA3ZD7UB9EpRsMjpok9RHmdAlOLRVZbIiRp5VC2zfI7mdp+mypftJLv\n\t5ZEX2TiUHHHP93REleVHbcDlxg/nS8rvCXszUMzbSHzeI9HAW2OOwTRlRkOpZWGFmoyx5B4SSrg6T\n\tLPXdQO2Oh54Orcz+403Pbi6Aht6LOOm49DboOMIbMD0Kh8WRALqmIFDE2WpUliB9SONUuep1dkrbu\n\t0xHfhFgaM4Yw+P0CYCIw==;", "From": "Vladimir Murzin <vladimir.murzin@arm.com>", "To": "linux-arm-kernel@lists.infradead.org", "Subject": "[PATCH v3 2/8] ARM: NOMMU: Update MPU accessors to use cp15 helpers", "Date": "Mon, 25 Sep 2017 10:05:38 +0100", "Message-Id": "<1506330344-31556-3-git-send-email-vladimir.murzin@arm.com>", "X-Mailer": "git-send-email 2.0.0", "In-Reply-To": "<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>", "References": "<1506330344-31556-1-git-send-email-vladimir.murzin@arm.com>", "MIME-Version": "1.0", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170925_020627_135883_27A25ADA ", "X-CRM114-Status": "UNSURE ( 7.72 )", "X-CRM114-Notice": "Please train this message.", "X-Spam-Score": "-6.9 (------)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "alexandre.torgue@st.com, manabian@gmail.com, linux@armlinux.org.uk,\n\tstefan@agner.ch, kbuild-all@01.org, u.kleine-koenig@pengutronix.de,\n\tsza@esh.hu", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "Currently, inline assembly for accessing to MPU's cp15 lacks volatile\nkeyword which opens possibility to compiler to optimise such accesses\nas soon as we start using them more intensively. Rather than fixing\ninline asm, lets move MPU accessors to use cp15 helpers which do the\nright thing.\n\nTested-by: Szemző András <sza@esh.hu>\nTested-by: Alexandre TORGUE <alexandre.torgue@st.com>\nSigned-off-by: Vladimir Murzin <vladimir.murzin@arm.com>\n---\n arch/arm/mm/pmsa-v7.c | 48 ++++++++++++++++++++++++++----------------------\n 1 file changed, 26 insertions(+), 22 deletions(-)", "diff": "diff --git a/arch/arm/mm/pmsa-v7.c b/arch/arm/mm/pmsa-v7.c\nindex ee3cf51..5b55f8f 100644\n--- a/arch/arm/mm/pmsa-v7.c\n+++ b/arch/arm/mm/pmsa-v7.c\n@@ -12,63 +12,67 @@\n \n #include \"mm.h\"\n \n+#define DRBAR\t__ACCESS_CP15(c6, 0, c1, 0)\n+#define IRBAR\t__ACCESS_CP15(c6, 0, c1, 1)\n+#define DRSR\t__ACCESS_CP15(c6, 0, c1, 2)\n+#define IRSR\t__ACCESS_CP15(c6, 0, c1, 3)\n+#define DRACR\t__ACCESS_CP15(c6, 0, c1, 4)\n+#define IRACR\t__ACCESS_CP15(c6, 0, c1, 5)\n+#define RNGNR\t__ACCESS_CP15(c6, 0, c2, 0)\n+\n /* Region number */\n-static void rgnr_write(u32 v)\n+static inline void rgnr_write(u32 v)\n {\n-\tasm(\"mcr p15, 0, %0, c6, c2, 0\" : : \"r\" (v));\n+\twrite_sysreg(v, RNGNR);\n }\n \n /* Data-side / unified region attributes */\n \n /* Region access control register */\n-static void dracr_write(u32 v)\n+static inline void dracr_write(u32 v)\n {\n-\tasm(\"mcr p15, 0, %0, c6, c1, 4\" : : \"r\" (v));\n+\twrite_sysreg(v, DRACR);\n }\n \n /* Region size register */\n-static void drsr_write(u32 v)\n+static inline void drsr_write(u32 v)\n {\n-\tasm(\"mcr p15, 0, %0, c6, c1, 2\" : : \"r\" (v));\n+\twrite_sysreg(v, DRSR);\n }\n \n /* Region base address register */\n-static void drbar_write(u32 v)\n+static inline void drbar_write(u32 v)\n {\n-\tasm(\"mcr p15, 0, %0, c6, c1, 0\" : : \"r\" (v));\n+\twrite_sysreg(v, DRBAR);\n }\n \n-static u32 drbar_read(void)\n+static inline u32 drbar_read(void)\n {\n-\tu32 v;\n-\tasm(\"mrc p15, 0, %0, c6, c1, 0\" : \"=r\" (v));\n-\treturn v;\n+\treturn read_sysreg(DRBAR);\n }\n /* Optional instruction-side region attributes */\n \n /* I-side Region access control register */\n-static void iracr_write(u32 v)\n+static inline void iracr_write(u32 v)\n {\n-\tasm(\"mcr p15, 0, %0, c6, c1, 5\" : : \"r\" (v));\n+\twrite_sysreg(v, IRACR);\n }\n \n /* I-side Region size register */\n-static void irsr_write(u32 v)\n+static inline void irsr_write(u32 v)\n {\n-\tasm(\"mcr p15, 0, %0, c6, c1, 3\" : : \"r\" (v));\n+\twrite_sysreg(v, IRSR);\n }\n \n /* I-side Region base address register */\n-static void irbar_write(u32 v)\n+static inline void irbar_write(u32 v)\n {\n-\tasm(\"mcr p15, 0, %0, c6, c1, 1\" : : \"r\" (v));\n+\twrite_sysreg(v, IRBAR);\n }\n \n-static unsigned long irbar_read(void)\n+static inline u32 irbar_read(void)\n {\n-\tunsigned long v;\n-\tasm(\"mrc p15, 0, %0, c6, c1, 1\" : \"=r\" (v));\n-\treturn v;\n+\treturn read_sysreg(IRBAR);\n }\n \n /* MPU initialisation functions */\n", "prefixes": [ "v3", "2/8" ] }