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{
    "id": 818105,
    "url": "http://patchwork.ozlabs.org/api/patches/818105/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1506328815-23733-6-git-send-email-tien.fong.chee@intel.com/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
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    "msgid": "<1506328815-23733-6-git-send-email-tien.fong.chee@intel.com>",
    "list_archive_url": null,
    "date": "2017-09-25T08:40:01",
    "name": "[U-Boot,v2,05/19] arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": false,
    "hash": "3b891deb945b761754500f708595ab66a25adc27",
    "submitter": {
        "id": 70549,
        "url": "http://patchwork.ozlabs.org/api/people/70549/?format=api",
        "name": "Chee, Tien Fong",
        "email": "tien.fong.chee@intel.com"
    },
    "delegate": {
        "id": 1699,
        "url": "http://patchwork.ozlabs.org/api/users/1699/?format=api",
        "username": "marex",
        "first_name": "Marek",
        "last_name": "Vasut",
        "email": "marek.vasut@gmail.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1506328815-23733-6-git-send-email-tien.fong.chee@intel.com/mbox/",
    "series": [
        {
            "id": 4901,
            "url": "http://patchwork.ozlabs.org/api/series/4901/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=4901",
            "date": "2017-09-25T08:39:56",
            "name": "Add FPGA, SDRAM, SPL loads U-boot & booting to console",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/4901/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/818105/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/818105/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<u-boot-bounces@lists.denx.de>",
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            "from tfchee-mobl.gar.corp.intel.com (HELO tienfong.fm.intel.com,\n\t) ([10.226.242.95])\n\tby fmsmga005.fm.intel.com with ESMTP; 25 Sep 2017 01:40:30 -0700"
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        "From": "tien.fong.chee@intel.com",
        "To": "u-boot@lists.denx.de",
        "Date": "Mon, 25 Sep 2017 16:40:01 +0800",
        "Message-Id": "<1506328815-23733-6-git-send-email-tien.fong.chee@intel.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1506328815-23733-1-git-send-email-tien.fong.chee@intel.com>",
        "References": "<1506328815-23733-1-git-send-email-tien.fong.chee@intel.com>",
        "Cc": "Marek Vasut <marex@denx.de>, Tien Fong Chee <tien.fong.chee@intel.com>, \n\tChing Liang See <chin.liang.see@intel.com>,\n\tTien Fong <skywindctf@gmail.com>, \n\tWestergteen Dalon <dalon.westergreen@intel.com>",
        "Subject": "[U-Boot] [PATCH v2 05/19] arm: socfpga: Enhance FPGA program write\n\trbf data with size >= 4 bytes",
        "X-BeenThere": "u-boot@lists.denx.de",
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        "List-Id": "U-Boot discussion <u-boot.lists.denx.de>",
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        "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>"
    },
    "content": "From: Tien Fong Chee <tien.fong.chee@intel.com>\n\nExisting FPGA program write is always assume RBF data >= 32 bytes, so\nany rbf data less than 32 bytes writing to FPGA would be failed.\nThis patch enhances the FPGA program write to support rbf data with\nsize >= 4 bytes.\n\nSigned-off-by: Tien Fong Chee <tien.fong.chee@intel.com>\n---\n drivers/fpga/socfpga.c | 14 ++++++++------\n 1 file changed, 8 insertions(+), 6 deletions(-)",
    "diff": "diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c\nindex 28fa16b..6e14ebd 100644\n--- a/drivers/fpga/socfpga.c\n+++ b/drivers/fpga/socfpga.c\n@@ -1,5 +1,5 @@\n /*\n- * Copyright (C) 2012 Altera Corporation <www.altera.com>\n+ * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>\n  * All rights reserved.\n  *\n  * SPDX-License-Identifier:\tBSD-3-Clause\n@@ -55,18 +55,20 @@ void fpgamgr_program_write(const void *rbf_data, size_t rbf_size)\n \tuint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);\n \n \tasm volatile(\n+\t\t\"\tcmp\t%2,\t#0\\n\"\n+\t\t\"\tbeq\t2f\\n\"\n \t\t\"1:\tldmia\t%0!,\t{r0-r7}\\n\"\n \t\t\"\tstmia\t%1!,\t{r0-r7}\\n\"\n \t\t\"\tsub\t%1,\t#32\\n\"\n \t\t\"\tsubs\t%2,\t#1\\n\"\n \t\t\"\tbne\t1b\\n\"\n-\t\t\"\tcmp\t%3,\t#0\\n\"\n-\t\t\"\tbeq\t3f\\n\"\n-\t\t\"2:\tldr\t%2,\t[%0],\t#4\\n\"\n+\t\t\"2:\tcmp\t%3,\t#0\\n\"\n+\t\t\"\tbeq\t4f\\n\"\n+\t\t\"3:\tldr\t%2,\t[%0],\t#4\\n\"\n \t\t\"\tstr\t%2,\t[%1]\\n\"\n \t\t\"\tsubs\t%3,\t#1\\n\"\n-\t\t\"\tbne\t2b\\n\"\n-\t\t\"3:\tnop\\n\"\n+\t\t\"\tbne\t3b\\n\"\n+\t\t\"4:\tnop\\n\"\n \t\t: \"+r\"(src), \"+r\"(dst), \"+r\"(loops32), \"+r\"(loops4) :\n \t\t: \"r0\", \"r1\", \"r2\", \"r3\", \"r4\", \"r5\", \"r6\", \"r7\", \"cc\");\n }\n",
    "prefixes": [
        "U-Boot",
        "v2",
        "05/19"
    ]
}