Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/816979/?format=api
{ "id": 816979, "url": "http://patchwork.ozlabs.org/api/patches/816979/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1506007346-10037-21-git-send-email-jjhiblot@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506007346-10037-21-git-send-email-jjhiblot@ti.com>", "list_archive_url": null, "date": "2017-09-21T15:22:23", "name": "[U-Boot,20/23] ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "8071b908cfe7067e2f83ed52f29723e2e1fceb84", "submitter": { "id": 70508, "url": "http://patchwork.ozlabs.org/api/people/70508/?format=api", "name": "Jean-Jacques Hiblot", "email": "jjhiblot@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1506007346-10037-21-git-send-email-jjhiblot@ti.com/mbox/", "series": [ { "id": 4414, "url": "http://patchwork.ozlabs.org/api/series/4414/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=4414", "date": "2017-09-21T15:22:03", "name": "mmc: omap5: Add support for UHS and HS200 modes", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/4414/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/816979/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/816979/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"bcJZFnik\";\n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyghJ2PC7z9s06\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 22 Sep 2017 01:36:48 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 1795CC220FC; Thu, 21 Sep 2017 15:31:07 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 82C84C220C0;\n\tThu, 21 Sep 2017 15:31:05 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid F3B0CC21ED3; Thu, 21 Sep 2017 15:24:17 +0000 (UTC)", "from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16])\n\tby lists.denx.de (Postfix) with ESMTPS id 3CBC8C2201C\n\tfor <u-boot@lists.denx.de>; Thu, 21 Sep 2017 15:24:13 +0000 (UTC)", "from dflxv15.itg.ti.com ([128.247.5.124])\n\tby fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LFNA1d009175; \n\tThu, 21 Sep 2017 10:23:10 -0500", "from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LFN5ve010075;\n\tThu, 21 Sep 2017 10:23:05 -0500", "from DLEE113.ent.ti.com (157.170.170.24) by DLEE101.ent.ti.com\n\t(157.170.170.31) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tThu, 21 Sep 2017 10:23:05 -0500", "from dlep32.itg.ti.com (157.170.170.100) by DLEE113.ent.ti.com\n\t(157.170.170.24) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Thu, 21 Sep 2017 10:23:05 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LFN4RM021190;\n\tThu, 21 Sep 2017 10:23:04 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506007390;\n\tbh=tSke/4mdXdhqHWGbpNAnclwIiLoWBn/IBpRiaivVU4I=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=bcJZFnikzu/uERKpV24GEmsqMlhPXF5ryU0cR6ej9Qu69axxU+e7d6vDL9zUZym1A\n\tajnz+MjmGX8vDItZcjJU7WRxLXCFGMwgTSBRyXQlFkB2w/p1knTmx4aqDvdzabh2gx\n\tTeVJJS5R8jfF5Swhjc1/Bq+6paQld+8EuSYI6DFw=", "From": "Jean-Jacques Hiblot <jjhiblot@ti.com>", "To": "<jh80.chung@samsung.com>, <trini@konsulko.com>, <kishon@ti.com>,\n\t<sjg@chromium.org>, <lokeshvutla@ti.com>", "Date": "Thu, 21 Sep 2017 17:22:23 +0200", "Message-ID": "<1506007346-10037-21-git-send-email-jjhiblot@ti.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1506007346-10037-1-git-send-email-jjhiblot@ti.com>", "References": "<1506007346-10037-1-git-send-email-jjhiblot@ti.com>", "MIME-Version": "1.0", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "Cc": "u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH 20/23] ARM: dts: dra7: Add supported MMC/SD modes\n\tin MMC dt nodes", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "On DRA7 family SoCs, MMC1 controller supports SDR104,\nSDR50, DDR50, SDR25 and SDR12 UHS modes.\n\nMMC2 controller supports HS200 and DDR modes.\n\nMMC3 controller supports SDR12, SDR25 and SDR50 modes.\n\nMMC4 controller supports SDR12 and SDR25 modes.\n\nAdd these supported modes in device-tree file.\n\nSigned-off-by: Kishon Vijay Abraham I <kishon@ti.com>\nSigned-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>\n---\n arch/arm/dts/dra7.dtsi | 14 ++++++++++++++\n 1 file changed, 14 insertions(+)", "diff": "diff --git a/arch/arm/dts/dra7.dtsi b/arch/arm/dts/dra7.dtsi\nindex 9061843..0f982d8 100644\n--- a/arch/arm/dts/dra7.dtsi\n+++ b/arch/arm/dts/dra7.dtsi\n@@ -1067,6 +1067,11 @@\n \t\t\tstatus = \"disabled\";\n \t\t\tpbias-supply = <&pbias_mmc_reg>;\n \t\t\tmax-frequency = <192000000>;\n+\t\t\tsd-uhs-sdr104;\n+\t\t\tsd-uhs-sdr50;\n+\t\t\tsd-uhs-ddr50;\n+\t\t\tsd-uhs-sdr25;\n+\t\t\tsd-uhs-sdr12;\n \t\t};\n \n \t\tmmc2: mmc@480b4000 {\n@@ -1079,6 +1084,10 @@\n \t\t\tdma-names = \"tx\", \"rx\";\n \t\t\tstatus = \"disabled\";\n \t\t\tmax-frequency = <192000000>;\n+\t\t\tsd-uhs-sdr25;\n+\t\t\tsd-uhs-sdr12;\n+\t\t\tmmc-hs200-1_8v;\n+\t\t\tmmc-ddr-1_8v;\n \t\t};\n \n \t\tmmc3: mmc@480ad000 {\n@@ -1092,6 +1101,9 @@\n \t\t\tstatus = \"disabled\";\n \t\t\t/* Errata i887 limits max-frequency of MMC3 to 64 MHz */\n \t\t\tmax-frequency = <64000000>;\n+\t\t\tsd-uhs-sdr12;\n+\t\t\tsd-uhs-sdr25;\n+\t\t\tsd-uhs-sdr50;\n \t\t};\n \n \t\tmmc4: mmc@480d1000 {\n@@ -1104,6 +1116,8 @@\n \t\t\tdma-names = \"tx\", \"rx\";\n \t\t\tstatus = \"disabled\";\n \t\t\tmax-frequency = <192000000>;\n+\t\t\tsd-uhs-sdr12;\n+\t\t\tsd-uhs-sdr25;\n \t\t};\n \n \t\tmmu0_dsp1: mmu@40d01000 {\n", "prefixes": [ "U-Boot", "20/23" ] }