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GET /api/patches/816963/?format=api
{ "id": 816963, "url": "http://patchwork.ozlabs.org/api/patches/816963/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1506007346-10037-5-git-send-email-jjhiblot@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506007346-10037-5-git-send-email-jjhiblot@ti.com>", "list_archive_url": null, "date": "2017-09-21T15:22:07", "name": "[U-Boot,04/23] mmc: omap_hsmmc: set MMC mode in the UHSMS bit field", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "dc4fdc0ecebbd782f7ae31c17cec912930980165", "submitter": { "id": 70508, "url": "http://patchwork.ozlabs.org/api/people/70508/?format=api", "name": "Jean-Jacques Hiblot", "email": "jjhiblot@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1506007346-10037-5-git-send-email-jjhiblot@ti.com/mbox/", "series": [ { "id": 4414, "url": "http://patchwork.ozlabs.org/api/series/4414/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=4414", "date": "2017-09-21T15:22:03", "name": "mmc: omap5: Add support for UHS and HS200 modes", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/4414/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/816963/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/816963/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"l6YFY3hv\";\n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xygXv4ynNz9t49\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 22 Sep 2017 01:30:23 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 3CAEBC22093; Thu, 21 Sep 2017 15:27:43 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id CF8E2C22090;\n\tThu, 21 Sep 2017 15:27:40 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 9EB00C22092; Thu, 21 Sep 2017 15:23:55 +0000 (UTC)", "from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16])\n\tby lists.denx.de (Postfix) with ESMTPS id 35210C21EAB\n\tfor <u-boot@lists.denx.de>; Thu, 21 Sep 2017 15:23:52 +0000 (UTC)", "from dlelxv90.itg.ti.com ([172.17.2.17])\n\tby fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LFMnFJ009116; \n\tThu, 21 Sep 2017 10:22:49 -0500", "from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27])\n\tby dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LFMiqb032697; \n\tThu, 21 Sep 2017 10:22:44 -0500", "from DFLE105.ent.ti.com (10.64.6.26) by DFLE106.ent.ti.com\n\t(10.64.6.27) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tThu, 21 Sep 2017 10:22:44 -0500", "from dlep33.itg.ti.com (157.170.170.75) by DFLE105.ent.ti.com\n\t(10.64.6.26) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Thu, 21 Sep 2017 10:22:44 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LFMhbx000975;\n\tThu, 21 Sep 2017 10:22:44 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506007369;\n\tbh=2MYujNQwlVYcBV7SvRsB1S5thbLC6c+oburFtNxPO3I=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=l6YFY3hvGRdfVkl27Mapmfipp3K64KawSm06A9kC/CS+KYTjwwoGSknTVYO4ECqqA\n\tQfuX4JXqN3bHQ54/dG9KKELUeRJvzzxap1bAoOAbizvRRubKraXyKFYF14AYDlrJfV\n\t2CTsOpvef6/1JLDUubO7HUQtIIR3rx3Faru/bllA=", "From": "Jean-Jacques Hiblot <jjhiblot@ti.com>", "To": "<jh80.chung@samsung.com>, <trini@konsulko.com>, <kishon@ti.com>,\n\t<sjg@chromium.org>, <lokeshvutla@ti.com>", "Date": "Thu, 21 Sep 2017 17:22:07 +0200", "Message-ID": "<1506007346-10037-5-git-send-email-jjhiblot@ti.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1506007346-10037-1-git-send-email-jjhiblot@ti.com>", "References": "<1506007346-10037-1-git-send-email-jjhiblot@ti.com>", "MIME-Version": "1.0", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "Cc": "u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH 04/23] mmc: omap_hsmmc: set MMC mode in the UHSMS\n\tbit field", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Kishon Vijay Abraham I <kishon@ti.com>\n\nUse the timing parameter set in the MMC core to set the\nmode in UHSMS bit field. This is in preparation for\nadding HS200 support in omap hsmmc driver.\n\nSigned-off-by: Kishon Vijay Abraham I <kishon@ti.com>\nSigned-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>\n---\n arch/arm/include/asm/omap_mmc.h | 12 ++++++++++-\n drivers/mmc/omap_hsmmc.c | 47 +++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 58 insertions(+), 1 deletion(-)", "diff": "diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h\nindex c4d326d..3f94f2e 100644\n--- a/arch/arm/include/asm/omap_mmc.h\n+++ b/arch/arm/include/asm/omap_mmc.h\n@@ -53,7 +53,8 @@ struct hsmmc {\n \tunsigned int sysctl;\t\t/* 0x12C */\n \tunsigned int stat;\t\t/* 0x130 */\n \tunsigned int ie;\t\t/* 0x134 */\n-\tunsigned char res4[0x8];\n+\tunsigned char res4[0x4];\n+\tunsigned int ac12;\t\t/* 0x13C */\n \tunsigned int capa;\t\t/* 0x140 */\n \tunsigned char res5[0x10];\n \tunsigned int admaes;\t\t/* 0x154 */\n@@ -170,6 +171,15 @@ struct omap_hsmmc_plat {\n #define IOV_3V0\t\t\t\t3000000\n #define IOV_1V8\t\t\t\t1800000\n \n+#define AC12_ET\t\t\t\t(1 << 22)\n+#define AC12_UHSMC_MASK\t\t\t(7 << 16)\n+#define AC12_UHSMC_DDR50\t\t(4 << 16)\n+#define AC12_UHSMC_SDR104\t\t(3 << 16)\n+#define AC12_UHSMC_SDR50\t\t(2 << 16)\n+#define AC12_UHSMC_SDR25\t\t(1 << 16)\n+#define AC12_UHSMC_SDR12\t\t(0 << 16)\n+#define AC12_UHSMC_RES\t\t\t(0x7 << 16)\n+\n /* Driver definitions */\n #define MMCSD_SECTOR_SIZE\t\t512\n #define MMC_CARD\t\t\t0\ndiff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c\nindex e0c7067..4a65a46 100644\n--- a/drivers/mmc/omap_hsmmc.c\n+++ b/drivers/mmc/omap_hsmmc.c\n@@ -76,6 +76,7 @@ struct omap_hsmmc_data {\n #endif\n #if CONFIG_IS_ENABLED(DM_MMC)\n \tuint iov;\n+\tenum bus_mode mode;\n #endif\n \tu8 controller_flags;\n #ifndef CONFIG_OMAP34XX\n@@ -258,6 +259,48 @@ void mmc_init_stream(struct hsmmc *mmc_base)\n }\n \n #if CONFIG_IS_ENABLED(DM_MMC)\n+static void omap_hsmmc_set_timing(struct mmc *mmc)\n+{\n+\tu32 val;\n+\tstruct hsmmc *mmc_base;\n+\tstruct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);\n+\n+\tmmc_base = priv->base_addr;\n+\n+\tval = readl(&mmc_base->ac12);\n+\tval &= ~AC12_UHSMC_MASK;\n+\tpriv->mode = mmc->selected_mode;\n+\n+\tswitch (priv->mode) {\n+\tcase MMC_HS_200:\n+\tcase UHS_SDR104:\n+\t\tval |= AC12_UHSMC_SDR104;\n+\t\tbreak;\n+\tcase UHS_SDR50:\n+\t\tval |= AC12_UHSMC_SDR50;\n+\t\tbreak;\n+\tcase MMC_DDR_52:\n+\tcase UHS_DDR50:\n+\t\tval |= AC12_UHSMC_DDR50;\n+\t\tbreak;\n+\tcase SD_HS:\n+\tcase MMC_HS_52:\n+\tcase UHS_SDR25:\n+\t\tval |= AC12_UHSMC_SDR25;\n+\t\tbreak;\n+\tcase MMC_LEGACY:\n+\tcase MMC_HS:\n+\tcase SD_LEGACY:\n+\tcase UHS_SDR12:\n+\t\tval |= AC12_UHSMC_SDR12;\n+\t\tbreak;\n+\tdefault:\n+\t\tval |= AC12_UHSMC_RES;\n+\t\tbreak;\n+\t}\n+\twritel(val, &mmc_base->ac12);\n+}\n+\n static void omap_hsmmc_conf_bus_power(struct mmc *mmc)\n {\n \tstruct hsmmc *mmc_base;\n@@ -924,6 +967,10 @@ static int omap_hsmmc_set_ios(struct udevice *dev)\n \tif (priv->clock != mmc->clock)\n \t\tomap_hsmmc_set_clock(mmc);\n \n+#if CONFIG_IS_ENABLED(DM_MMC)\n+\tif (priv->mode != mmc->selected_mode)\n+\t\tomap_hsmmc_set_timing(mmc);\n+#endif\n \treturn 0;\n }\n \n", "prefixes": [ "U-Boot", "04/23" ] }