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GET /api/patches/816929/?format=api
{ "id": 816929, "url": "http://patchwork.ozlabs.org/api/patches/816929/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1506005496-8635-3-git-send-email-jjhiblot@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506005496-8635-3-git-send-email-jjhiblot@ti.com>", "list_archive_url": null, "date": "2017-09-21T14:51:33", "name": "[U-Boot,v2,2/5] omap: Update the base address of the MMC controllers", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "f6f48c95ef15c07537e5f0db7e9e3a44cb61ec70", "submitter": { "id": 70508, "url": "http://patchwork.ozlabs.org/api/people/70508/?format=api", "name": "Jean-Jacques Hiblot", "email": "jjhiblot@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1506005496-8635-3-git-send-email-jjhiblot@ti.com/mbox/", "series": [ { "id": 4406, "url": "http://patchwork.ozlabs.org/api/series/4406/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=4406", "date": "2017-09-21T14:51:31", "name": "mmc: omap_hsmmc: Add support for ADMA", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/4406/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/816929/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/816929/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"qTKwzJeM\";\n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyflc2t6kz9t3w\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 22 Sep 2017 00:54:36 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 37812C21E3B; Thu, 21 Sep 2017 14:52:46 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 22A7BC22050;\n\tThu, 21 Sep 2017 14:52:19 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid C3C0FC22027; Thu, 21 Sep 2017 14:51:57 +0000 (UTC)", "from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80])\n\tby lists.denx.de (Postfix) with ESMTPS id DB51BC2200A\n\tfor <u-boot@lists.denx.de>; Thu, 21 Sep 2017 14:51:53 +0000 (UTC)", "from dflxv15.itg.ti.com ([128.247.5.124])\n\tby lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LEppDr007886; \n\tThu, 21 Sep 2017 09:51:51 -0500", "from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEppRn027982;\n\tThu, 21 Sep 2017 09:51:51 -0500", "from DLEE102.ent.ti.com (157.170.170.32) by DLEE101.ent.ti.com\n\t(157.170.170.31) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tThu, 21 Sep 2017 09:51:51 -0500", "from dlep32.itg.ti.com (157.170.170.100) by DLEE102.ent.ti.com\n\t(157.170.170.32) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Thu, 21 Sep 2017 09:51:50 -0500", "from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEpnSW019493;\n\tThu, 21 Sep 2017 09:51:50 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506005511;\n\tbh=Kfkhae1bJMfsJyQx95eq2QnQXsqV8AuUczs56IgsHa4=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=qTKwzJeMJWsZ8MUH2R+l+M6GSwoFxmX2uzjeQQWELiCp116SzbxoDkzu1nlYYqunv\n\tmBushE13knmzywba302kTbuhXYq0mefOkStxKqeLJKrzeqbFq3Heq5OiE8OC0Ypoua\n\tbub5LPQA9y0dVurJvheaeyDotozKP4NsPPeKDnQs=", "From": "Jean-Jacques Hiblot <jjhiblot@ti.com>", "To": "<jh80.chung@samsung.com>, <trini@konsulko.com>, <kishon@ti.com>,\n\t<sjg@chromium.org>", "Date": "Thu, 21 Sep 2017 16:51:33 +0200", "Message-ID": "<1506005496-8635-3-git-send-email-jjhiblot@ti.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1506005496-8635-1-git-send-email-jjhiblot@ti.com>", "References": "<1506005496-8635-1-git-send-email-jjhiblot@ti.com>", "MIME-Version": "1.0", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "Cc": "u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v2 2/5] omap: Update the base address of the MMC\n\tcontrollers", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Align the base address defined in header files with the base address used\nin the DTS. This will facilitate the introduction of the DMA support.\n\nOf all HSMMC users, only omap3 doesn't have the 0x100 reserved region at\nthe top. This region will be used to determine if the controller supports\nDMA transfers\n\nSigned-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>\n---\n arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 4 ++--\n arch/arm/include/asm/arch-omap4/mmc_host_def.h | 6 +++---\n arch/arm/include/asm/arch-omap5/mmc_host_def.h | 6 +++---\n arch/arm/include/asm/omap_mmc.h | 2 +-\n arch/arm/mach-keystone/include/mach/mmc_host_def.h | 4 ++--\n 5 files changed, 11 insertions(+), 11 deletions(-)", "diff": "diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h\nindex 724e252..5a2ea8f 100644\n--- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h\n+++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h\n@@ -21,8 +21,8 @@\n /*\n * OMAP HSMMC register definitions\n */\n-#define OMAP_HSMMC1_BASE\t\t0x48060100\n-#define OMAP_HSMMC2_BASE\t\t0x481D8100\n+#define OMAP_HSMMC1_BASE\t\t0x48060000\n+#define OMAP_HSMMC2_BASE\t\t0x481D8000\n \n #if defined(CONFIG_TI814X)\n #undef MMC_CLOCK_REFERENCE\ndiff --git a/arch/arm/include/asm/arch-omap4/mmc_host_def.h b/arch/arm/include/asm/arch-omap4/mmc_host_def.h\nindex 9c8ccb6..d067799 100644\n--- a/arch/arm/include/asm/arch-omap4/mmc_host_def.h\n+++ b/arch/arm/include/asm/arch-omap4/mmc_host_def.h\n@@ -31,8 +31,8 @@\n * OMAP HSMMC register definitions\n */\n \n-#define OMAP_HSMMC1_BASE\t0x4809C100\n-#define OMAP_HSMMC2_BASE\t0x480B4100\n-#define OMAP_HSMMC3_BASE\t0x480AD100\n+#define OMAP_HSMMC1_BASE\t0x4809C000\n+#define OMAP_HSMMC2_BASE\t0x480B4000\n+#define OMAP_HSMMC3_BASE\t0x480AD000\n \n #endif /* MMC_HOST_DEF_H */\ndiff --git a/arch/arm/include/asm/arch-omap5/mmc_host_def.h b/arch/arm/include/asm/arch-omap5/mmc_host_def.h\nindex 9c8ccb6..d067799 100644\n--- a/arch/arm/include/asm/arch-omap5/mmc_host_def.h\n+++ b/arch/arm/include/asm/arch-omap5/mmc_host_def.h\n@@ -31,8 +31,8 @@\n * OMAP HSMMC register definitions\n */\n \n-#define OMAP_HSMMC1_BASE\t0x4809C100\n-#define OMAP_HSMMC2_BASE\t0x480B4100\n-#define OMAP_HSMMC3_BASE\t0x480AD100\n+#define OMAP_HSMMC1_BASE\t0x4809C000\n+#define OMAP_HSMMC2_BASE\t0x480B4000\n+#define OMAP_HSMMC3_BASE\t0x480AD000\n \n #endif /* MMC_HOST_DEF_H */\ndiff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h\nindex 297e6a7..77278a3 100644\n--- a/arch/arm/include/asm/omap_mmc.h\n+++ b/arch/arm/include/asm/omap_mmc.h\n@@ -28,7 +28,7 @@\n #include <mmc.h>\n \n struct hsmmc {\n-#ifdef CONFIG_DM_MMC\n+#ifndef CONFIG_OMAP34XX\n \tunsigned char res0[0x100];\n #endif\n \tunsigned char res1[0x10];\ndiff --git a/arch/arm/mach-keystone/include/mach/mmc_host_def.h b/arch/arm/mach-keystone/include/mach/mmc_host_def.h\nindex a5050ac..b8eed7d 100644\n--- a/arch/arm/mach-keystone/include/mach/mmc_host_def.h\n+++ b/arch/arm/mach-keystone/include/mach/mmc_host_def.h\n@@ -16,7 +16,7 @@\n * OMAP HSMMC register definitions\n */\n \n-#define OMAP_HSMMC1_BASE\t0x23000100\n-#define OMAP_HSMMC2_BASE\t0x23100100\n+#define OMAP_HSMMC1_BASE\t0x23000000\n+#define OMAP_HSMMC2_BASE\t0x23100000\n \n #endif /* K2G_MMC_HOST_DEF_H */\n", "prefixes": [ "U-Boot", "v2", "2/5" ] }