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GET /api/patches/816822/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 816822,
    "url": "http://patchwork.ozlabs.org/api/patches/816822/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/1505992913-107256-4-git-send-email-linyunsheng@huawei.com/",
    "project": {
        "id": 7,
        "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api",
        "name": "Linux network development",
        "link_name": "netdev",
        "list_id": "netdev.vger.kernel.org",
        "list_email": "netdev@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1505992913-107256-4-git-send-email-linyunsheng@huawei.com>",
    "list_archive_url": null,
    "date": "2017-09-21T11:21:46",
    "name": "[net-next,03/10] net: hns3: Add support for PFC setting in TM module",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "5bffe1c3255b85de803f2a07d30fa513f4193bf0",
    "submitter": {
        "id": 71804,
        "url": "http://patchwork.ozlabs.org/api/people/71804/?format=api",
        "name": "Yunsheng Lin",
        "email": "linyunsheng@huawei.com"
    },
    "delegate": {
        "id": 34,
        "url": "http://patchwork.ozlabs.org/api/users/34/?format=api",
        "username": "davem",
        "first_name": "David",
        "last_name": "Miller",
        "email": "davem@davemloft.net"
    },
    "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/1505992913-107256-4-git-send-email-linyunsheng@huawei.com/mbox/",
    "series": [
        {
            "id": 4360,
            "url": "http://patchwork.ozlabs.org/api/series/4360/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=4360",
            "date": "2017-09-21T11:21:52",
            "name": "Add support for DCB feature in hns3 driver",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/4360/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/816822/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/816822/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<netdev-owner@vger.kernel.org>",
        "X-Original-To": "patchwork-incoming@ozlabs.org",
        "Delivered-To": "patchwork-incoming@ozlabs.org",
        "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyZBg01cjz9t42\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 21 Sep 2017 21:29:15 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751877AbdIUL15 (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tThu, 21 Sep 2017 07:27:57 -0400",
            "from szxga04-in.huawei.com ([45.249.212.190]:6950 \"EHLO\n\tszxga04-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751387AbdIULWQ (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Thu, 21 Sep 2017 07:22:16 -0400",
            "from 172.30.72.58 (EHLO DGGEMS408-HUB.china.huawei.com)\n\t([172.30.72.58])\n\tby dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHR44624; Thu, 21 Sep 2017 19:22:14 +0800 (CST)",
            "from localhost.localdomain (10.67.212.75) by\n\tDGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP\n\tServer id 14.3.301.0; Thu, 21 Sep 2017 19:22:08 +0800"
        ],
        "From": "Yunsheng Lin <linyunsheng@huawei.com>",
        "To": "<davem@davemloft.net>",
        "CC": "<huangdaode@hisilicon.com>, <xuwei5@hisilicon.com>,\n\t<liguozhu@hisilicon.com>, <Yisen.Zhuang@huawei.com>,\n\t<gabriele.paoloni@huawei.com>, <john.garry@huawei.com>,\n\t<linuxarm@huawei.com>, <yisen.zhuang@huawei.com>,\n\t<salil.mehta@huawei.com>, <lipeng321@huawei.com>,\n\t<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>",
        "Subject": "[PATCH net-next 03/10] net: hns3: Add support for PFC setting in TM\n\tmodule",
        "Date": "Thu, 21 Sep 2017 19:21:46 +0800",
        "Message-ID": "<1505992913-107256-4-git-send-email-linyunsheng@huawei.com>",
        "X-Mailer": "git-send-email 1.9.1",
        "In-Reply-To": "<1505992913-107256-1-git-send-email-linyunsheng@huawei.com>",
        "References": "<1505992913-107256-1-git-send-email-linyunsheng@huawei.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[10.67.212.75]",
        "X-CFilter-Loop": "Reflected",
        "X-Mirapoint-Virus-RAPID-Raw": "score=unknown(0),\n\trefid=str=0001.0A090203.59C3A0E6.0186, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32",
        "X-Mirapoint-Loop-Id": "bf6725c561dc520b392031058b90ab66",
        "Sender": "netdev-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<netdev.vger.kernel.org>",
        "X-Mailing-List": "netdev@vger.kernel.org"
    },
    "content": "This patch add a pfc_pause_en cmd, and use it to configure\nPFC option according to fc_mode in hdev->tm_info.\n\nSigned-off-by: Yunsheng Lin <linyunsheng@huawei.com>\n---\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c  | 68 ++++++++++++++++++++--\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h  |  5 ++\n 2 files changed, 68 insertions(+), 5 deletions(-)",
    "diff": "diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\nindex 73a75d7..0b4b5d9 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n@@ -124,6 +124,20 @@ static int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)\n \treturn hclge_cmd_send(&hdev->hw, &desc, 1);\n }\n \n+static int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap,\n+\t\t\t\t  u8 pfc_bitmap)\n+{\n+\tstruct hclge_desc desc;\n+\tstruct hclge_pfc_en_cmd *pfc = (struct hclge_pfc_en_cmd *)&desc.data;\n+\n+\thclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_PFC_PAUSE_EN, false);\n+\n+\tpfc->tx_rx_en_bitmap = tx_rx_bitmap;\n+\tpfc->pri_en_bitmap = pfc_bitmap;\n+\n+\treturn hclge_cmd_send(&hdev->hw, &desc, 1);\n+}\n+\n static int hclge_fill_pri_array(struct hclge_dev *hdev, u8 *pri, u8 pri_id)\n {\n \tu8 tc;\n@@ -969,20 +983,64 @@ static int hclge_tm_schd_setup_hw(struct hclge_dev *hdev)\n \treturn hclge_tm_schd_mode_hw(hdev);\n }\n \n+static int hclge_pfc_setup_hw(struct hclge_dev *hdev)\n+{\n+\tu8 enable_bitmap = 0;\n+\n+\tif (hdev->tm_info.fc_mode == HCLGE_FC_PFC)\n+\t\tenable_bitmap = HCLGE_TX_MAC_PAUSE_EN_MSK |\n+\t\t\t\tHCLGE_RX_MAC_PAUSE_EN_MSK;\n+\n+\treturn hclge_pfc_pause_en_cfg(hdev, enable_bitmap,\n+\t\t\t\t      hdev->tm_info.hw_pfc_map);\n+}\n+\n+static int hclge_mac_pause_setup_hw(struct hclge_dev *hdev)\n+{\n+\tbool tx_en, rx_en;\n+\n+\tswitch (hdev->tm_info.fc_mode) {\n+\tcase HCLGE_FC_NONE:\n+\t\ttx_en = false;\n+\t\trx_en = false;\n+\t\tbreak;\n+\tcase HCLGE_FC_RX_PAUSE:\n+\t\ttx_en = false;\n+\t\trx_en = true;\n+\t\tbreak;\n+\tcase HCLGE_FC_TX_PAUSE:\n+\t\ttx_en = true;\n+\t\trx_en = false;\n+\t\tbreak;\n+\tcase HCLGE_FC_FULL:\n+\t\ttx_en = true;\n+\t\trx_en = true;\n+\t\tbreak;\n+\tdefault:\n+\t\ttx_en = true;\n+\t\trx_en = true;\n+\t}\n+\n+\treturn hclge_mac_pause_en_cfg(hdev, tx_en, rx_en);\n+}\n+\n int hclge_pause_setup_hw(struct hclge_dev *hdev)\n {\n-\tbool en = hdev->tm_info.fc_mode != HCLGE_FC_PFC;\n \tint ret;\n \tu8 i;\n \n-\tret = hclge_mac_pause_en_cfg(hdev, en, en);\n-\tif (ret)\n-\t\treturn ret;\n+\tif (hdev->tm_info.fc_mode != HCLGE_FC_PFC)\n+\t\treturn hclge_mac_pause_setup_hw(hdev);\n \n-\t/* Only DCB-supported dev supports qset back pressure setting */\n+\t/* Only DCB-supported dev supports qset back pressure and pfc cmd */\n \tif (!hnae3_dev_dcb_supported(hdev))\n \t\treturn 0;\n \n+\t/* When MAC is GE Mode, hdev does not support pfc setting */\n+\tret = hclge_pfc_setup_hw(hdev);\n+\tif (ret)\n+\t\tdev_warn(&hdev->pdev->dev, \"set pfc pause failed:%d\\n\", ret);\n+\n \tfor (i = 0; i < hdev->tm_info.num_tc; i++) {\n \t\tret = hclge_tm_qs_bp_cfg(hdev, i);\n \t\tif (ret)\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h\nindex 85158b0..8ecd83c 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h\n@@ -94,6 +94,11 @@ struct hclge_bp_to_qs_map_cmd {\n \tu32 rsvd1;\n };\n \n+struct hclge_pfc_en_cmd {\n+\tu8 tx_rx_en_bitmap;\n+\tu8 pri_en_bitmap;\n+};\n+\n #define hclge_tm_set_field(dest, string, val) \\\n \t\t\thnae_set_field((dest), (HCLGE_TM_SHAP_##string##_MSK), \\\n \t\t\t\t       (HCLGE_TM_SHAP_##string##_LSH), val)\n",
    "prefixes": [
        "net-next",
        "03/10"
    ]
}