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GET /api/patches/816820/?format=api
{ "id": 816820, "url": "http://patchwork.ozlabs.org/api/patches/816820/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/1505992913-107256-3-git-send-email-linyunsheng@huawei.com/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505992913-107256-3-git-send-email-linyunsheng@huawei.com>", "list_archive_url": null, "date": "2017-09-21T11:21:45", "name": "[net-next,02/10] net: hns3: Add support for dynamically buffer reallocation", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "d0c3fad39de2e67fcd3cfa9f291ee59a4faf53cf", "submitter": { "id": 71804, "url": "http://patchwork.ozlabs.org/api/people/71804/?format=api", "name": "Yunsheng Lin", "email": "linyunsheng@huawei.com" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/1505992913-107256-3-git-send-email-linyunsheng@huawei.com/mbox/", "series": [ { "id": 4360, "url": "http://patchwork.ozlabs.org/api/series/4360/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=4360", "date": "2017-09-21T11:21:52", "name": "Add support for DCB feature in hns3 driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/4360/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/816820/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/816820/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyZ813zqmz9t42\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 21 Sep 2017 21:26:57 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751929AbdIUL0n (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tThu, 21 Sep 2017 07:26:43 -0400", "from szxga04-in.huawei.com ([45.249.212.190]:6952 \"EHLO\n\tszxga04-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751450AbdIULWR (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Thu, 21 Sep 2017 07:22:17 -0400", "from 172.30.72.58 (EHLO DGGEMS408-HUB.china.huawei.com)\n\t([172.30.72.58])\n\tby dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHR44626; Thu, 21 Sep 2017 19:22:14 +0800 (CST)", "from localhost.localdomain (10.67.212.75) by\n\tDGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP\n\tServer id 14.3.301.0; Thu, 21 Sep 2017 19:22:08 +0800" ], "From": "Yunsheng Lin <linyunsheng@huawei.com>", "To": "<davem@davemloft.net>", "CC": "<huangdaode@hisilicon.com>, <xuwei5@hisilicon.com>,\n\t<liguozhu@hisilicon.com>, <Yisen.Zhuang@huawei.com>,\n\t<gabriele.paoloni@huawei.com>, <john.garry@huawei.com>,\n\t<linuxarm@huawei.com>, <yisen.zhuang@huawei.com>,\n\t<salil.mehta@huawei.com>, <lipeng321@huawei.com>,\n\t<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>", "Subject": "[PATCH net-next 02/10] net: hns3: Add support for dynamically\n\tbuffer reallocation", "Date": "Thu, 21 Sep 2017 19:21:45 +0800", "Message-ID": "<1505992913-107256-3-git-send-email-linyunsheng@huawei.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1505992913-107256-1-git-send-email-linyunsheng@huawei.com>", "References": "<1505992913-107256-1-git-send-email-linyunsheng@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.67.212.75]", "X-CFilter-Loop": "Reflected", "X-Mirapoint-Virus-RAPID-Raw": "score=unknown(0),\n\trefid=str=0001.0A090202.59C3A0E7.0084, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32", "X-Mirapoint-Loop-Id": "1107636596b5c1e6040d159d14995439", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "Current buffer allocation can only happen at init, when\ndoing buffer reallocation after init, care must be taken\ncare of memory which priv_buf points to.\nThis patch fixes it by using a dynamic allocated temporary\nmemory. Because we only do buffer reallocation at init or\nwhen setting up the DCB parameter, and priv_buf is only\nused at buffer allocation process, so it is ok to use a\ndynamic allocated temporary memory.\n\nSigned-off-by: Yunsheng Lin <linyunsheng@huawei.com>\n---\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 5 +\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 150 +++++++++++----------\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 2 -\n 3 files changed, 87 insertions(+), 70 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\nindex a81c6cb..6b6d28e 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\n@@ -322,6 +322,11 @@ struct hclge_shared_buf {\n \tu32 buf_size;\n };\n \n+struct hclge_pkt_buf_alloc {\n+\tstruct hclge_priv_buf priv_buf[HCLGE_MAX_TC_NUM];\n+\tstruct hclge_shared_buf s_buf;\n+};\n+\n #define HCLGE_RX_COM_WL_EN_B\t15\n struct hclge_rx_com_wl_buf {\n \t__le16 high_wl;\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex dfe0fd2..c27b460 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -1324,7 +1324,8 @@ static int hclge_alloc_vport(struct hclge_dev *hdev)\n \treturn 0;\n }\n \n-static int hclge_cmd_alloc_tx_buff(struct hclge_dev *hdev)\n+static int hclge_cmd_alloc_tx_buff(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n /* TX buffer size is unit by 128 byte */\n #define HCLGE_BUF_SIZE_UNIT_SHIFT\t7\n@@ -1340,7 +1341,7 @@ static int hclge_cmd_alloc_tx_buff(struct hclge_dev *hdev)\n \n \thclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TX_BUFF_ALLOC, 0);\n \tfor (i = 0; i < HCLGE_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \t\tbuf_size = priv->tx_buf_size;\n \t\treq->tx_pkt_buff[i] =\n \t\t\tcpu_to_le16((buf_size >> HCLGE_BUF_SIZE_UNIT_SHIFT) |\n@@ -1357,9 +1358,10 @@ static int hclge_cmd_alloc_tx_buff(struct hclge_dev *hdev)\n \treturn 0;\n }\n \n-static int hclge_tx_buffer_alloc(struct hclge_dev *hdev)\n+static int hclge_tx_buffer_alloc(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n-\tint ret = hclge_cmd_alloc_tx_buff(hdev);\n+\tint ret = hclge_cmd_alloc_tx_buff(hdev, buf_alloc);\n \n \tif (ret) {\n \t\tdev_err(&hdev->pdev->dev,\n@@ -1392,13 +1394,14 @@ static int hclge_get_pfc_enalbe_num(struct hclge_dev *hdev)\n }\n \n /* Get the number of pfc enabled TCs, which have private buffer */\n-static int hclge_get_pfc_priv_num(struct hclge_dev *hdev)\n+static int hclge_get_pfc_priv_num(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tstruct hclge_priv_buf *priv;\n \tint i, cnt = 0;\n \n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \t\tif ((hdev->tm_info.hw_pfc_map & BIT(i)) &&\n \t\t priv->enable)\n \t\t\tcnt++;\n@@ -1408,13 +1411,14 @@ static int hclge_get_pfc_priv_num(struct hclge_dev *hdev)\n }\n \n /* Get the number of pfc disabled TCs, which have private buffer */\n-static int hclge_get_no_pfc_priv_num(struct hclge_dev *hdev)\n+static int hclge_get_no_pfc_priv_num(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tstruct hclge_priv_buf *priv;\n \tint i, cnt = 0;\n \n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \t\tif (hdev->hw_tc_map & BIT(i) &&\n \t\t !(hdev->tm_info.hw_pfc_map & BIT(i)) &&\n \t\t priv->enable)\n@@ -1424,33 +1428,35 @@ static int hclge_get_no_pfc_priv_num(struct hclge_dev *hdev)\n \treturn cnt;\n }\n \n-static u32 hclge_get_rx_priv_buff_alloced(struct hclge_dev *hdev)\n+static u32 hclge_get_rx_priv_buff_alloced(struct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tstruct hclge_priv_buf *priv;\n \tu32 rx_priv = 0;\n \tint i;\n \n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \t\tif (priv->enable)\n \t\t\trx_priv += priv->buf_size;\n \t}\n \treturn rx_priv;\n }\n \n-static u32 hclge_get_tx_buff_alloced(struct hclge_dev *hdev)\n+static u32 hclge_get_tx_buff_alloced(struct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tstruct hclge_priv_buf *priv;\n \tu32 tx_buf = 0, i;\n \n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \t\ttx_buf += priv->tx_buf_size;\n \t}\n \treturn tx_buf;\n }\n \n-static bool hclge_is_rx_buf_ok(struct hclge_dev *hdev, u32 rx_all)\n+static bool hclge_is_rx_buf_ok(struct hclge_dev *hdev,\n+\t\t\t\tstruct hclge_pkt_buf_alloc *buf_alloc,\n+\t\t\t\tu32 rx_all)\n {\n \tu32 shared_buf_min, shared_buf_tc, shared_std;\n \tint tc_num, pfc_enable_num;\n@@ -1471,30 +1477,31 @@ static bool hclge_is_rx_buf_ok(struct hclge_dev *hdev, u32 rx_all)\n \t\t\thdev->mps;\n \tshared_std = max_t(u32, shared_buf_min, shared_buf_tc);\n \n-\trx_priv = hclge_get_rx_priv_buff_alloced(hdev);\n+\trx_priv = hclge_get_rx_priv_buff_alloced(buf_alloc);\n \tif (rx_all <= rx_priv + shared_std)\n \t\treturn false;\n \n \tshared_buf = rx_all - rx_priv;\n-\thdev->s_buf.buf_size = shared_buf;\n-\thdev->s_buf.self.high = shared_buf;\n-\thdev->s_buf.self.low = 2 * hdev->mps;\n+\tbuf_alloc->s_buf.buf_size = shared_buf;\n+\tbuf_alloc->s_buf.self.high = shared_buf;\n+\tbuf_alloc->s_buf.self.low = 2 * hdev->mps;\n \n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n \t\tif ((hdev->hw_tc_map & BIT(i)) &&\n \t\t (hdev->tm_info.hw_pfc_map & BIT(i))) {\n-\t\t\thdev->s_buf.tc_thrd[i].low = hdev->mps;\n-\t\t\thdev->s_buf.tc_thrd[i].high = 2 * hdev->mps;\n+\t\t\tbuf_alloc->s_buf.tc_thrd[i].low = hdev->mps;\n+\t\t\tbuf_alloc->s_buf.tc_thrd[i].high = 2 * hdev->mps;\n \t\t} else {\n-\t\t\thdev->s_buf.tc_thrd[i].low = 0;\n-\t\t\thdev->s_buf.tc_thrd[i].high = hdev->mps;\n+\t\t\tbuf_alloc->s_buf.tc_thrd[i].low = 0;\n+\t\t\tbuf_alloc->s_buf.tc_thrd[i].high = hdev->mps;\n \t\t}\n \t}\n \n \treturn true;\n }\n \n-static int hclge_tx_buffer_calc(struct hclge_dev *hdev)\n+static int hclge_tx_buffer_calc(struct hclge_dev *hdev,\n+\t\t\t\tstruct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tstruct hclge_priv_buf *priv;\n \tu32 i, total_size;\n@@ -1503,7 +1510,7 @@ static int hclge_tx_buffer_calc(struct hclge_dev *hdev)\n \n \t/* alloc tx buffer for all enabled tc */\n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \n \t\tif (total_size < HCLGE_DEFAULT_TX_BUF)\n \t\t\treturn -ENOMEM;\n@@ -1521,22 +1528,24 @@ static int hclge_tx_buffer_calc(struct hclge_dev *hdev)\n \n /* hclge_rx_buffer_calc: calculate the rx private buffer size for all TCs\n * @hdev: pointer to struct hclge_dev\n+ * @buf_alloc: pointer to buffer calculation data\n * @return: 0: calculate sucessful, negative: fail\n */\n-int hclge_rx_buffer_calc(struct hclge_dev *hdev)\n+int hclge_rx_buffer_calc(struct hclge_dev *hdev,\n+\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tu32 rx_all = hdev->pkt_buf_size;\n \tint no_pfc_priv_num, pfc_priv_num;\n \tstruct hclge_priv_buf *priv;\n \tint i;\n \n-\trx_all -= hclge_get_tx_buff_alloced(hdev);\n+\trx_all -= hclge_get_tx_buff_alloced(buf_alloc);\n \n \t/* When DCB is not supported, rx private\n \t * buffer is not allocated.\n \t */\n \tif (!hnae3_dev_dcb_supported(hdev)) {\n-\t\tif (!hclge_is_rx_buf_ok(hdev, rx_all))\n+\t\tif (!hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all))\n \t\t\treturn -ENOMEM;\n \n \t\treturn 0;\n@@ -1544,7 +1553,7 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev)\n \n \t/* step 1, try to alloc private buffer for all enabled tc */\n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \t\tif (hdev->hw_tc_map & BIT(i)) {\n \t\t\tpriv->enable = 1;\n \t\t\tif (hdev->tm_info.hw_pfc_map & BIT(i)) {\n@@ -1565,14 +1574,14 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev)\n \t\t}\n \t}\n \n-\tif (hclge_is_rx_buf_ok(hdev, rx_all))\n+\tif (hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all))\n \t\treturn 0;\n \n \t/* step 2, try to decrease the buffer size of\n \t * no pfc TC's private buffer\n \t */\n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \n \t\tpriv->enable = 0;\n \t\tpriv->wl.low = 0;\n@@ -1595,18 +1604,18 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev)\n \t\t}\n \t}\n \n-\tif (hclge_is_rx_buf_ok(hdev, rx_all))\n+\tif (hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all))\n \t\treturn 0;\n \n \t/* step 3, try to reduce the number of pfc disabled TCs,\n \t * which have private buffer\n \t */\n \t/* get the total no pfc enable TC number, which have private buffer */\n-\tno_pfc_priv_num = hclge_get_no_pfc_priv_num(hdev);\n+\tno_pfc_priv_num = hclge_get_no_pfc_priv_num(hdev, buf_alloc);\n \n \t/* let the last to be cleared first */\n \tfor (i = HCLGE_MAX_TC_NUM - 1; i >= 0; i--) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \n \t\tif (hdev->hw_tc_map & BIT(i) &&\n \t\t !(hdev->tm_info.hw_pfc_map & BIT(i))) {\n@@ -1618,22 +1627,22 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev)\n \t\t\tno_pfc_priv_num--;\n \t\t}\n \n-\t\tif (hclge_is_rx_buf_ok(hdev, rx_all) ||\n+\t\tif (hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all) ||\n \t\t no_pfc_priv_num == 0)\n \t\t\tbreak;\n \t}\n \n-\tif (hclge_is_rx_buf_ok(hdev, rx_all))\n+\tif (hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all))\n \t\treturn 0;\n \n \t/* step 4, try to reduce the number of pfc enabled TCs\n \t * which have private buffer.\n \t */\n-\tpfc_priv_num = hclge_get_pfc_priv_num(hdev);\n+\tpfc_priv_num = hclge_get_pfc_priv_num(hdev, buf_alloc);\n \n \t/* let the last to be cleared first */\n \tfor (i = HCLGE_MAX_TC_NUM - 1; i >= 0; i--) {\n-\t\tpriv = &hdev->priv_buf[i];\n+\t\tpriv = &buf_alloc->priv_buf[i];\n \n \t\tif (hdev->hw_tc_map & BIT(i) &&\n \t\t hdev->tm_info.hw_pfc_map & BIT(i)) {\n@@ -1645,17 +1654,18 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev)\n \t\t\tpfc_priv_num--;\n \t\t}\n \n-\t\tif (hclge_is_rx_buf_ok(hdev, rx_all) ||\n+\t\tif (hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all) ||\n \t\t pfc_priv_num == 0)\n \t\t\tbreak;\n \t}\n-\tif (hclge_is_rx_buf_ok(hdev, rx_all))\n+\tif (hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all))\n \t\treturn 0;\n \n \treturn -ENOMEM;\n }\n \n-static int hclge_rx_priv_buf_alloc(struct hclge_dev *hdev)\n+static int hclge_rx_priv_buf_alloc(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tstruct hclge_rx_priv_buff *req;\n \tstruct hclge_desc desc;\n@@ -1667,7 +1677,7 @@ static int hclge_rx_priv_buf_alloc(struct hclge_dev *hdev)\n \n \t/* Alloc private buffer TCs */\n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tstruct hclge_priv_buf *priv = &hdev->priv_buf[i];\n+\t\tstruct hclge_priv_buf *priv = &buf_alloc->priv_buf[i];\n \n \t\treq->buf_num[i] =\n \t\t\tcpu_to_le16(priv->buf_size >> HCLGE_BUF_UNIT_S);\n@@ -1676,7 +1686,7 @@ static int hclge_rx_priv_buf_alloc(struct hclge_dev *hdev)\n \t}\n \n \treq->shared_buf =\n-\t\tcpu_to_le16((hdev->s_buf.buf_size >> HCLGE_BUF_UNIT_S) |\n+\t\tcpu_to_le16((buf_alloc->s_buf.buf_size >> HCLGE_BUF_UNIT_S) |\n \t\t\t (1 << HCLGE_TC0_PRI_BUF_EN_B));\n \n \tret = hclge_cmd_send(&hdev->hw, &desc, 1);\n@@ -1691,7 +1701,8 @@ static int hclge_rx_priv_buf_alloc(struct hclge_dev *hdev)\n \n #define HCLGE_PRIV_ENABLE(a) ((a) > 0 ? 1 : 0)\n \n-static int hclge_rx_priv_wl_config(struct hclge_dev *hdev)\n+static int hclge_rx_priv_wl_config(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n \tstruct hclge_rx_priv_wl_buf *req;\n \tstruct hclge_priv_buf *priv;\n@@ -1711,7 +1722,9 @@ static int hclge_rx_priv_wl_config(struct hclge_dev *hdev)\n \t\t\tdesc[i].flag &= ~cpu_to_le16(HCLGE_CMD_FLAG_NEXT);\n \n \t\tfor (j = 0; j < HCLGE_TC_NUM_ONE_DESC; j++) {\n-\t\t\tpriv = &hdev->priv_buf[i * HCLGE_TC_NUM_ONE_DESC + j];\n+\t\t\tu32 idx = i * HCLGE_TC_NUM_ONE_DESC + j;\n+\n+\t\t\tpriv = &buf_alloc->priv_buf[idx];\n \t\t\treq->tc_wl[j].high =\n \t\t\t\tcpu_to_le16(priv->wl.high >> HCLGE_BUF_UNIT_S);\n \t\t\treq->tc_wl[j].high |=\n@@ -1736,9 +1749,10 @@ static int hclge_rx_priv_wl_config(struct hclge_dev *hdev)\n \treturn 0;\n }\n \n-static int hclge_common_thrd_config(struct hclge_dev *hdev)\n+static int hclge_common_thrd_config(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n-\tstruct hclge_shared_buf *s_buf = &hdev->s_buf;\n+\tstruct hclge_shared_buf *s_buf = &buf_alloc->s_buf;\n \tstruct hclge_rx_com_thrd *req;\n \tstruct hclge_desc desc[2];\n \tstruct hclge_tc_thrd *tc;\n@@ -1782,9 +1796,10 @@ static int hclge_common_thrd_config(struct hclge_dev *hdev)\n \treturn 0;\n }\n \n-static int hclge_common_wl_config(struct hclge_dev *hdev)\n+static int hclge_common_wl_config(struct hclge_dev *hdev,\n+\t\t\t\t struct hclge_pkt_buf_alloc *buf_alloc)\n {\n-\tstruct hclge_shared_buf *buf = &hdev->s_buf;\n+\tstruct hclge_shared_buf *buf = &buf_alloc->s_buf;\n \tstruct hclge_rx_com_wl *req;\n \tstruct hclge_desc desc;\n \tint ret;\n@@ -1814,69 +1829,68 @@ static int hclge_common_wl_config(struct hclge_dev *hdev)\n \n int hclge_buffer_alloc(struct hclge_dev *hdev)\n {\n+\tstruct hclge_pkt_buf_alloc *pkt_buf;\n \tint ret;\n \n-\thdev->priv_buf = devm_kmalloc_array(&hdev->pdev->dev, HCLGE_MAX_TC_NUM,\n-\t\t\t\t\t sizeof(struct hclge_priv_buf),\n-\t\t\t\t\t GFP_KERNEL | __GFP_ZERO);\n-\tif (!hdev->priv_buf)\n+\tpkt_buf = kzalloc(sizeof(*pkt_buf), GFP_KERNEL);\n+\tif (!pkt_buf)\n \t\treturn -ENOMEM;\n \n-\tret = hclge_tx_buffer_calc(hdev);\n+\tret = hclge_tx_buffer_calc(hdev, pkt_buf);\n \tif (ret) {\n \t\tdev_err(&hdev->pdev->dev,\n \t\t\t\"could not calc tx buffer size for all TCs %d\\n\", ret);\n-\t\treturn ret;\n+\t\tgoto out;\n \t}\n \n-\tret = hclge_tx_buffer_alloc(hdev);\n+\tret = hclge_tx_buffer_alloc(hdev, pkt_buf);\n \tif (ret) {\n \t\tdev_err(&hdev->pdev->dev,\n \t\t\t\"could not alloc tx buffers %d\\n\", ret);\n-\t\treturn ret;\n+\t\tgoto out;\n \t}\n \n-\tret = hclge_rx_buffer_calc(hdev);\n+\tret = hclge_rx_buffer_calc(hdev, pkt_buf);\n \tif (ret) {\n \t\tdev_err(&hdev->pdev->dev,\n \t\t\t\"could not calc rx priv buffer size for all TCs %d\\n\",\n \t\t\tret);\n-\t\treturn ret;\n+\t\tgoto out;\n \t}\n \n-\tret = hclge_rx_priv_buf_alloc(hdev);\n+\tret = hclge_rx_priv_buf_alloc(hdev, pkt_buf);\n \tif (ret) {\n \t\tdev_err(&hdev->pdev->dev, \"could not alloc rx priv buffer %d\\n\",\n \t\t\tret);\n-\t\treturn ret;\n+\t\tgoto out;\n \t}\n \n \tif (hnae3_dev_dcb_supported(hdev)) {\n-\t\tret = hclge_rx_priv_wl_config(hdev);\n+\t\tret = hclge_rx_priv_wl_config(hdev, pkt_buf);\n \t\tif (ret) {\n \t\t\tdev_err(&hdev->pdev->dev,\n \t\t\t\t\"could not configure rx private waterline %d\\n\",\n \t\t\t\tret);\n-\t\t\treturn ret;\n+\t\t\tgoto out;\n \t\t}\n \n-\t\tret = hclge_common_thrd_config(hdev);\n+\t\tret = hclge_common_thrd_config(hdev, pkt_buf);\n \t\tif (ret) {\n \t\t\tdev_err(&hdev->pdev->dev,\n \t\t\t\t\"could not configure common threshold %d\\n\",\n \t\t\t\tret);\n-\t\t\treturn ret;\n+\t\t\tgoto out;\n \t\t}\n \t}\n \n-\tret = hclge_common_wl_config(hdev);\n-\tif (ret) {\n+\tret = hclge_common_wl_config(hdev, pkt_buf);\n+\tif (ret)\n \t\tdev_err(&hdev->pdev->dev,\n \t\t\t\"could not configure common waterline %d\\n\", ret);\n-\t\treturn ret;\n-\t}\n \n-\treturn 0;\n+out:\n+\tkfree(pkt_buf);\n+\treturn ret;\n }\n \n static int hclge_init_roce_base_info(struct hclge_vport *vport)\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\nindex 9fcfd93..4fc36f0 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n@@ -463,8 +463,6 @@ struct hclge_dev {\n \n \tu32 pkt_buf_size; /* Total pf buf size for tx/rx */\n \tu32 mps; /* Max packet size */\n-\tstruct hclge_priv_buf *priv_buf;\n-\tstruct hclge_shared_buf s_buf;\n \n \tenum hclge_mta_dmac_sel_type mta_mac_sel_type;\n \tbool enable_mta; /* Mutilcast filter enable */\n", "prefixes": [ "net-next", "02/10" ] }