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{
    "id": 816226,
    "url": "http://patchwork.ozlabs.org/api/patches/816226/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-5-jbrunet@baylibre.com/",
    "project": {
        "id": 42,
        "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api",
        "name": "Linux GPIO development",
        "link_name": "linux-gpio",
        "list_id": "linux-gpio.vger.kernel.org",
        "list_email": "linux-gpio@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170920133927.17390-5-jbrunet@baylibre.com>",
    "list_archive_url": null,
    "date": "2017-09-20T13:39:23",
    "name": "[4/8] pinctrl: meson: remove offset continued - meson8",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "038cc36e3bb39cdd81b8405cf25c660d2590d78e",
    "submitter": {
        "id": 69839,
        "url": "http://patchwork.ozlabs.org/api/people/69839/?format=api",
        "name": "Jerome Brunet",
        "email": "jbrunet@baylibre.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-5-jbrunet@baylibre.com/mbox/",
    "series": [
        {
            "id": 4115,
            "url": "http://patchwork.ozlabs.org/api/series/4115/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=4115",
            "date": "2017-09-20T13:39:19",
            "name": "pinctrl: meson: clean pin offsets",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/4115/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/816226/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/816226/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-gpio-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": [
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        ],
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        "X-Google-Smtp-Source": "AOwi7QCuBBPM06al7l/ro5BCYqEsSNZvfx16BH3ATBf50NN5ZcO0A4FSNwEvrr+hguu8D9IFSGdQqg==",
        "X-Received": "by 10.28.9.130 with SMTP id 124mr3604957wmj.65.1505914780731;\n\tWed, 20 Sep 2017 06:39:40 -0700 (PDT)",
        "From": "Jerome Brunet <jbrunet@baylibre.com>",
        "To": "Linus Walleij <linus.walleij@linaro.org>,\n\tKevin Hilman <khilman@baylibre.com>, Carlo Caione <carlo@caione.org>",
        "Cc": "Jerome Brunet <jbrunet@baylibre.com>, linux-gpio@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tMartin Blumenstingl <martin.blumenstingl@googlemail.com>",
        "Subject": "[PATCH 4/8] pinctrl: meson: remove offset continued - meson8",
        "Date": "Wed, 20 Sep 2017 15:39:23 +0200",
        "Message-Id": "<20170920133927.17390-5-jbrunet@baylibre.com>",
        "X-Mailer": "git-send-email 2.13.5",
        "In-Reply-To": "<20170920133927.17390-1-jbrunet@baylibre.com>",
        "References": "<20170920133927.17390-1-jbrunet@baylibre.com>",
        "Sender": "linux-gpio-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-gpio.vger.kernel.org>",
        "X-Mailing-List": "linux-gpio@vger.kernel.org"
    },
    "content": "Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>\nSigned-off-by: Jerome Brunet <jbrunet@baylibre.com>\n---\n drivers/pinctrl/meson/pinctrl-meson8.c | 964 ++++++++++++++++-----------------\n 1 file changed, 476 insertions(+), 488 deletions(-)",
    "diff": "diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c\nindex 970f6f14502c..7344f8577467 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson8.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson8.c\n@@ -14,505 +14,493 @@\n #include <dt-bindings/gpio/meson8-gpio.h>\n #include \"pinctrl-meson.h\"\n \n-#define AO_OFF\t120\n-\n static const struct pinctrl_pin_desc meson8_cbus_pins[] = {\n-\tMESON_PIN(GPIOX_0, 0),\n-\tMESON_PIN(GPIOX_1, 0),\n-\tMESON_PIN(GPIOX_2, 0),\n-\tMESON_PIN(GPIOX_3, 0),\n-\tMESON_PIN(GPIOX_4, 0),\n-\tMESON_PIN(GPIOX_5, 0),\n-\tMESON_PIN(GPIOX_6, 0),\n-\tMESON_PIN(GPIOX_7, 0),\n-\tMESON_PIN(GPIOX_8, 0),\n-\tMESON_PIN(GPIOX_9, 0),\n-\tMESON_PIN(GPIOX_10, 0),\n-\tMESON_PIN(GPIOX_11, 0),\n-\tMESON_PIN(GPIOX_12, 0),\n-\tMESON_PIN(GPIOX_13, 0),\n-\tMESON_PIN(GPIOX_14, 0),\n-\tMESON_PIN(GPIOX_15, 0),\n-\tMESON_PIN(GPIOX_16, 0),\n-\tMESON_PIN(GPIOX_17, 0),\n-\tMESON_PIN(GPIOX_18, 0),\n-\tMESON_PIN(GPIOX_19, 0),\n-\tMESON_PIN(GPIOX_20, 0),\n-\tMESON_PIN(GPIOX_21, 0),\n-\tMESON_PIN(GPIOY_0, 0),\n-\tMESON_PIN(GPIOY_1, 0),\n-\tMESON_PIN(GPIOY_2, 0),\n-\tMESON_PIN(GPIOY_3, 0),\n-\tMESON_PIN(GPIOY_4, 0),\n-\tMESON_PIN(GPIOY_5, 0),\n-\tMESON_PIN(GPIOY_6, 0),\n-\tMESON_PIN(GPIOY_7, 0),\n-\tMESON_PIN(GPIOY_8, 0),\n-\tMESON_PIN(GPIOY_9, 0),\n-\tMESON_PIN(GPIOY_10, 0),\n-\tMESON_PIN(GPIOY_11, 0),\n-\tMESON_PIN(GPIOY_12, 0),\n-\tMESON_PIN(GPIOY_13, 0),\n-\tMESON_PIN(GPIOY_14, 0),\n-\tMESON_PIN(GPIOY_15, 0),\n-\tMESON_PIN(GPIOY_16, 0),\n-\tMESON_PIN(GPIODV_0, 0),\n-\tMESON_PIN(GPIODV_1, 0),\n-\tMESON_PIN(GPIODV_2, 0),\n-\tMESON_PIN(GPIODV_3, 0),\n-\tMESON_PIN(GPIODV_4, 0),\n-\tMESON_PIN(GPIODV_5, 0),\n-\tMESON_PIN(GPIODV_6, 0),\n-\tMESON_PIN(GPIODV_7, 0),\n-\tMESON_PIN(GPIODV_8, 0),\n-\tMESON_PIN(GPIODV_9, 0),\n-\tMESON_PIN(GPIODV_10, 0),\n-\tMESON_PIN(GPIODV_11, 0),\n-\tMESON_PIN(GPIODV_12, 0),\n-\tMESON_PIN(GPIODV_13, 0),\n-\tMESON_PIN(GPIODV_14, 0),\n-\tMESON_PIN(GPIODV_15, 0),\n-\tMESON_PIN(GPIODV_16, 0),\n-\tMESON_PIN(GPIODV_17, 0),\n-\tMESON_PIN(GPIODV_18, 0),\n-\tMESON_PIN(GPIODV_19, 0),\n-\tMESON_PIN(GPIODV_20, 0),\n-\tMESON_PIN(GPIODV_21, 0),\n-\tMESON_PIN(GPIODV_22, 0),\n-\tMESON_PIN(GPIODV_23, 0),\n-\tMESON_PIN(GPIODV_24, 0),\n-\tMESON_PIN(GPIODV_25, 0),\n-\tMESON_PIN(GPIODV_26, 0),\n-\tMESON_PIN(GPIODV_27, 0),\n-\tMESON_PIN(GPIODV_28, 0),\n-\tMESON_PIN(GPIODV_29, 0),\n-\tMESON_PIN(GPIOH_0, 0),\n-\tMESON_PIN(GPIOH_1, 0),\n-\tMESON_PIN(GPIOH_2, 0),\n-\tMESON_PIN(GPIOH_3, 0),\n-\tMESON_PIN(GPIOH_4, 0),\n-\tMESON_PIN(GPIOH_5, 0),\n-\tMESON_PIN(GPIOH_6, 0),\n-\tMESON_PIN(GPIOH_7, 0),\n-\tMESON_PIN(GPIOH_8, 0),\n-\tMESON_PIN(GPIOH_9, 0),\n-\tMESON_PIN(GPIOZ_0, 0),\n-\tMESON_PIN(GPIOZ_1, 0),\n-\tMESON_PIN(GPIOZ_2, 0),\n-\tMESON_PIN(GPIOZ_3, 0),\n-\tMESON_PIN(GPIOZ_4, 0),\n-\tMESON_PIN(GPIOZ_5, 0),\n-\tMESON_PIN(GPIOZ_6, 0),\n-\tMESON_PIN(GPIOZ_7, 0),\n-\tMESON_PIN(GPIOZ_8, 0),\n-\tMESON_PIN(GPIOZ_9, 0),\n-\tMESON_PIN(GPIOZ_10, 0),\n-\tMESON_PIN(GPIOZ_11, 0),\n-\tMESON_PIN(GPIOZ_12, 0),\n-\tMESON_PIN(GPIOZ_13, 0),\n-\tMESON_PIN(GPIOZ_14, 0),\n-\tMESON_PIN(CARD_0, 0),\n-\tMESON_PIN(CARD_1, 0),\n-\tMESON_PIN(CARD_2, 0),\n-\tMESON_PIN(CARD_3, 0),\n-\tMESON_PIN(CARD_4, 0),\n-\tMESON_PIN(CARD_5, 0),\n-\tMESON_PIN(CARD_6, 0),\n-\tMESON_PIN(BOOT_0, 0),\n-\tMESON_PIN(BOOT_1, 0),\n-\tMESON_PIN(BOOT_2, 0),\n-\tMESON_PIN(BOOT_3, 0),\n-\tMESON_PIN(BOOT_4, 0),\n-\tMESON_PIN(BOOT_5, 0),\n-\tMESON_PIN(BOOT_6, 0),\n-\tMESON_PIN(BOOT_7, 0),\n-\tMESON_PIN(BOOT_8, 0),\n-\tMESON_PIN(BOOT_9, 0),\n-\tMESON_PIN(BOOT_10, 0),\n-\tMESON_PIN(BOOT_11, 0),\n-\tMESON_PIN(BOOT_12, 0),\n-\tMESON_PIN(BOOT_13, 0),\n-\tMESON_PIN(BOOT_14, 0),\n-\tMESON_PIN(BOOT_15, 0),\n-\tMESON_PIN(BOOT_16, 0),\n-\tMESON_PIN(BOOT_17, 0),\n-\tMESON_PIN(BOOT_18, 0),\n+\tMESON_PIN(GPIOX_0),\n+\tMESON_PIN(GPIOX_1),\n+\tMESON_PIN(GPIOX_2),\n+\tMESON_PIN(GPIOX_3),\n+\tMESON_PIN(GPIOX_4),\n+\tMESON_PIN(GPIOX_5),\n+\tMESON_PIN(GPIOX_6),\n+\tMESON_PIN(GPIOX_7),\n+\tMESON_PIN(GPIOX_8),\n+\tMESON_PIN(GPIOX_9),\n+\tMESON_PIN(GPIOX_10),\n+\tMESON_PIN(GPIOX_11),\n+\tMESON_PIN(GPIOX_12),\n+\tMESON_PIN(GPIOX_13),\n+\tMESON_PIN(GPIOX_14),\n+\tMESON_PIN(GPIOX_15),\n+\tMESON_PIN(GPIOX_16),\n+\tMESON_PIN(GPIOX_17),\n+\tMESON_PIN(GPIOX_18),\n+\tMESON_PIN(GPIOX_19),\n+\tMESON_PIN(GPIOX_20),\n+\tMESON_PIN(GPIOX_21),\n+\tMESON_PIN(GPIOY_0),\n+\tMESON_PIN(GPIOY_1),\n+\tMESON_PIN(GPIOY_2),\n+\tMESON_PIN(GPIOY_3),\n+\tMESON_PIN(GPIOY_4),\n+\tMESON_PIN(GPIOY_5),\n+\tMESON_PIN(GPIOY_6),\n+\tMESON_PIN(GPIOY_7),\n+\tMESON_PIN(GPIOY_8),\n+\tMESON_PIN(GPIOY_9),\n+\tMESON_PIN(GPIOY_10),\n+\tMESON_PIN(GPIOY_11),\n+\tMESON_PIN(GPIOY_12),\n+\tMESON_PIN(GPIOY_13),\n+\tMESON_PIN(GPIOY_14),\n+\tMESON_PIN(GPIOY_15),\n+\tMESON_PIN(GPIOY_16),\n+\tMESON_PIN(GPIODV_0),\n+\tMESON_PIN(GPIODV_1),\n+\tMESON_PIN(GPIODV_2),\n+\tMESON_PIN(GPIODV_3),\n+\tMESON_PIN(GPIODV_4),\n+\tMESON_PIN(GPIODV_5),\n+\tMESON_PIN(GPIODV_6),\n+\tMESON_PIN(GPIODV_7),\n+\tMESON_PIN(GPIODV_8),\n+\tMESON_PIN(GPIODV_9),\n+\tMESON_PIN(GPIODV_10),\n+\tMESON_PIN(GPIODV_11),\n+\tMESON_PIN(GPIODV_12),\n+\tMESON_PIN(GPIODV_13),\n+\tMESON_PIN(GPIODV_14),\n+\tMESON_PIN(GPIODV_15),\n+\tMESON_PIN(GPIODV_16),\n+\tMESON_PIN(GPIODV_17),\n+\tMESON_PIN(GPIODV_18),\n+\tMESON_PIN(GPIODV_19),\n+\tMESON_PIN(GPIODV_20),\n+\tMESON_PIN(GPIODV_21),\n+\tMESON_PIN(GPIODV_22),\n+\tMESON_PIN(GPIODV_23),\n+\tMESON_PIN(GPIODV_24),\n+\tMESON_PIN(GPIODV_25),\n+\tMESON_PIN(GPIODV_26),\n+\tMESON_PIN(GPIODV_27),\n+\tMESON_PIN(GPIODV_28),\n+\tMESON_PIN(GPIODV_29),\n+\tMESON_PIN(GPIOH_0),\n+\tMESON_PIN(GPIOH_1),\n+\tMESON_PIN(GPIOH_2),\n+\tMESON_PIN(GPIOH_3),\n+\tMESON_PIN(GPIOH_4),\n+\tMESON_PIN(GPIOH_5),\n+\tMESON_PIN(GPIOH_6),\n+\tMESON_PIN(GPIOH_7),\n+\tMESON_PIN(GPIOH_8),\n+\tMESON_PIN(GPIOH_9),\n+\tMESON_PIN(GPIOZ_0),\n+\tMESON_PIN(GPIOZ_1),\n+\tMESON_PIN(GPIOZ_2),\n+\tMESON_PIN(GPIOZ_3),\n+\tMESON_PIN(GPIOZ_4),\n+\tMESON_PIN(GPIOZ_5),\n+\tMESON_PIN(GPIOZ_6),\n+\tMESON_PIN(GPIOZ_7),\n+\tMESON_PIN(GPIOZ_8),\n+\tMESON_PIN(GPIOZ_9),\n+\tMESON_PIN(GPIOZ_10),\n+\tMESON_PIN(GPIOZ_11),\n+\tMESON_PIN(GPIOZ_12),\n+\tMESON_PIN(GPIOZ_13),\n+\tMESON_PIN(GPIOZ_14),\n+\tMESON_PIN(CARD_0),\n+\tMESON_PIN(CARD_1),\n+\tMESON_PIN(CARD_2),\n+\tMESON_PIN(CARD_3),\n+\tMESON_PIN(CARD_4),\n+\tMESON_PIN(CARD_5),\n+\tMESON_PIN(CARD_6),\n+\tMESON_PIN(BOOT_0),\n+\tMESON_PIN(BOOT_1),\n+\tMESON_PIN(BOOT_2),\n+\tMESON_PIN(BOOT_3),\n+\tMESON_PIN(BOOT_4),\n+\tMESON_PIN(BOOT_5),\n+\tMESON_PIN(BOOT_6),\n+\tMESON_PIN(BOOT_7),\n+\tMESON_PIN(BOOT_8),\n+\tMESON_PIN(BOOT_9),\n+\tMESON_PIN(BOOT_10),\n+\tMESON_PIN(BOOT_11),\n+\tMESON_PIN(BOOT_12),\n+\tMESON_PIN(BOOT_13),\n+\tMESON_PIN(BOOT_14),\n+\tMESON_PIN(BOOT_15),\n+\tMESON_PIN(BOOT_16),\n+\tMESON_PIN(BOOT_17),\n+\tMESON_PIN(BOOT_18),\n };\n \n static const struct pinctrl_pin_desc meson8_aobus_pins[] = {\n-\tMESON_PIN(GPIOAO_0, AO_OFF),\n-\tMESON_PIN(GPIOAO_1, AO_OFF),\n-\tMESON_PIN(GPIOAO_2, AO_OFF),\n-\tMESON_PIN(GPIOAO_3, AO_OFF),\n-\tMESON_PIN(GPIOAO_4, AO_OFF),\n-\tMESON_PIN(GPIOAO_5, AO_OFF),\n-\tMESON_PIN(GPIOAO_6, AO_OFF),\n-\tMESON_PIN(GPIOAO_7, AO_OFF),\n-\tMESON_PIN(GPIOAO_8, AO_OFF),\n-\tMESON_PIN(GPIOAO_9, AO_OFF),\n-\tMESON_PIN(GPIOAO_10, AO_OFF),\n-\tMESON_PIN(GPIOAO_11, AO_OFF),\n-\tMESON_PIN(GPIOAO_12, AO_OFF),\n-\tMESON_PIN(GPIOAO_13, AO_OFF),\n-\tMESON_PIN(GPIO_BSD_EN, AO_OFF),\n-\tMESON_PIN(GPIO_TEST_N, AO_OFF),\n+\tMESON_PIN(GPIOAO_0),\n+\tMESON_PIN(GPIOAO_1),\n+\tMESON_PIN(GPIOAO_2),\n+\tMESON_PIN(GPIOAO_3),\n+\tMESON_PIN(GPIOAO_4),\n+\tMESON_PIN(GPIOAO_5),\n+\tMESON_PIN(GPIOAO_6),\n+\tMESON_PIN(GPIOAO_7),\n+\tMESON_PIN(GPIOAO_8),\n+\tMESON_PIN(GPIOAO_9),\n+\tMESON_PIN(GPIOAO_10),\n+\tMESON_PIN(GPIOAO_11),\n+\tMESON_PIN(GPIOAO_12),\n+\tMESON_PIN(GPIOAO_13),\n+\tMESON_PIN(GPIO_BSD_EN),\n+\tMESON_PIN(GPIO_TEST_N),\n };\n \n /* bank X */\n-static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) };\n-static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) };\n-static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) };\n-static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) };\n-static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) };\n-static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) };\n-\n-static const unsigned int sdxc_d0_a_pins[] = { PIN(GPIOX_0, 0) };\n-static const unsigned int sdxc_d13_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0),\n-\t\t\t\t\t\tPIN(GPIOX_3, 0) };\n-static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0),\n-\t\t\t\t\t\tPIN(GPIOX_6, 0), PIN(GPIOX_7, 0) };\n-static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) };\n-static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) };\n-\n-static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) };\n-static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) };\n-static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) };\n-static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) };\n-\n-static const unsigned int uart_tx_a0_pins[] = { PIN(GPIOX_4, 0) };\n-static const unsigned int uart_rx_a0_pins[] = { PIN(GPIOX_5, 0) };\n-static const unsigned int uart_cts_a0_pins[] = { PIN(GPIOX_6, 0) };\n-static const unsigned int uart_rts_a0_pins[] = { PIN(GPIOX_7, 0) };\n-\n-static const unsigned int uart_tx_a1_pins[] = { PIN(GPIOX_12, 0) };\n-static const unsigned int uart_rx_a1_pins[] = { PIN(GPIOX_13, 0) };\n-static const unsigned int uart_cts_a1_pins[] = { PIN(GPIOX_14, 0) };\n-static const unsigned int uart_rts_a1_pins[] = { PIN(GPIOX_15, 0) };\n-\n-static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) };\n-static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) };\n-static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) };\n-static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) };\n-\n-static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) };\n-static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) };\n-static const unsigned int iso7816_clk_pins[] = { PIN(GPIOX_18, 0) };\n-static const unsigned int iso7816_data_pins[] = { PIN(GPIOX_19, 0) };\n-\n-static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) };\n-static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) };\n-\n-static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) };\n-static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) };\n-\n-static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, 0) };\n-static const unsigned int pwm_b_x_pins[] = { PIN(GPIOX_11, 0) };\n+static const unsigned int sd_d0_a_pins[]\t= { GPIOX_0 };\n+static const unsigned int sd_d1_a_pins[]\t= { GPIOX_1 };\n+static const unsigned int sd_d2_a_pins[]\t= { GPIOX_2 };\n+static const unsigned int sd_d3_a_pins[]\t= { GPIOX_3 };\n+static const unsigned int sd_clk_a_pins[]\t= { GPIOX_8 };\n+static const unsigned int sd_cmd_a_pins[]\t= { GPIOX_9 };\n+\n+static const unsigned int sdxc_d0_a_pins[]\t= { GPIOX_0 };\n+static const unsigned int sdxc_d13_a_pins[]\t= { GPIOX_1, GPIOX_2, GPIOX_3 };\n+static const unsigned int sdxc_d47_a_pins[]\t= { GPIOX_4, GPIOX_5, GPIOX_6,\n+\t\t\t\t\t\t    GPIOX_7 };\n+static const unsigned int sdxc_clk_a_pins[]\t= { GPIOX_8 };\n+static const unsigned int sdxc_cmd_a_pins[]\t= { GPIOX_9 };\n+\n+static const unsigned int pcm_out_a_pins[]\t= { GPIOX_4 };\n+static const unsigned int pcm_in_a_pins[]\t= { GPIOX_5 };\n+static const unsigned int pcm_fs_a_pins[]\t= { GPIOX_6 };\n+static const unsigned int pcm_clk_a_pins[]\t= { GPIOX_7 };\n+\n+static const unsigned int uart_tx_a0_pins[]\t= { GPIOX_4 };\n+static const unsigned int uart_rx_a0_pins[]\t= { GPIOX_5 };\n+static const unsigned int uart_cts_a0_pins[]\t= { GPIOX_6 };\n+static const unsigned int uart_rts_a0_pins[]\t= { GPIOX_7 };\n+\n+static const unsigned int uart_tx_a1_pins[]\t= { GPIOX_12 };\n+static const unsigned int uart_rx_a1_pins[]\t= { GPIOX_13 };\n+static const unsigned int uart_cts_a1_pins[]\t= { GPIOX_14 };\n+static const unsigned int uart_rts_a1_pins[]\t= { GPIOX_15 };\n+\n+static const unsigned int uart_tx_b0_pins[]\t= { GPIOX_16 };\n+static const unsigned int uart_rx_b0_pins[]\t= { GPIOX_17 };\n+static const unsigned int uart_cts_b0_pins[]\t= { GPIOX_18 };\n+static const unsigned int uart_rts_b0_pins[]\t= { GPIOX_19 };\n+\n+static const unsigned int iso7816_det_pins[]\t= { GPIOX_16 };\n+static const unsigned int iso7816_reset_pins[]\t= { GPIOX_17 };\n+static const unsigned int iso7816_clk_pins[]\t= { GPIOX_18 };\n+static const unsigned int iso7816_data_pins[]\t= { GPIOX_19 };\n+\n+static const unsigned int i2c_sda_d0_pins[]\t= { GPIOX_16 };\n+static const unsigned int i2c_sck_d0_pins[]\t= { GPIOX_17 };\n+\n+static const unsigned int xtal_32k_out_pins[]\t= { GPIOX_10 };\n+static const unsigned int xtal_24m_out_pins[]\t= { GPIOX_11 };\n+\n+static const unsigned int pwm_e_pins[]\t\t= { GPIOX_10 };\n+static const unsigned int pwm_b_x_pins[]\t= { GPIOX_11 };\n \n /* bank Y */\n-static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_0, 0) };\n-static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_1, 0) };\n-static const unsigned int uart_cts_c_pins[] = { PIN(GPIOY_2, 0) };\n-static const unsigned int uart_rts_c_pins[] = { PIN(GPIOY_3, 0) };\n+static const unsigned int uart_tx_c_pins[]\t= { GPIOY_0 };\n+static const unsigned int uart_rx_c_pins[]\t= { GPIOY_1 };\n+static const unsigned int uart_cts_c_pins[]\t= { GPIOY_2 };\n+static const unsigned int uart_rts_c_pins[]\t= { GPIOY_3 };\n \n-static const unsigned int pcm_out_b_pins[] = { PIN(GPIOY_4, 0) };\n-static const unsigned int pcm_in_b_pins[] = { PIN(GPIOY_5, 0) };\n-static const unsigned int pcm_fs_b_pins[] = { PIN(GPIOY_6, 0) };\n-static const unsigned int pcm_clk_b_pins[] = { PIN(GPIOY_7, 0) };\n+static const unsigned int pcm_out_b_pins[]\t= { GPIOY_4 };\n+static const unsigned int pcm_in_b_pins[]\t= { GPIOY_5 };\n+static const unsigned int pcm_fs_b_pins[]\t= { GPIOY_6 };\n+static const unsigned int pcm_clk_b_pins[]\t= { GPIOY_7 };\n \n-static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIOY_0, 0) };\n-static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIOY_1, 0) };\n+static const unsigned int i2c_sda_c0_pins[]\t= { GPIOY_0 };\n+static const unsigned int i2c_sck_c0_pins[]\t= { GPIOY_1 };\n \n-static const unsigned int pwm_a_y_pins[] = { PIN(GPIOY_16, 0) };\n+static const unsigned int pwm_a_y_pins[]\t= { GPIOY_16 };\n \n-static const unsigned int i2s_out_ch45_pins[] = { PIN(GPIOY_0, 0) };\n-static const unsigned int i2s_out_ch23_pins[] = { PIN(GPIOY_1, 0) };\n-static const unsigned int i2s_out_ch01_pins[] = { PIN(GPIOY_4, 0) };\n-static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOY_5, 0) };\n-static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOY_6, 0) };\n-static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOY_7, 0) };\n-static const unsigned int i2s_am_clk_pins[] = { PIN(GPIOY_8, 0) };\n-static const unsigned int i2s_out_ch78_pins[] = { PIN(GPIOY_9, 0) };\n+static const unsigned int i2s_out_ch45_pins[]\t= { GPIOY_0 };\n+static const unsigned int i2s_out_ch23_pins[]\t= { GPIOY_1 };\n+static const unsigned int i2s_out_ch01_pins[]\t= { GPIOY_4 };\n+static const unsigned int i2s_in_ch01_pins[]\t= { GPIOY_5 };\n+static const unsigned int i2s_lr_clk_in_pins[]\t= { GPIOY_6 };\n+static const unsigned int i2s_ao_clk_in_pins[]\t= { GPIOY_7 };\n+static const unsigned int i2s_am_clk_pins[]\t= { GPIOY_8 };\n+static const unsigned int i2s_out_ch78_pins[]\t= { GPIOY_9 };\n \n-static const unsigned int spdif_in_pins[] = { PIN(GPIOY_2, 0) };\n-static const unsigned int spdif_out_pins[] = { PIN(GPIOY_3, 0) };\n+static const unsigned int spdif_in_pins[]\t= { GPIOY_2 };\n+static const unsigned int spdif_out_pins[]\t= { GPIOY_3 };\n \n /* bank DV */\n-static const unsigned int dvin_rgb_pins[] = { PIN(GPIODV_0, 0), PIN(GPIODV_1, 0),\n-\t\t\t\t\t      PIN(GPIODV_2, 0), PIN(GPIODV_3, 0),\n-\t\t\t\t\t      PIN(GPIODV_4, 0), PIN(GPIODV_5, 0),\n-\t\t\t\t\t      PIN(GPIODV_6, 0), PIN(GPIODV_7, 0),\n-\t\t\t\t\t      PIN(GPIODV_8, 0), PIN(GPIODV_9, 0),\n-\t\t\t\t\t      PIN(GPIODV_10, 0), PIN(GPIODV_11, 0),\n-\t\t\t\t\t      PIN(GPIODV_12, 0), PIN(GPIODV_13, 0),\n-\t\t\t\t\t      PIN(GPIODV_14, 0), PIN(GPIODV_15, 0),\n-\t\t\t\t\t      PIN(GPIODV_16, 0), PIN(GPIODV_17, 0),\n-\t\t\t\t\t      PIN(GPIODV_18, 0), PIN(GPIODV_19, 0),\n-\t\t\t\t\t      PIN(GPIODV_20, 0), PIN(GPIODV_21, 0),\n-\t\t\t\t\t      PIN(GPIODV_22, 0), PIN(GPIODV_23, 0) };\n-static const unsigned int dvin_vs_pins[] = { PIN(GPIODV_24, 0) };\n-static const unsigned int dvin_hs_pins[] = { PIN(GPIODV_25, 0) };\n-static const unsigned int dvin_clk_pins[] = { PIN(GPIODV_26, 0) };\n-static const unsigned int dvin_de_pins[] = { PIN(GPIODV_27, 0) };\n-\n-static const unsigned int enc_0_pins[] = { PIN(GPIODV_0, 0) };\n-static const unsigned int enc_1_pins[] = { PIN(GPIODV_1, 0) };\n-static const unsigned int enc_2_pins[] = { PIN(GPIODV_2, 0) };\n-static const unsigned int enc_3_pins[] = { PIN(GPIODV_3, 0) };\n-static const unsigned int enc_4_pins[] = { PIN(GPIODV_4, 0) };\n-static const unsigned int enc_5_pins[] = { PIN(GPIODV_5, 0) };\n-static const unsigned int enc_6_pins[] = { PIN(GPIODV_6, 0) };\n-static const unsigned int enc_7_pins[] = { PIN(GPIODV_7, 0) };\n-static const unsigned int enc_8_pins[] = { PIN(GPIODV_8, 0) };\n-static const unsigned int enc_9_pins[] = { PIN(GPIODV_9, 0) };\n-static const unsigned int enc_10_pins[] = { PIN(GPIODV_10, 0) };\n-static const unsigned int enc_11_pins[] = { PIN(GPIODV_11, 0) };\n-static const unsigned int enc_12_pins[] = { PIN(GPIODV_12, 0) };\n-static const unsigned int enc_13_pins[] = { PIN(GPIODV_13, 0) };\n-static const unsigned int enc_14_pins[] = { PIN(GPIODV_14, 0) };\n-static const unsigned int enc_15_pins[] = { PIN(GPIODV_15, 0) };\n-static const unsigned int enc_16_pins[] = { PIN(GPIODV_16, 0) };\n-static const unsigned int enc_17_pins[] = { PIN(GPIODV_17, 0) };\n-\n-static const unsigned int uart_tx_b1_pins[] = { PIN(GPIODV_24, 0) };\n-static const unsigned int uart_rx_b1_pins[] = { PIN(GPIODV_25, 0) };\n-static const unsigned int uart_cts_b1_pins[] = { PIN(GPIODV_26, 0) };\n-static const unsigned int uart_rts_b1_pins[] = { PIN(GPIODV_27, 0) };\n-\n-static const unsigned int vga_vs_pins[] = { PIN(GPIODV_24, 0) };\n-static const unsigned int vga_hs_pins[] = { PIN(GPIODV_25, 0) };\n-\n-static const unsigned int pwm_c_dv9_pins[] = { PIN(GPIODV_9, 0) };\n-static const unsigned int pwm_c_dv29_pins[] = { PIN(GPIODV_29, 0) };\n-static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, 0) };\n+static const unsigned int dvin_rgb_pins[] = {\n+\tGPIODV_0, GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5,\n+\tGPIODV_6, GPIODV_7, GPIODV_8, GPIODV_9, GPIODV_10, GPIODV_11,\n+\tGPIODV_12, GPIODV_13, GPIODV_14, GPIODV_15, GPIODV_16, GPIODV_17,\n+\tGPIODV_18, GPIODV_19, GPIODV_20, GPIODV_21, GPIODV_22, GPIODV_23\n+};\n+static const unsigned int dvin_vs_pins[]\t= { GPIODV_24 };\n+static const unsigned int dvin_hs_pins[]\t= { GPIODV_25 };\n+static const unsigned int dvin_clk_pins[]\t= { GPIODV_26 };\n+static const unsigned int dvin_de_pins[]\t= { GPIODV_27 };\n+\n+static const unsigned int enc_0_pins[]\t\t= { GPIODV_0 };\n+static const unsigned int enc_1_pins[]\t\t= { GPIODV_1 };\n+static const unsigned int enc_2_pins[]\t\t= { GPIODV_2 };\n+static const unsigned int enc_3_pins[]\t\t= { GPIODV_3 };\n+static const unsigned int enc_4_pins[]\t\t= { GPIODV_4 };\n+static const unsigned int enc_5_pins[]\t\t= { GPIODV_5 };\n+static const unsigned int enc_6_pins[]\t\t= { GPIODV_6 };\n+static const unsigned int enc_7_pins[]\t\t= { GPIODV_7 };\n+static const unsigned int enc_8_pins[]\t\t= { GPIODV_8 };\n+static const unsigned int enc_9_pins[]\t\t= { GPIODV_9 };\n+static const unsigned int enc_10_pins[]\t\t= { GPIODV_10 };\n+static const unsigned int enc_11_pins[]\t\t= { GPIODV_11 };\n+static const unsigned int enc_12_pins[]\t\t= { GPIODV_12 };\n+static const unsigned int enc_13_pins[]\t\t= { GPIODV_13 };\n+static const unsigned int enc_14_pins[]\t\t= { GPIODV_14 };\n+static const unsigned int enc_15_pins[]\t\t= { GPIODV_15 };\n+static const unsigned int enc_16_pins[]\t\t= { GPIODV_16 };\n+static const unsigned int enc_17_pins[]\t\t= { GPIODV_17 };\n+\n+static const unsigned int uart_tx_b1_pins[]\t= { GPIODV_24 };\n+static const unsigned int uart_rx_b1_pins[]\t= { GPIODV_25 };\n+static const unsigned int uart_cts_b1_pins[]\t= { GPIODV_26 };\n+static const unsigned int uart_rts_b1_pins[]\t= { GPIODV_27 };\n+\n+static const unsigned int vga_vs_pins[]\t\t= { GPIODV_24 };\n+static const unsigned int vga_hs_pins[]\t\t= { GPIODV_25 };\n+\n+static const unsigned int pwm_c_dv9_pins[]\t= { GPIODV_9 };\n+static const unsigned int pwm_c_dv29_pins[]\t= { GPIODV_29 };\n+static const unsigned int pwm_d_pins[]\t\t= { GPIODV_28 };\n \n /* bank H */\n-static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) };\n-static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) };\n-static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) };\n-static const unsigned int hdmi_cec_pins[] = { PIN(GPIOH_3, 0) };\n+static const unsigned int hdmi_hpd_pins[]\t= { GPIOH_0 };\n+static const unsigned int hdmi_sda_pins[]\t= { GPIOH_1 };\n+static const unsigned int hdmi_scl_pins[]\t= { GPIOH_2 };\n+static const unsigned int hdmi_cec_pins[]\t= { GPIOH_3 };\n \n-static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOH_3, 0) };\n-static const unsigned int spi_miso_0_pins[] = { PIN(GPIOH_4, 0) };\n-static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOH_5, 0) };\n-static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOH_6, 0) };\n+static const unsigned int spi_ss0_0_pins[]\t= { GPIOH_3 };\n+static const unsigned int spi_miso_0_pins[]\t= { GPIOH_4 };\n+static const unsigned int spi_mosi_0_pins[]\t= { GPIOH_5 };\n+static const unsigned int spi_sclk_0_pins[]\t= { GPIOH_6 };\n \n-static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) };\n-static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) };\n+static const unsigned int i2c_sda_d1_pins[]\t= { GPIOH_7 };\n+static const unsigned int i2c_sck_d1_pins[]\t= { GPIOH_8 };\n \n /* bank Z */\n-static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOZ_9, 0) };\n-static const unsigned int spi_ss1_1_pins[] = { PIN(GPIOZ_10, 0) };\n-static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOZ_11, 0) };\n-static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOZ_12, 0) };\n-static const unsigned int spi_miso_1_pins[] = { PIN(GPIOZ_13, 0) };\n-static const unsigned int spi_ss2_1_pins[] = { PIN(GPIOZ_14, 0) };\n-\n-static const unsigned int eth_tx_clk_50m_pins[] = { PIN(GPIOZ_4, 0) };\n-static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_5, 0) };\n-static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_6, 0) };\n-static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_7, 0) };\n-static const unsigned int eth_rx_clk_in_pins[] = { PIN(GPIOZ_8, 0) };\n-static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_9, 0) };\n-static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_10, 0) };\n-static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_11, 0) };\n-static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_12, 0) };\n-static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_13, 0) };\n-\n-static const unsigned int i2c_sda_a0_pins[] = { PIN(GPIOZ_0, 0) };\n-static const unsigned int i2c_sck_a0_pins[] = { PIN(GPIOZ_1, 0) };\n-\n-static const unsigned int i2c_sda_b_pins[] = { PIN(GPIOZ_2, 0) };\n-static const unsigned int i2c_sck_b_pins[] = { PIN(GPIOZ_3, 0) };\n-\n-static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOZ_4, 0) };\n-static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOZ_5, 0) };\n-\n-static const unsigned int i2c_sda_a1_pins[] = { PIN(GPIOZ_0, 0) };\n-static const unsigned int i2c_sck_a1_pins[] = { PIN(GPIOZ_1, 0) };\n-\n-static const unsigned int i2c_sda_a2_pins[] = { PIN(GPIOZ_0, 0) };\n-static const unsigned int i2c_sck_a2_pins[] = { PIN(GPIOZ_1, 0) };\n-\n-static const unsigned int pwm_a_z0_pins[] = { PIN(GPIOZ_0, 0) };\n-static const unsigned int pwm_a_z7_pins[] = { PIN(GPIOZ_7, 0) };\n-static const unsigned int pwm_b_z_pins[] = { PIN(GPIOZ_1, 0) };\n-static const unsigned int pwm_c_z_pins[] = { PIN(GPIOZ_8, 0) };\n+static const unsigned int spi_ss0_1_pins[]\t= { GPIOZ_9 };\n+static const unsigned int spi_ss1_1_pins[]\t= { GPIOZ_10 };\n+static const unsigned int spi_sclk_1_pins[]\t= { GPIOZ_11 };\n+static const unsigned int spi_mosi_1_pins[]\t= { GPIOZ_12 };\n+static const unsigned int spi_miso_1_pins[]\t= { GPIOZ_13 };\n+static const unsigned int spi_ss2_1_pins[]\t= { GPIOZ_14 };\n+\n+static const unsigned int eth_tx_clk_50m_pins[]\t= { GPIOZ_4 };\n+static const unsigned int eth_tx_en_pins[]\t= { GPIOZ_5 };\n+static const unsigned int eth_txd1_pins[]\t= { GPIOZ_6 };\n+static const unsigned int eth_txd0_pins[]\t= { GPIOZ_7 };\n+static const unsigned int eth_rx_clk_in_pins[]\t= { GPIOZ_8 };\n+static const unsigned int eth_rx_dv_pins[]\t= { GPIOZ_9 };\n+static const unsigned int eth_rxd1_pins[]\t= { GPIOZ_10 };\n+static const unsigned int eth_rxd0_pins[]\t= { GPIOZ_11 };\n+static const unsigned int eth_mdio_pins[]\t= { GPIOZ_12 };\n+static const unsigned int eth_mdc_pins[]\t= { GPIOZ_13 };\n+\n+static const unsigned int i2c_sda_a0_pins[]\t= { GPIOZ_0 };\n+static const unsigned int i2c_sck_a0_pins[]\t= { GPIOZ_1 };\n+\n+static const unsigned int i2c_sda_b_pins[]\t= { GPIOZ_2 };\n+static const unsigned int i2c_sck_b_pins[]\t= { GPIOZ_3 };\n+\n+static const unsigned int i2c_sda_c1_pins[]\t= { GPIOZ_4 };\n+static const unsigned int i2c_sck_c1_pins[]\t= { GPIOZ_5 };\n+\n+static const unsigned int i2c_sda_a1_pins[]\t= { GPIOZ_0 };\n+static const unsigned int i2c_sck_a1_pins[]\t= { GPIOZ_1 };\n+\n+static const unsigned int i2c_sda_a2_pins[]\t= { GPIOZ_0 };\n+static const unsigned int i2c_sck_a2_pins[]\t= { GPIOZ_1 };\n+\n+static const unsigned int pwm_a_z0_pins[]\t= { GPIOZ_0 };\n+static const unsigned int pwm_a_z7_pins[]\t= { GPIOZ_7 };\n+static const unsigned int pwm_b_z_pins[]\t= { GPIOZ_1 };\n+static const unsigned int pwm_c_z_pins[]\t= { GPIOZ_8 };\n \n /* bank BOOT */\n-static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) };\n-static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) };\n-static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) };\n-static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) };\n-static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_16, 0) };\n-static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_17, 0) };\n-\n-static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)};\n-static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0),\n-\t\t\t\t\t\tPIN(BOOT_3, 0) };\n-static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0),\n-\t\t\t\t\t\tPIN(BOOT_6, 0), PIN(BOOT_7, 0) };\n-static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_16, 0) };\n-static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_17, 0) };\n-\n-static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0),\n-\t\t\t\t\t     PIN(BOOT_2, 0), PIN(BOOT_3, 0),\n-\t\t\t\t\t     PIN(BOOT_4, 0), PIN(BOOT_5, 0),\n-\t\t\t\t\t     PIN(BOOT_6, 0), PIN(BOOT_7, 0) };\n-static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) };\n-static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) };\n-static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) };\n-static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) };\n-static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) };\n-static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) };\n-static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) };\n-static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, 0) };\n-static const unsigned int nand_ce2_pins[] = { PIN(BOOT_16, 0) };\n-static const unsigned int nand_ce3_pins[] = { PIN(BOOT_17, 0) };\n-\n-static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) };\n-static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) };\n-static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) };\n-static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) };\n+static const unsigned int sd_d0_c_pins[]\t= { BOOT_0 };\n+static const unsigned int sd_d1_c_pins[]\t= { BOOT_1 };\n+static const unsigned int sd_d2_c_pins[]\t= { BOOT_2 };\n+static const unsigned int sd_d3_c_pins[]\t= { BOOT_3 };\n+static const unsigned int sd_cmd_c_pins[]\t= { BOOT_16 };\n+static const unsigned int sd_clk_c_pins[]\t= { BOOT_17 };\n+\n+static const unsigned int sdxc_d0_c_pins[]\t= { BOOT_0};\n+static const unsigned int sdxc_d13_c_pins[]\t= { BOOT_1, BOOT_2, BOOT_3 };\n+static const unsigned int sdxc_d47_c_pins[]\t= { BOOT_4, BOOT_5, BOOT_6,\n+\t\t\t\t\t\t    BOOT_7 };\n+static const unsigned int sdxc_cmd_c_pins[]\t= { BOOT_16 };\n+static const unsigned int sdxc_clk_c_pins[]\t= { BOOT_17 };\n+\n+static const unsigned int nand_io_pins[] = {\n+\tBOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7\n+};\n+static const unsigned int nand_io_ce0_pins[]\t= { BOOT_8 };\n+static const unsigned int nand_io_ce1_pins[]\t= { BOOT_9 };\n+static const unsigned int nand_io_rb0_pins[]\t= { BOOT_10 };\n+static const unsigned int nand_ale_pins[]\t= { BOOT_11 };\n+static const unsigned int nand_cle_pins[]\t= { BOOT_12 };\n+static const unsigned int nand_wen_clk_pins[]\t= { BOOT_13 };\n+static const unsigned int nand_ren_clk_pins[]\t= { BOOT_14 };\n+static const unsigned int nand_dqs_pins[]\t= { BOOT_15 };\n+static const unsigned int nand_ce2_pins[]\t= { BOOT_16 };\n+static const unsigned int nand_ce3_pins[]\t= { BOOT_17 };\n+\n+static const unsigned int nor_d_pins[]\t\t= { BOOT_11 };\n+static const unsigned int nor_q_pins[]\t\t= { BOOT_12 };\n+static const unsigned int nor_c_pins[]\t\t= { BOOT_13 };\n+static const unsigned int nor_cs_pins[]\t\t= { BOOT_18 };\n \n /* bank CARD */\n-static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) };\n-static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) };\n-static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) };\n-static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) };\n-static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) };\n-static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) };\n-\n-static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0),\n-\t\t\t\t\t\tPIN(CARD_5, 0) };\n-static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) };\n-static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) };\n-static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) };\n+static const unsigned int sd_d1_b_pins[]\t= { CARD_0 };\n+static const unsigned int sd_d0_b_pins[]\t= { CARD_1 };\n+static const unsigned int sd_clk_b_pins[]\t= { CARD_2 };\n+static const unsigned int sd_cmd_b_pins[]\t= { CARD_3 };\n+static const unsigned int sd_d3_b_pins[]\t= { CARD_4 };\n+static const unsigned int sd_d2_b_pins[]\t= { CARD_5 };\n+\n+static const unsigned int sdxc_d13_b_pins[]\t= { CARD_0, CARD_4, CARD_5 };\n+static const unsigned int sdxc_d0_b_pins[]\t= { CARD_1 };\n+static const unsigned int sdxc_clk_b_pins[]\t= { CARD_2 };\n+static const unsigned int sdxc_cmd_b_pins[]\t= { CARD_3 };\n \n /* bank AO */\n-static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) };\n-static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) };\n-static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) };\n-static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) };\n+static const unsigned int uart_tx_ao_a_pins[]\t= { GPIOAO_0 };\n+static const unsigned int uart_rx_ao_a_pins[]\t= { GPIOAO_1 };\n+static const unsigned int uart_cts_ao_a_pins[]\t= { GPIOAO_2 };\n+static const unsigned int uart_rts_ao_a_pins[]\t= { GPIOAO_3 };\n \n-static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) };\n-static const unsigned int remote_output_ao_pins[] = { PIN(GPIOAO_13, AO_OFF) };\n+static const unsigned int remote_input_pins[]\t= { GPIOAO_7 };\n+static const unsigned int remote_output_ao_pins[] = { GPIOAO_13 };\n \n-static const unsigned int i2c_slave_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };\n-static const unsigned int i2c_slave_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };\n+static const unsigned int i2c_slave_sck_ao_pins[] = { GPIOAO_4 };\n+static const unsigned int i2c_slave_sda_ao_pins[] = { GPIOAO_5 };\n \n-static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) };\n-static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) };\n+static const unsigned int uart_tx_ao_b0_pins[]\t= { GPIOAO_0 };\n+static const unsigned int uart_rx_ao_b0_pins[]\t= { GPIOAO_1 };\n \n-static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) };\n-static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) };\n+static const unsigned int uart_tx_ao_b1_pins[]\t= { GPIOAO_4 };\n+static const unsigned int uart_rx_ao_b1_pins[]\t= { GPIOAO_5 };\n \n-static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };\n-static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };\n+static const unsigned int i2c_mst_sck_ao_pins[]\t= { GPIOAO_4 };\n+static const unsigned int i2c_mst_sda_ao_pins[]\t= { GPIOAO_5 };\n \n-static const unsigned int pwm_f_ao_pins[] = { PIN(GPIO_TEST_N, AO_OFF) };\n+static const unsigned int pwm_f_ao_pins[]\t= { GPIO_TEST_N };\n \n-static const unsigned int i2s_am_clk_out_ao_pins[] = { PIN(GPIOAO_8, AO_OFF) };\n-static const unsigned int i2s_ao_clk_out_ao_pins[] = { PIN(GPIOAO_9, AO_OFF) };\n-static const unsigned int i2s_lr_clk_out_ao_pins[] = { PIN(GPIOAO_10, AO_OFF) };\n-static const unsigned int i2s_out_ch01_ao_pins[] = { PIN(GPIOAO_11, AO_OFF) };\n+static const unsigned int i2s_am_clk_out_ao_pins[] = { GPIOAO_8 };\n+static const unsigned int i2s_ao_clk_out_ao_pins[] = { GPIOAO_9 };\n+static const unsigned int i2s_lr_clk_out_ao_pins[] = { GPIOAO_10 };\n+static const unsigned int i2s_out_ch01_ao_pins[] = { GPIOAO_11 };\n \n-static const unsigned int hdmi_cec_ao_pins[] = { PIN(GPIOAO_12, AO_OFF) };\n+static const unsigned int hdmi_cec_ao_pins[]\t= { GPIOAO_12 };\n \n static struct meson_pmx_group meson8_cbus_groups[] = {\n-\tGPIO_GROUP(GPIOX_0, 0),\n-\tGPIO_GROUP(GPIOX_1, 0),\n-\tGPIO_GROUP(GPIOX_2, 0),\n-\tGPIO_GROUP(GPIOX_3, 0),\n-\tGPIO_GROUP(GPIOX_4, 0),\n-\tGPIO_GROUP(GPIOX_5, 0),\n-\tGPIO_GROUP(GPIOX_6, 0),\n-\tGPIO_GROUP(GPIOX_7, 0),\n-\tGPIO_GROUP(GPIOX_8, 0),\n-\tGPIO_GROUP(GPIOX_9, 0),\n-\tGPIO_GROUP(GPIOX_10, 0),\n-\tGPIO_GROUP(GPIOX_11, 0),\n-\tGPIO_GROUP(GPIOX_12, 0),\n-\tGPIO_GROUP(GPIOX_13, 0),\n-\tGPIO_GROUP(GPIOX_14, 0),\n-\tGPIO_GROUP(GPIOX_15, 0),\n-\tGPIO_GROUP(GPIOX_16, 0),\n-\tGPIO_GROUP(GPIOX_17, 0),\n-\tGPIO_GROUP(GPIOX_18, 0),\n-\tGPIO_GROUP(GPIOX_19, 0),\n-\tGPIO_GROUP(GPIOX_20, 0),\n-\tGPIO_GROUP(GPIOX_21, 0),\n-\tGPIO_GROUP(GPIOY_0, 0),\n-\tGPIO_GROUP(GPIOY_1, 0),\n-\tGPIO_GROUP(GPIOY_2, 0),\n-\tGPIO_GROUP(GPIOY_3, 0),\n-\tGPIO_GROUP(GPIOY_4, 0),\n-\tGPIO_GROUP(GPIOY_5, 0),\n-\tGPIO_GROUP(GPIOY_6, 0),\n-\tGPIO_GROUP(GPIOY_7, 0),\n-\tGPIO_GROUP(GPIOY_8, 0),\n-\tGPIO_GROUP(GPIOY_9, 0),\n-\tGPIO_GROUP(GPIOY_10, 0),\n-\tGPIO_GROUP(GPIOY_11, 0),\n-\tGPIO_GROUP(GPIOY_12, 0),\n-\tGPIO_GROUP(GPIOY_13, 0),\n-\tGPIO_GROUP(GPIOY_14, 0),\n-\tGPIO_GROUP(GPIOY_15, 0),\n-\tGPIO_GROUP(GPIOY_16, 0),\n-\tGPIO_GROUP(GPIODV_0, 0),\n-\tGPIO_GROUP(GPIODV_1, 0),\n-\tGPIO_GROUP(GPIODV_2, 0),\n-\tGPIO_GROUP(GPIODV_3, 0),\n-\tGPIO_GROUP(GPIODV_4, 0),\n-\tGPIO_GROUP(GPIODV_5, 0),\n-\tGPIO_GROUP(GPIODV_6, 0),\n-\tGPIO_GROUP(GPIODV_7, 0),\n-\tGPIO_GROUP(GPIODV_8, 0),\n-\tGPIO_GROUP(GPIODV_9, 0),\n-\tGPIO_GROUP(GPIODV_10, 0),\n-\tGPIO_GROUP(GPIODV_11, 0),\n-\tGPIO_GROUP(GPIODV_12, 0),\n-\tGPIO_GROUP(GPIODV_13, 0),\n-\tGPIO_GROUP(GPIODV_14, 0),\n-\tGPIO_GROUP(GPIODV_15, 0),\n-\tGPIO_GROUP(GPIODV_16, 0),\n-\tGPIO_GROUP(GPIODV_17, 0),\n-\tGPIO_GROUP(GPIODV_18, 0),\n-\tGPIO_GROUP(GPIODV_19, 0),\n-\tGPIO_GROUP(GPIODV_20, 0),\n-\tGPIO_GROUP(GPIODV_21, 0),\n-\tGPIO_GROUP(GPIODV_22, 0),\n-\tGPIO_GROUP(GPIODV_23, 0),\n-\tGPIO_GROUP(GPIODV_24, 0),\n-\tGPIO_GROUP(GPIODV_25, 0),\n-\tGPIO_GROUP(GPIODV_26, 0),\n-\tGPIO_GROUP(GPIODV_27, 0),\n-\tGPIO_GROUP(GPIODV_28, 0),\n-\tGPIO_GROUP(GPIODV_29, 0),\n-\tGPIO_GROUP(GPIOH_0, 0),\n-\tGPIO_GROUP(GPIOH_1, 0),\n-\tGPIO_GROUP(GPIOH_2, 0),\n-\tGPIO_GROUP(GPIOH_3, 0),\n-\tGPIO_GROUP(GPIOH_4, 0),\n-\tGPIO_GROUP(GPIOH_5, 0),\n-\tGPIO_GROUP(GPIOH_6, 0),\n-\tGPIO_GROUP(GPIOH_7, 0),\n-\tGPIO_GROUP(GPIOH_8, 0),\n-\tGPIO_GROUP(GPIOH_9, 0),\n-\tGPIO_GROUP(GPIOZ_0, 0),\n-\tGPIO_GROUP(GPIOZ_1, 0),\n-\tGPIO_GROUP(GPIOZ_2, 0),\n-\tGPIO_GROUP(GPIOZ_3, 0),\n-\tGPIO_GROUP(GPIOZ_4, 0),\n-\tGPIO_GROUP(GPIOZ_5, 0),\n-\tGPIO_GROUP(GPIOZ_6, 0),\n-\tGPIO_GROUP(GPIOZ_7, 0),\n-\tGPIO_GROUP(GPIOZ_8, 0),\n-\tGPIO_GROUP(GPIOZ_9, 0),\n-\tGPIO_GROUP(GPIOZ_10, 0),\n-\tGPIO_GROUP(GPIOZ_11, 0),\n-\tGPIO_GROUP(GPIOZ_12, 0),\n-\tGPIO_GROUP(GPIOZ_13, 0),\n-\tGPIO_GROUP(GPIOZ_14, 0),\n+\tGPIO_GROUP(GPIOX_0),\n+\tGPIO_GROUP(GPIOX_1),\n+\tGPIO_GROUP(GPIOX_2),\n+\tGPIO_GROUP(GPIOX_3),\n+\tGPIO_GROUP(GPIOX_4),\n+\tGPIO_GROUP(GPIOX_5),\n+\tGPIO_GROUP(GPIOX_6),\n+\tGPIO_GROUP(GPIOX_7),\n+\tGPIO_GROUP(GPIOX_8),\n+\tGPIO_GROUP(GPIOX_9),\n+\tGPIO_GROUP(GPIOX_10),\n+\tGPIO_GROUP(GPIOX_11),\n+\tGPIO_GROUP(GPIOX_12),\n+\tGPIO_GROUP(GPIOX_13),\n+\tGPIO_GROUP(GPIOX_14),\n+\tGPIO_GROUP(GPIOX_15),\n+\tGPIO_GROUP(GPIOX_16),\n+\tGPIO_GROUP(GPIOX_17),\n+\tGPIO_GROUP(GPIOX_18),\n+\tGPIO_GROUP(GPIOX_19),\n+\tGPIO_GROUP(GPIOX_20),\n+\tGPIO_GROUP(GPIOX_21),\n+\tGPIO_GROUP(GPIOY_0),\n+\tGPIO_GROUP(GPIOY_1),\n+\tGPIO_GROUP(GPIOY_2),\n+\tGPIO_GROUP(GPIOY_3),\n+\tGPIO_GROUP(GPIOY_4),\n+\tGPIO_GROUP(GPIOY_5),\n+\tGPIO_GROUP(GPIOY_6),\n+\tGPIO_GROUP(GPIOY_7),\n+\tGPIO_GROUP(GPIOY_8),\n+\tGPIO_GROUP(GPIOY_9),\n+\tGPIO_GROUP(GPIOY_10),\n+\tGPIO_GROUP(GPIOY_11),\n+\tGPIO_GROUP(GPIOY_12),\n+\tGPIO_GROUP(GPIOY_13),\n+\tGPIO_GROUP(GPIOY_14),\n+\tGPIO_GROUP(GPIOY_15),\n+\tGPIO_GROUP(GPIOY_16),\n+\tGPIO_GROUP(GPIODV_0),\n+\tGPIO_GROUP(GPIODV_1),\n+\tGPIO_GROUP(GPIODV_2),\n+\tGPIO_GROUP(GPIODV_3),\n+\tGPIO_GROUP(GPIODV_4),\n+\tGPIO_GROUP(GPIODV_5),\n+\tGPIO_GROUP(GPIODV_6),\n+\tGPIO_GROUP(GPIODV_7),\n+\tGPIO_GROUP(GPIODV_8),\n+\tGPIO_GROUP(GPIODV_9),\n+\tGPIO_GROUP(GPIODV_10),\n+\tGPIO_GROUP(GPIODV_11),\n+\tGPIO_GROUP(GPIODV_12),\n+\tGPIO_GROUP(GPIODV_13),\n+\tGPIO_GROUP(GPIODV_14),\n+\tGPIO_GROUP(GPIODV_15),\n+\tGPIO_GROUP(GPIODV_16),\n+\tGPIO_GROUP(GPIODV_17),\n+\tGPIO_GROUP(GPIODV_18),\n+\tGPIO_GROUP(GPIODV_19),\n+\tGPIO_GROUP(GPIODV_20),\n+\tGPIO_GROUP(GPIODV_21),\n+\tGPIO_GROUP(GPIODV_22),\n+\tGPIO_GROUP(GPIODV_23),\n+\tGPIO_GROUP(GPIODV_24),\n+\tGPIO_GROUP(GPIODV_25),\n+\tGPIO_GROUP(GPIODV_26),\n+\tGPIO_GROUP(GPIODV_27),\n+\tGPIO_GROUP(GPIODV_28),\n+\tGPIO_GROUP(GPIODV_29),\n+\tGPIO_GROUP(GPIOH_0),\n+\tGPIO_GROUP(GPIOH_1),\n+\tGPIO_GROUP(GPIOH_2),\n+\tGPIO_GROUP(GPIOH_3),\n+\tGPIO_GROUP(GPIOH_4),\n+\tGPIO_GROUP(GPIOH_5),\n+\tGPIO_GROUP(GPIOH_6),\n+\tGPIO_GROUP(GPIOH_7),\n+\tGPIO_GROUP(GPIOH_8),\n+\tGPIO_GROUP(GPIOH_9),\n+\tGPIO_GROUP(GPIOZ_0),\n+\tGPIO_GROUP(GPIOZ_1),\n+\tGPIO_GROUP(GPIOZ_2),\n+\tGPIO_GROUP(GPIOZ_3),\n+\tGPIO_GROUP(GPIOZ_4),\n+\tGPIO_GROUP(GPIOZ_5),\n+\tGPIO_GROUP(GPIOZ_6),\n+\tGPIO_GROUP(GPIOZ_7),\n+\tGPIO_GROUP(GPIOZ_8),\n+\tGPIO_GROUP(GPIOZ_9),\n+\tGPIO_GROUP(GPIOZ_10),\n+\tGPIO_GROUP(GPIOZ_11),\n+\tGPIO_GROUP(GPIOZ_12),\n+\tGPIO_GROUP(GPIOZ_13),\n+\tGPIO_GROUP(GPIOZ_14),\n \n \t/* bank X */\n \tGROUP(sd_d0_a,\t\t8,\t5),\n@@ -727,22 +715,22 @@ static struct meson_pmx_group meson8_cbus_groups[] = {\n };\n \n static struct meson_pmx_group meson8_aobus_groups[] = {\n-\tGPIO_GROUP(GPIOAO_0, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_1, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_2, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_3, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_4, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_5, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_6, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_7, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_8, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_9, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_10, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_11, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_12, AO_OFF),\n-\tGPIO_GROUP(GPIOAO_13, AO_OFF),\n-\tGPIO_GROUP(GPIO_BSD_EN, AO_OFF),\n-\tGPIO_GROUP(GPIO_TEST_N, AO_OFF),\n+\tGPIO_GROUP(GPIOAO_0),\n+\tGPIO_GROUP(GPIOAO_1),\n+\tGPIO_GROUP(GPIOAO_2),\n+\tGPIO_GROUP(GPIOAO_3),\n+\tGPIO_GROUP(GPIOAO_4),\n+\tGPIO_GROUP(GPIOAO_5),\n+\tGPIO_GROUP(GPIOAO_6),\n+\tGPIO_GROUP(GPIOAO_7),\n+\tGPIO_GROUP(GPIOAO_8),\n+\tGPIO_GROUP(GPIOAO_9),\n+\tGPIO_GROUP(GPIOAO_10),\n+\tGPIO_GROUP(GPIOAO_11),\n+\tGPIO_GROUP(GPIOAO_12),\n+\tGPIO_GROUP(GPIOAO_13),\n+\tGPIO_GROUP(GPIO_BSD_EN),\n+\tGPIO_GROUP(GPIO_TEST_N),\n \n \t/* bank AO */\n \tGROUP(uart_tx_ao_a,\t\t0,\t12),\n@@ -1041,19 +1029,19 @@ static struct meson_pmx_func meson8_aobus_functions[] = {\n };\n \n static struct meson_bank meson8_cbus_banks[] = {\n-\t/*   name    first             last                 irq       pullen  pull    dir     out     in  */\n-\tBANK(\"X\",    PIN(GPIOX_0, 0),  PIN(GPIOX_21, 0),    112, 133, 4,  0,  4,  0,  0,  0,  1,  0,  2,  0),\n-\tBANK(\"Y\",    PIN(GPIOY_0, 0),  PIN(GPIOY_16, 0),    95,  111, 3,  0,  3,  0,  3,  0,  4,  0,  5,  0),\n-\tBANK(\"DV\",   PIN(GPIODV_0, 0), PIN(GPIODV_29, 0),   65,   94, 0,  0,  0,  0,  7,  0,  8,  0,  9,  0),\n-\tBANK(\"H\",    PIN(GPIOH_0, 0),  PIN(GPIOH_9, 0),     29,   38, 1, 16,  1, 16,  9, 19, 10, 19, 11, 19),\n-\tBANK(\"Z\",    PIN(GPIOZ_0, 0),  PIN(GPIOZ_14, 0),    14,   28, 1,  0,  1,  0,  3, 17,  4, 17,  5, 17),\n-\tBANK(\"CARD\", PIN(CARD_0, 0),   PIN(CARD_6, 0),      58,   64, 2, 20,  2, 20,  0, 22,  1, 22,  2, 22),\n-\tBANK(\"BOOT\", PIN(BOOT_0, 0),   PIN(BOOT_18, 0),     39,   57, 2,  0,  2,  0,  9,  0, 10,  0, 11,  0),\n+\t/*   name    first     last         irq       pullen  pull    dir     out     in  */\n+\tBANK(\"X\",    GPIOX_0,  GPIOX_21,    112, 133, 4,  0,  4,  0,  0,  0,  1,  0,  2,  0),\n+\tBANK(\"Y\",    GPIOY_0,  GPIOY_16,    95,  111, 3,  0,  3,  0,  3,  0,  4,  0,  5,  0),\n+\tBANK(\"DV\",   GPIODV_0, GPIODV_29,   65,   94, 0,  0,  0,  0,  7,  0,  8,  0,  9,  0),\n+\tBANK(\"H\",    GPIOH_0,  GPIOH_9,     29,   38, 1, 16,  1, 16,  9, 19, 10, 19, 11, 19),\n+\tBANK(\"Z\",    GPIOZ_0,  GPIOZ_14,    14,   28, 1,  0,  1,  0,  3, 17,  4, 17,  5, 17),\n+\tBANK(\"CARD\", CARD_0,   CARD_6,      58,   64, 2, 20,  2, 20,  0, 22,  1, 22,  2, 22),\n+\tBANK(\"BOOT\", BOOT_0,   BOOT_18,     39,   57, 2,  0,  2,  0,  9,  0, 10,  0, 11,  0),\n };\n \n static struct meson_bank meson8_aobus_banks[] = {\n-\t/*   name    first                  last                      irq    pullen  pull    dir     out     in  */\n-\tBANK(\"AO\",   PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 13, 0,  0,  0, 16,  0,  0,  0, 16,  1,  0),\n+\t/*   name    first     last         irq    pullen  pull    dir     out     in  */\n+\tBANK(\"AO\",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0,  0,  0, 16,  0,  0,  0, 16,  1,  0),\n };\n \n struct meson_pinctrl_data meson8_cbus_pinctrl_data = {\n@@ -1071,7 +1059,7 @@ struct meson_pinctrl_data meson8_cbus_pinctrl_data = {\n \n struct meson_pinctrl_data meson8_aobus_pinctrl_data = {\n \t.name\t\t= \"ao-bank\",\n-\t.pin_base\t= 120,\n+\t.pin_base\t= 0,\n \t.pins\t\t= meson8_aobus_pins,\n \t.groups\t\t= meson8_aobus_groups,\n \t.funcs\t\t= meson8_aobus_functions,\n",
    "prefixes": [
        "4/8"
    ]
}