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{
    "id": 816223,
    "url": "http://patchwork.ozlabs.org/api/patches/816223/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-8-jbrunet@baylibre.com/",
    "project": {
        "id": 42,
        "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api",
        "name": "Linux GPIO development",
        "link_name": "linux-gpio",
        "list_id": "linux-gpio.vger.kernel.org",
        "list_email": "linux-gpio@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
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    },
    "msgid": "<20170920133927.17390-8-jbrunet@baylibre.com>",
    "list_archive_url": null,
    "date": "2017-09-20T13:39:26",
    "name": "[7/8] pinctrl: meson-gx: TEST_N belongs to the AO controller",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "3a3bc30c61d7cfbc69ca620dd0c40417adba2e6c",
    "submitter": {
        "id": 69839,
        "url": "http://patchwork.ozlabs.org/api/people/69839/?format=api",
        "name": "Jerome Brunet",
        "email": "jbrunet@baylibre.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-8-jbrunet@baylibre.com/mbox/",
    "series": [
        {
            "id": 4115,
            "url": "http://patchwork.ozlabs.org/api/series/4115/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=4115",
            "date": "2017-09-20T13:39:19",
            "name": "pinctrl: meson: clean pin offsets",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/4115/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/816223/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/816223/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-gpio-owner@vger.kernel.org>",
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        "X-Received": "by 10.28.142.147 with SMTP id q141mr3963618wmd.155.1505914784022;\n\tWed, 20 Sep 2017 06:39:44 -0700 (PDT)",
        "From": "Jerome Brunet <jbrunet@baylibre.com>",
        "To": "Linus Walleij <linus.walleij@linaro.org>,\n\tKevin Hilman <khilman@baylibre.com>, Carlo Caione <carlo@caione.org>",
        "Cc": "Jerome Brunet <jbrunet@baylibre.com>, linux-gpio@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tMartin Blumenstingl <martin.blumenstingl@googlemail.com>",
        "Subject": "[PATCH 7/8] pinctrl: meson-gx: TEST_N belongs to the AO controller",
        "Date": "Wed, 20 Sep 2017 15:39:26 +0200",
        "Message-Id": "<20170920133927.17390-8-jbrunet@baylibre.com>",
        "X-Mailer": "git-send-email 2.13.5",
        "In-Reply-To": "<20170920133927.17390-1-jbrunet@baylibre.com>",
        "References": "<20170920133927.17390-1-jbrunet@baylibre.com>",
        "Sender": "linux-gpio-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-gpio.vger.kernel.org>",
        "X-Mailing-List": "linux-gpio@vger.kernel.org"
    },
    "content": "On meson-gx platforms, TEST_N has been incorrectly declared in the EE\ncontroller while it belongs to AO controller.\n\nMove the pin to the appropriate controller\n\nSigned-off-by: Jerome Brunet <jbrunet@baylibre.com>\n---\n drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 8 ++++----\n drivers/pinctrl/meson/pinctrl-meson-gxl.c  | 8 ++++----\n include/dt-bindings/gpio/meson-gxbb-gpio.h | 2 +-\n include/dt-bindings/gpio/meson-gxl-gpio.h  | 2 +-\n 4 files changed, 10 insertions(+), 10 deletions(-)",
    "diff": "diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c\nindex 8e0d6e4a31b4..1305d68b0954 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c\n@@ -141,8 +141,6 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = {\n \tMESON_PIN(GPIOCLK_1),\n \tMESON_PIN(GPIOCLK_2),\n \tMESON_PIN(GPIOCLK_3),\n-\n-\tMESON_PIN(GPIO_TEST_N),\n };\n \n static const unsigned int emmc_nand_d07_pins[] = {\n@@ -258,6 +256,8 @@ static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = {\n \tMESON_PIN(GPIOAO_11),\n \tMESON_PIN(GPIOAO_12),\n \tMESON_PIN(GPIOAO_13),\n+\n+\tMESON_PIN(GPIO_TEST_N),\n };\n \n static const unsigned int uart_tx_ao_a_pins[]\t= { GPIOAO_0 };\n@@ -596,8 +596,6 @@ static const char * const gpio_periphs_groups[] = {\n \t\"GPIOX_10\", \"GPIOX_11\", \"GPIOX_12\", \"GPIOX_13\", \"GPIOX_14\",\n \t\"GPIOX_15\", \"GPIOX_16\", \"GPIOX_17\", \"GPIOX_18\", \"GPIOX_19\",\n \t\"GPIOX_20\", \"GPIOX_21\", \"GPIOX_22\",\n-\n-\t\"GPIO_TEST_N\",\n };\n \n static const char * const emmc_groups[] = {\n@@ -706,6 +704,8 @@ static const char * const gpio_aobus_groups[] = {\n \t\"GPIOAO_0\", \"GPIOAO_1\", \"GPIOAO_2\", \"GPIOAO_3\", \"GPIOAO_4\",\n \t\"GPIOAO_5\", \"GPIOAO_6\", \"GPIOAO_7\", \"GPIOAO_8\", \"GPIOAO_9\",\n \t\"GPIOAO_10\", \"GPIOAO_11\", \"GPIOAO_12\", \"GPIOAO_13\",\n+\n+\t\"GPIO_TEST_N\",\n };\n \n static const char * const uart_ao_groups[] = {\ndiff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c\nindex 0d90ddab6ddd..04334e807170 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c\n@@ -122,8 +122,6 @@ static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = {\n \n \tMESON_PIN(GPIOCLK_0),\n \tMESON_PIN(GPIOCLK_1),\n-\n-\tMESON_PIN(GPIO_TEST_N),\n };\n \n static const unsigned int emmc_nand_d07_pins[] = {\n@@ -263,6 +261,8 @@ static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = {\n \tMESON_PIN(GPIOAO_7),\n \tMESON_PIN(GPIOAO_8),\n \tMESON_PIN(GPIOAO_9),\n+\n+\tMESON_PIN(GPIO_TEST_N),\n };\n \n static const unsigned int uart_tx_ao_a_pins[]\t= { GPIOAO_0 };\n@@ -587,8 +587,6 @@ static const char * const gpio_periphs_groups[] = {\n \t\"GPIOX_5\", \"GPIOX_6\", \"GPIOX_7\", \"GPIOX_8\", \"GPIOX_9\",\n \t\"GPIOX_10\", \"GPIOX_11\", \"GPIOX_12\", \"GPIOX_13\", \"GPIOX_14\",\n \t\"GPIOX_15\", \"GPIOX_16\", \"GPIOX_17\", \"GPIOX_18\",\n-\n-\t\"GPIO_TEST_N\",\n };\n \n static const char * const emmc_groups[] = {\n@@ -703,6 +701,8 @@ static const char * const tsin_a_groups[] = {\n static const char * const gpio_aobus_groups[] = {\n \t\"GPIOAO_0\", \"GPIOAO_1\", \"GPIOAO_2\", \"GPIOAO_3\", \"GPIOAO_4\",\n \t\"GPIOAO_5\", \"GPIOAO_6\", \"GPIOAO_7\", \"GPIOAO_8\", \"GPIOAO_9\",\n+\n+\t\"GPIO_TEST_N\",\n };\n \n static const char * const uart_ao_groups[] = {\ndiff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h\nindex 58654fd7aa1e..43a68a1110f0 100644\n--- a/include/dt-bindings/gpio/meson-gxbb-gpio.h\n+++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h\n@@ -29,6 +29,7 @@\n #define\tGPIOAO_11\t11\n #define\tGPIOAO_12\t12\n #define\tGPIOAO_13\t13\n+#define\tGPIO_TEST_N\t14\n \n #define\tGPIOZ_0\t\t0\n #define\tGPIOZ_1\t\t1\n@@ -149,6 +150,5 @@\n #define\tGPIOCLK_1\t116\n #define\tGPIOCLK_2\t117\n #define\tGPIOCLK_3\t118\n-#define\tGPIO_TEST_N\t119\n \n #endif\ndiff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h\nindex 684d0d7add1c..01f2a2abd35e 100644\n--- a/include/dt-bindings/gpio/meson-gxl-gpio.h\n+++ b/include/dt-bindings/gpio/meson-gxl-gpio.h\n@@ -25,6 +25,7 @@\n #define\tGPIOAO_7\t7\n #define\tGPIOAO_8\t8\n #define\tGPIOAO_9\t9\n+#define\tGPIO_TEST_N\t10\n \n #define\tGPIOZ_0\t\t0\n #define\tGPIOZ_1\t\t1\n@@ -126,6 +127,5 @@\n #define\tGPIOX_18\t97\n #define\tGPIOCLK_0\t98\n #define\tGPIOCLK_1\t99\n-#define\tGPIO_TEST_N\t100\n \n #endif\n",
    "prefixes": [
        "7/8"
    ]
}