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GET /api/patches/816144/?format=api
{ "id": 816144, "url": "http://patchwork.ozlabs.org/api/patches/816144/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-9-git-send-email-linyunsheng@huawei.com/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505904778-53217-9-git-send-email-linyunsheng@huawei.com>", "list_archive_url": null, "date": "2017-09-20T10:52:57", "name": "[net,8/9] net: hns3: Fix for setting rss_size incorrectly", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3fe554926e3c244a040d0a904ce56586ca652548", "submitter": { "id": 71804, "url": "http://patchwork.ozlabs.org/api/people/71804/?format=api", "name": "Yunsheng Lin", "email": "linyunsheng@huawei.com" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-9-git-send-email-linyunsheng@huawei.com/mbox/", "series": [ { "id": 4080, "url": "http://patchwork.ozlabs.org/api/series/4080/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=4080", "date": "2017-09-20T10:52:53", "name": "TM related bugfixes for the HNS3 Ethernet Driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/4080/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/816144/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/816144/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxxV36j4Lz9s7c\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 20 Sep 2017 20:55:23 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752055AbdITKye (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tWed, 20 Sep 2017 06:54:34 -0400", "from szxga04-in.huawei.com ([45.249.212.190]:6507 \"EHLO\n\tszxga04-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751929AbdITKx1 (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Wed, 20 Sep 2017 06:53:27 -0400", "from 172.30.72.59 (EHLO DGGEMS407-HUB.china.huawei.com)\n\t([172.30.72.59])\n\tby dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHP73805; Wed, 20 Sep 2017 18:53:24 +0800 (CST)", "from localhost.localdomain (10.67.212.75) by\n\tDGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP\n\tServer id 14.3.301.0; Wed, 20 Sep 2017 18:53:15 +0800" ], "From": "Yunsheng Lin <linyunsheng@huawei.com>", "To": "<davem@davemloft.net>", "CC": "<huangdaode@hisilicon.com>, <xuwei5@hisilicon.com>,\n\t<liguozhu@hisilicon.com>, <Yisen.Zhuang@huawei.com>,\n\t<gabriele.paoloni@huawei.com>, <john.garry@huawei.com>,\n\t<linuxarm@huawei.com>, <yisen.zhuang@huawei.com>,\n\t<salil.mehta@huawei.com>, <lipeng321@huawei.com>,\n\t<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>", "Subject": "[PATCH net 8/9] net: hns3: Fix for setting rss_size incorrectly", "Date": "Wed, 20 Sep 2017 18:52:57 +0800", "Message-ID": "<1505904778-53217-9-git-send-email-linyunsheng@huawei.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>", "References": "<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.67.212.75]", "X-CFilter-Loop": "Reflected", "X-Mirapoint-Virus-RAPID-Raw": "score=unknown(0),\n\trefid=str=0001.0A0B0207.59C248A5.002E, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32", "X-Mirapoint-Loop-Id": "975ff73a17e1840b6d677c9cafc1b297", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "rss_size is 1, 2, 4, 8, 16, 32, 64, 128, but acutal tc queue\nsize can be any u16 less than 128. If tc queue size is 5, we\nset the rss_size to 8, indirection table will be used to limit\nthe size of actual queue size.\nIt may cause dropping of receiving packet in hardware if\nrss_size is not set correctly.\nFor now, each TC has the same rss size.\n\nFixes: 46a3df9f9718 (\"net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support\")\nSigned-off-by: Yunsheng Lin <linyunsheng@huawei.com>\n---\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 76 ++++++++++------------\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 1 +\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 1 +\n 3 files changed, 38 insertions(+), 40 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex 1e15ce1..d27618b 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -2606,6 +2606,7 @@ static int hclge_rss_init_hw(struct hclge_dev *hdev)\n \tu16 tc_valid[HCLGE_MAX_TC_NUM];\n \tu16 tc_size[HCLGE_MAX_TC_NUM];\n \tu32 *rss_indir = NULL;\n+\tu16 rss_size = 0, roundup_size;\n \tconst u8 *key;\n \tint i, ret, j;\n \n@@ -2620,7 +2621,13 @@ static int hclge_rss_init_hw(struct hclge_dev *hdev)\n \tfor (j = 0; j < hdev->num_vmdq_vport + 1; j++) {\n \t\tfor (i = 0; i < HCLGE_RSS_IND_TBL_SIZE; i++) {\n \t\t\tvport[j].rss_indirection_tbl[i] =\n-\t\t\t\ti % hdev->rss_size_max;\n+\t\t\t\ti % vport[j].alloc_rss_size;\n+\n+\t\t\t/* vport 0 is for PF */\n+\t\t\tif (j != 0)\n+\t\t\t\tcontinue;\n+\n+\t\t\trss_size = vport[j].alloc_rss_size;\n \t\t\trss_indir[i] = vport[j].rss_indirection_tbl[i];\n \t\t}\n \t}\n@@ -2637,42 +2644,31 @@ static int hclge_rss_init_hw(struct hclge_dev *hdev)\n \tif (ret)\n \t\tgoto err;\n \n+\t/* Each TC have the same queue size, and tc_size set to hardware is\n+\t * the log2 of roundup power of two of rss_size, the acutal queue\n+\t * size is limited by indirection table.\n+\t */\n+\tif (rss_size > HCLGE_RSS_TC_SIZE_7 || rss_size == 0) {\n+\t\tdev_err(&hdev->pdev->dev,\n+\t\t\t\"Configure rss tc size failed, invalid TC_SIZE = %d\\n\",\n+\t\t\trss_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\troundup_size = roundup_pow_of_two(rss_size);\n+\troundup_size = ilog2(roundup_size);\n+\n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n-\t\tif (hdev->hw_tc_map & BIT(i))\n-\t\t\ttc_valid[i] = 1;\n-\t\telse\n-\t\t\ttc_valid[i] = 0;\n+\t\ttc_valid[i] = 0;\n \n-\t\tswitch (hdev->rss_size_max) {\n-\t\tcase HCLGE_RSS_TC_SIZE_0:\n-\t\t\ttc_size[i] = 0;\n-\t\t\tbreak;\n-\t\tcase HCLGE_RSS_TC_SIZE_1:\n-\t\t\ttc_size[i] = 1;\n-\t\t\tbreak;\n-\t\tcase HCLGE_RSS_TC_SIZE_2:\n-\t\t\ttc_size[i] = 2;\n-\t\t\tbreak;\n-\t\tcase HCLGE_RSS_TC_SIZE_3:\n-\t\t\ttc_size[i] = 3;\n-\t\t\tbreak;\n-\t\tcase HCLGE_RSS_TC_SIZE_4:\n-\t\t\ttc_size[i] = 4;\n-\t\t\tbreak;\n-\t\tcase HCLGE_RSS_TC_SIZE_5:\n-\t\t\ttc_size[i] = 5;\n-\t\t\tbreak;\n-\t\tcase HCLGE_RSS_TC_SIZE_6:\n-\t\t\ttc_size[i] = 6;\n-\t\t\tbreak;\n-\t\tcase HCLGE_RSS_TC_SIZE_7:\n-\t\t\ttc_size[i] = 7;\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tbreak;\n-\t\t}\n-\t\ttc_offset[i] = hdev->rss_size_max * i;\n+\t\tif (!(hdev->hw_tc_map & BIT(i)))\n+\t\t\tcontinue;\n+\n+\t\ttc_valid[i] = 1;\n+\t\ttc_size[i] = roundup_size;\n+\t\ttc_offset[i] = rss_size * i;\n \t}\n+\n \tret = hclge_set_rss_tc_mode(hdev, tc_valid, tc_size, tc_offset);\n \n err:\n@@ -4166,12 +4162,6 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)\n \t\treturn ret;\n \t}\n \n-\tret = hclge_rss_init_hw(hdev);\n-\tif (ret) {\n-\t\tdev_err(&pdev->dev, \"Rss init fail, ret =%d\\n\", ret);\n-\t\treturn ret;\n-\t}\n-\n \tret = hclge_init_vlan_config(hdev);\n \tif (ret) {\n \t\tdev_err(&pdev->dev, \"VLAN init fail, ret =%d\\n\", ret);\n@@ -4184,6 +4174,12 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)\n \t\treturn ret;\n \t}\n \n+\tret = hclge_rss_init_hw(hdev);\n+\tif (ret) {\n+\t\tdev_err(&pdev->dev, \"Rss init fail, ret =%d\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n \tsetup_timer(&hdev->service_timer, hclge_service_timer,\n \t\t (unsigned long)hdev);\n \tINIT_WORK(&hdev->service_task, hclge_service_task);\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\nindex edb10ad..7f8dd12 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n@@ -477,6 +477,7 @@ struct hclge_vport {\n \tu8 rss_hash_key[HCLGE_RSS_KEY_SIZE]; /* User configured hash keys */\n \t/* User configured lookup table entries */\n \tu8 rss_indirection_tbl[HCLGE_RSS_IND_TBL_SIZE];\n+\tu16 alloc_rss_size;\n \n \tu16 qs_offset;\n \tu16 bw_limit;\t\t/* VSI BW Limit (0 = disabled) */\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\nindex fe659f7..b7ba7aa 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n@@ -397,6 +397,7 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport)\n \t\t\tkinfo->num_tqps / kinfo->num_tc);\n \tvport->qs_offset = hdev->tm_info.num_tc * vport->vport_id;\n \tvport->dwrr = 100; /* 100 percent as init */\n+\tvport->alloc_rss_size = kinfo->rss_size;\n \n \tfor (i = 0; i < kinfo->num_tc; i++) {\n \t\tif (hdev->hw_tc_map & BIT(i)) {\n", "prefixes": [ "net", "8/9" ] }