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{
    "id": 816138,
    "url": "http://patchwork.ozlabs.org/api/patches/816138/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-5-git-send-email-linyunsheng@huawei.com/",
    "project": {
        "id": 7,
        "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api",
        "name": "Linux network development",
        "link_name": "netdev",
        "list_id": "netdev.vger.kernel.org",
        "list_email": "netdev@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1505904778-53217-5-git-send-email-linyunsheng@huawei.com>",
    "list_archive_url": null,
    "date": "2017-09-20T10:52:53",
    "name": "[net,4/9] net: hns3: Fix for not setting rx private buffer size to zero",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "19b29f423b6c603ec47ecfa9800bb8f5937512e0",
    "submitter": {
        "id": 71804,
        "url": "http://patchwork.ozlabs.org/api/people/71804/?format=api",
        "name": "Yunsheng Lin",
        "email": "linyunsheng@huawei.com"
    },
    "delegate": {
        "id": 34,
        "url": "http://patchwork.ozlabs.org/api/users/34/?format=api",
        "username": "davem",
        "first_name": "David",
        "last_name": "Miller",
        "email": "davem@davemloft.net"
    },
    "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-5-git-send-email-linyunsheng@huawei.com/mbox/",
    "series": [
        {
            "id": 4080,
            "url": "http://patchwork.ozlabs.org/api/series/4080/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=4080",
            "date": "2017-09-20T10:52:53",
            "name": "TM related bugfixes for the HNS3 Ethernet Driver",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/4080/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/816138/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/816138/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<netdev-owner@vger.kernel.org>",
        "X-Original-To": "patchwork-incoming@ozlabs.org",
        "Delivered-To": "patchwork-incoming@ozlabs.org",
        "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxxSM1VwZz9sNw\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 20 Sep 2017 20:53:55 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752013AbdITKxk (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tWed, 20 Sep 2017 06:53:40 -0400",
            "from szxga04-in.huawei.com ([45.249.212.190]:6509 \"EHLO\n\tszxga04-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751951AbdITKx1 (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Wed, 20 Sep 2017 06:53:27 -0400",
            "from 172.30.72.59 (EHLO DGGEMS407-HUB.china.huawei.com)\n\t([172.30.72.59])\n\tby dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHP73808; Wed, 20 Sep 2017 18:53:25 +0800 (CST)",
            "from localhost.localdomain (10.67.212.75) by\n\tDGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP\n\tServer id 14.3.301.0; Wed, 20 Sep 2017 18:53:13 +0800"
        ],
        "From": "Yunsheng Lin <linyunsheng@huawei.com>",
        "To": "<davem@davemloft.net>",
        "CC": "<huangdaode@hisilicon.com>, <xuwei5@hisilicon.com>,\n\t<liguozhu@hisilicon.com>, <Yisen.Zhuang@huawei.com>,\n\t<gabriele.paoloni@huawei.com>, <john.garry@huawei.com>,\n\t<linuxarm@huawei.com>, <yisen.zhuang@huawei.com>,\n\t<salil.mehta@huawei.com>, <lipeng321@huawei.com>,\n\t<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>",
        "Subject": "[PATCH net 4/9] net: hns3: Fix for not setting rx private buffer\n\tsize to zero",
        "Date": "Wed, 20 Sep 2017 18:52:53 +0800",
        "Message-ID": "<1505904778-53217-5-git-send-email-linyunsheng@huawei.com>",
        "X-Mailer": "git-send-email 1.9.1",
        "In-Reply-To": "<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>",
        "References": "<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[10.67.212.75]",
        "X-CFilter-Loop": "Reflected",
        "X-Mirapoint-Virus-RAPID-Raw": "score=unknown(0),\n\trefid=str=0001.0A0B0205.59C248A5.00E8, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32",
        "X-Mirapoint-Loop-Id": "4c0ab72569ccf650657f7f5195f56ef6",
        "Sender": "netdev-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<netdev.vger.kernel.org>",
        "X-Mailing-List": "netdev@vger.kernel.org"
    },
    "content": "When rx private buffer is disabled, there may be some case that\nthe rx private buffer is not set to zero, which may cause buffer\nallocation process to fail.\nThis patch fixes this problem by setting priv->enable to 0 and\npriv->buf_size to zero when rx private buffer is disabled.\n\nFixes: 46a3df9f9718 (\"net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support\")\nSigned-off-by: Yunsheng Lin <linyunsheng@huawei.com>\n---\n drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 16 ++++++++++++++--\n 1 file changed, 14 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex 1876418..bf3179a 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -1504,6 +1504,11 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev, u32 tx_size)\n \t\t\t\tpriv->wl.high = 2 * hdev->mps;\n \t\t\t\tpriv->buf_size = priv->wl.high;\n \t\t\t}\n+\t\t} else {\n+\t\t\tpriv->enable = 0;\n+\t\t\tpriv->wl.low = 0;\n+\t\t\tpriv->wl.high = 0;\n+\t\t\tpriv->buf_size = 0;\n \t\t}\n \t}\n \n@@ -1516,8 +1521,15 @@ int hclge_rx_buffer_calc(struct hclge_dev *hdev, u32 tx_size)\n \tfor (i = 0; i < HCLGE_MAX_TC_NUM; i++) {\n \t\tpriv = &hdev->priv_buf[i];\n \n-\t\tif (hdev->hw_tc_map & BIT(i))\n-\t\t\tpriv->enable = 1;\n+\t\tpriv->enable = 0;\n+\t\tpriv->wl.low = 0;\n+\t\tpriv->wl.high = 0;\n+\t\tpriv->buf_size = 0;\n+\n+\t\tif (!(hdev->hw_tc_map & BIT(i)))\n+\t\t\tcontinue;\n+\n+\t\tpriv->enable = 1;\n \n \t\tif (hdev->tm_info.hw_pfc_map & BIT(i)) {\n \t\t\tpriv->wl.low = 128;\n",
    "prefixes": [
        "net",
        "4/9"
    ]
}