Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/816087/?format=api
{ "id": 816087, "url": "http://patchwork.ozlabs.org/api/patches/816087/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170920071512.19522-6-bsingharora@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170920071512.19522-6-bsingharora@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170920071512.19522-6-bsingharora@gmail.com/", "date": "2017-09-20T07:15:12", "name": "[v3,5/5] powerpc/mce: hookup memory_failure for UE errors", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "82a709fd6612e85085950288a1957b8efc846f8e", "submitter": { "id": 9347, "url": "http://patchwork.ozlabs.org/api/people/9347/?format=api", "name": "Balbir Singh", "email": "bsingharora@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170920071512.19522-6-bsingharora@gmail.com/mbox/", "series": [ { "id": 4046, "url": "http://patchwork.ozlabs.org/api/series/4046/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=4046", "date": "2017-09-20T07:15:07", "name": "Revisit MCE handling for UE Errors", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/4046/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/816087/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/816087/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxrsT1zWpz9s81\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 20 Sep 2017 17:26:53 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xxrsT0r0VzDqYP\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 20 Sep 2017 17:26:53 +1000 (AEST)", "from mail-pf0-x242.google.com (mail-pf0-x242.google.com\n\t[IPv6:2607:f8b0:400e:c00::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xxrcX6h6lzDqXw\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tWed, 20 Sep 2017 17:15:40 +1000 (AEST)", "by mail-pf0-x242.google.com with SMTP id e69so870692pfg.4\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tWed, 20 Sep 2017 00:15:40 -0700 (PDT)", "from firefly.ozlabs.ibm.com.ozlabs.ibm.com ([122.99.82.10])\n\tby smtp.gmail.com with ESMTPSA id\n\ts68sm7482771pfd.72.2017.09.20.00.15.36\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tWed, 20 Sep 2017 00:15:38 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"M2aIawEP\"; dkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"M2aIawEP\"; dkim-atps=neutral", "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400e:c00::242; helo=mail-pf0-x242.google.com;\n\tenvelope-from=bsingharora@gmail.com; receiver=<UNKNOWN>)", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"M2aIawEP\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=cECGM+0G/4eADdQdhvO66cUnmE3FepoBp80aqCAg8s0=;\n\tb=M2aIawEPlrhnPeyB0Qu+QU9Ak4++Bxl1fDofr0EegpDwpSmFcaxCRYets0TetkUORZ\n\tprTka7IGrX0mUXdsDOYV030jU97yykhJyADP87ejRhmLedQwlOcFoNy6vXGF0ua6VQ+G\n\tCOwo/n5ZhqY45Q/P4R3hxfTv2EoIgFtVSQYZC/0O8djZxCmS9knNL+V7MTt+MYo1q4Dq\n\tRg1nbr3RnZ2qHzTZZkJ9Zofp7nDg4AAJ9hwaP/qMd1r9NkRNFNslsYls2716yWpDBvb7\n\tQTbbHdTkQLXuM76XPn0YIwzutSSAWdN5UyL11qUNmsH4oDIip2r5pdjrJ/MhN+9OqlGZ\n\tJmzA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=cECGM+0G/4eADdQdhvO66cUnmE3FepoBp80aqCAg8s0=;\n\tb=hMJQyeTBPSDUCoRA0BTTXZUpv/11+0PR8j35/CEeMNPMlZyZi4RkKj05yfRsKz0W7S\n\tGDyEddwGKKU7AlmkHcJtF2YRwz7rgzatCDTPpOw+7HhosVWN1jRqTXBuu7RrcBDp5Xl+\n\t6Zj7trX36jlX3HgBFveMDejFanKA5nbFuvqcuuCXVGfr5VfdO2pnwd94IW8RQ54ehhBw\n\tRi0KpBA7oA9efKp9JqO7dZwza6iHc4GwEyhBZJR2Vpp4XRMulrDZ+kuG36XOK0H2z6++\n\tCuvb5TMiPT+taFOlH2hnQM9YbS7gCx/FfP7dsLKBohljt7kWPR2HY5uXsj6575YIBXL8\n\trFIg==", "X-Gm-Message-State": "AHPjjUhSN5/ouUfJXBm40DDapqG5JNP3DSYyKgoH/UKG+qAVvnfCKTGw\n\tCWAU7vWHF4QsgEfF2SfcauZepQ==", "X-Google-Smtp-Source": "AOwi7QDUKLidMf8XYEpTdpBrrQ+K1e98J7rkltQajznjwysRuNO83K6DRTWe8BJ2F+wrf5nOnk9Kkg==", "X-Received": "by 10.84.240.196 with SMTP id l4mr1147621plt.399.1505891738873; \n\tWed, 20 Sep 2017 00:15:38 -0700 (PDT)", "From": "Balbir Singh <bsingharora@gmail.com>", "To": "mpe@ellerman.id.au", "Subject": "[PATCH v3 5/5] powerpc/mce: hookup memory_failure for UE errors", "Date": "Wed, 20 Sep 2017 17:15:12 +1000", "Message-Id": "<20170920071512.19522-6-bsingharora@gmail.com>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20170920071512.19522-1-bsingharora@gmail.com>", "References": "<20170920071512.19522-1-bsingharora@gmail.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "mahesh@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org,\n\tnpiggin@gmail.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "If we are in user space and hit a UE error, we now have the\nbasic infrastructure to walk the page tables and find out\nthe effective address that was accessed, since the DAR\nis not valid.\n\nWe use a work_queue content to hookup the bad pfn, any\nother context causes problems, since memory_failure itself\ncan call into schedule() via lru_drain_ bits.\n\nWe could probably poison the struct page to avoid a race\nbetween detection and taking corrective action.\n\nSigned-off-by: Balbir Singh <bsingharora@gmail.com>\n---\n arch/powerpc/kernel/mce.c | 67 ++++++++++++++++++++++++++++++++++++++++++++---\n 1 file changed, 64 insertions(+), 3 deletions(-)", "diff": "diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c\nindex c7acc33..f20345a 100644\n--- a/arch/powerpc/kernel/mce.c\n+++ b/arch/powerpc/kernel/mce.c\n@@ -39,11 +39,21 @@ static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], mce_event);\n static DEFINE_PER_CPU(int, mce_queue_count);\n static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], mce_event_queue);\n \n+/* Queue for delayed MCE UE events. */\n+static DEFINE_PER_CPU(int, mce_ue_count);\n+static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT],\n+\t\t\t\t\tmce_ue_event_queue);\n+\n static void machine_check_process_queued_event(struct irq_work *work);\n+void machine_check_ue_event(struct machine_check_event *evt);\n+static void machine_process_ue_event(struct work_struct *work);\n+\n static struct irq_work mce_event_process_work = {\n .func = machine_check_process_queued_event,\n };\n \n+DECLARE_WORK(mce_ue_event_work, machine_process_ue_event);\n+\n static void mce_set_error_info(struct machine_check_event *mce,\n \t\t\t struct mce_error_info *mce_err)\n {\n@@ -143,6 +153,7 @@ void save_mce_event(struct pt_regs *regs, long handled,\n \t\tif (phys_addr != ULONG_MAX) {\n \t\t\tmce->u.ue_error.physical_address_provided = true;\n \t\t\tmce->u.ue_error.physical_address = phys_addr;\n+\t\t\tmachine_check_ue_event(mce);\n \t\t}\n \t}\n \treturn;\n@@ -197,6 +208,26 @@ void release_mce_event(void)\n \tget_mce_event(NULL, true);\n }\n \n+\n+/*\n+ * Queue up the MCE event which then can be handled later.\n+ */\n+void machine_check_ue_event(struct machine_check_event *evt)\n+{\n+\tint index;\n+\n+\tindex = __this_cpu_inc_return(mce_ue_count) - 1;\n+\t/* If queue is full, just return for now. */\n+\tif (index >= MAX_MC_EVT) {\n+\t\t__this_cpu_dec(mce_ue_count);\n+\t\treturn;\n+\t}\n+\tmemcpy(this_cpu_ptr(&mce_ue_event_queue[index]), evt, sizeof(*evt));\n+\n+\t/* Queue work to process this event later. */\n+\tschedule_work(&mce_ue_event_work);\n+}\n+\n /*\n * Queue up the MCE event which then can be handled later.\n */\n@@ -219,7 +250,36 @@ void machine_check_queue_event(void)\n \t/* Queue irq work to process this event later. */\n \tirq_work_queue(&mce_event_process_work);\n }\n-\n+/*\n+ * process pending MCE event from the mce event queue. This function will be\n+ * called during syscall exit.\n+ */\n+static void machine_process_ue_event(struct work_struct *work)\n+{\n+\tint index;\n+\tstruct machine_check_event *evt;\n+\n+\twhile (__this_cpu_read(mce_ue_count) > 0) {\n+\t\tindex = __this_cpu_read(mce_ue_count) - 1;\n+\t\tevt = this_cpu_ptr(&mce_ue_event_queue[index]);\n+#ifdef CONFIG_MEMORY_FAILURE\n+\t\t/*\n+\t\t * This should probably queued elsewhere, but\n+\t\t * oh! well\n+\t\t */\n+\t\tif (evt->error_type == MCE_ERROR_TYPE_UE) {\n+\t\t\tif (evt->u.ue_error.physical_address_provided)\n+\t\t\t\tmemory_failure(evt->u.ue_error.physical_address,\n+\t\t\t\t\t\tSIGBUS, 0);\n+\t\t\telse\n+\t\t\t\tpr_warn(\"Failed to identify bad address from \"\n+\t\t\t\t\t\"where the uncorrectable error (UE) \"\n+\t\t\t\t\t\"was generated\\n\");\n+\t\t}\n+#endif\n+\t\t__this_cpu_dec(mce_ue_count);\n+\t}\n+}\n /*\n * process pending MCE event from the mce event queue. This function will be\n * called during syscall exit.\n@@ -227,6 +287,7 @@ void machine_check_queue_event(void)\n static void machine_check_process_queued_event(struct irq_work *work)\n {\n \tint index;\n+\tstruct machine_check_event *evt;\n \n \tadd_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);\n \n@@ -236,8 +297,8 @@ static void machine_check_process_queued_event(struct irq_work *work)\n \t */\n \twhile (__this_cpu_read(mce_queue_count) > 0) {\n \t\tindex = __this_cpu_read(mce_queue_count) - 1;\n-\t\tmachine_check_print_event_info(\n-\t\t\t\tthis_cpu_ptr(&mce_event_queue[index]), false);\n+\t\tevt = this_cpu_ptr(&mce_event_queue[index]);\n+\t\tmachine_check_print_event_info(evt, false);\n \t\t__this_cpu_dec(mce_queue_count);\n \t}\n }\n", "prefixes": [ "v3", "5/5" ] }