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GET /api/patches/815391/?format=api
{ "id": 815391, "url": "http://patchwork.ozlabs.org/api/patches/815391/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170919092658.22482-2-Zhiqiang.Hou@nxp.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170919092658.22482-2-Zhiqiang.Hou@nxp.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170919092658.22482-2-Zhiqiang.Hou@nxp.com/", "date": "2017-09-19T09:26:54", "name": "[1/5] irqchip/ls-scfg-msi: add LS1012a MSI support", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "158023555fe9f724b8f06ed2f53697a8d6d00eea", "submitter": { "id": 67929, "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api", "name": "Z.Q. Hou", "email": "zhiqiang.hou@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170919092658.22482-2-Zhiqiang.Hou@nxp.com/mbox/", "series": [ { "id": 3817, "url": "http://patchwork.ozlabs.org/api/series/3817/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=3817", "date": "2017-09-19T09:26:53", "name": "arm64: add ls1012a and ls1046a pcie support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/3817/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/815391/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/815391/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxJ2Y5NtPz9s7F\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 19:47:49 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xxJ2Y3rWyzDqbZ\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 19:47:49 +1000 (AEST)", "from NAM02-CY1-obe.outbound.protection.outlook.com\n\t(mail-cys01nam02on0053.outbound.protection.outlook.com\n\t[104.47.37.53])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xxHyn2hG3zDq8f\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 19 Sep 2017 19:44:32 +1000 (AEST)", "from BN6PR03CA0013.namprd03.prod.outlook.com (10.168.230.151) by\n\tDM5SPR00MB235.namprd03.prod.outlook.com (10.173.215.23) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.56.11; 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\n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Zhiqiang Hou <Zhiqiang.Hou@nxp.com>", "To": "<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-pci@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, \n\t<linuxppc-dev@lists.ozlabs.org>, <marc.zyngier@arm.com>,\n\t<robh+dt@kernel.org>, <mark.rutland@arm.com>, <bhelgaas@google.com>, \n\t<shawnguo@kernel.org>, <Mingkai.Hu@nxp.com>, <Minghuan.Lian@nxp.com>, \n\t<roy.zang@nxp.com>", "Subject": "[PATCH 1/5] irqchip/ls-scfg-msi: add LS1012a MSI support", "Date": "Tue, 19 Sep 2017 17:26:54 +0800", "Message-ID": "<20170919092658.22482-2-Zhiqiang.Hou@nxp.com>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>", "References": "<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131502878686006985;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:DM5SPR00MB235; ", "X-Forefront-PRVS": "04359FAD81", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "19 Sep 2017 09:44:28.3354\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM5SPR00MB235", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Hou Zhiqiang <Zhiqiang.Hou@nxp.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n\nThe ls1012a implement only 1 msi controller, and it is the same as\nls1043a.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n---\n .../devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt | 1 +\n drivers/irqchip/irq-ls-scfg-msi.c | 1 +\n 2 files changed, 2 insertions(+)", "diff": "diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt\nindex 49ccabbfa6f3..a4ff93d6b7f3 100644\n--- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt\n+++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt\n@@ -8,6 +8,7 @@ Required properties:\n \"fsl,ls1043a-msi\"\n \"fsl,ls1046a-msi\"\n \"fsl,ls1043a-v1.1-msi\"\n+ \"fsl,ls1012a-msi\"\n - msi-controller: indicates that this is a PCIe MSI controller node\n - reg: physical base address of the controller and length of memory mapped.\n - interrupts: an interrupt to the parent interrupt controller.\ndiff --git a/drivers/irqchip/irq-ls-scfg-msi.c b/drivers/irqchip/irq-ls-scfg-msi.c\nindex 119f4ef0d421..57e3d900f19e 100644\n--- a/drivers/irqchip/irq-ls-scfg-msi.c\n+++ b/drivers/irqchip/irq-ls-scfg-msi.c\n@@ -316,6 +316,7 @@ static const struct of_device_id ls_scfg_msi_id[] = {\n \t{ .compatible = \"fsl,1s1021a-msi\", .data = &ls1021_msi_cfg},\n \t{ .compatible = \"fsl,1s1043a-msi\", .data = &ls1021_msi_cfg},\n \n+\t{ .compatible = \"fsl,ls1012a-msi\", .data = &ls1021_msi_cfg },\n \t{ .compatible = \"fsl,ls1021a-msi\", .data = &ls1021_msi_cfg },\n \t{ .compatible = \"fsl,ls1043a-msi\", .data = &ls1021_msi_cfg },\n \t{ .compatible = \"fsl,ls1043a-v1.1-msi\", .data = &ls1043_v1_1_msi_cfg },\n", "prefixes": [ "1/5" ] }