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GET /api/patches/815338/?format=api
{ "id": 815338, "url": "http://patchwork.ozlabs.org/api/patches/815338/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20170919080020.5870-8-jiri@resnulli.us/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170919080020.5870-8-jiri@resnulli.us>", "list_archive_url": null, "date": "2017-09-19T08:00:14", "name": "[net-next,07/13] mlxsw: reg: Add the Router Interface Group Version 2 register", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4419eec4614c6659222ead319323c638acff08e7", "submitter": { "id": 15321, "url": "http://patchwork.ozlabs.org/api/people/15321/?format=api", "name": "Jiri Pirko", "email": "jiri@resnulli.us" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20170919080020.5870-8-jiri@resnulli.us/mbox/", "series": [ { "id": 3798, "url": "http://patchwork.ozlabs.org/api/series/3798/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=3798", "date": "2017-09-19T08:00:07", "name": "mlxsw: Prepare for multicast router offload", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/3798/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/815338/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/815338/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=resnulli-us.20150623.gappssmtp.com\n\theader.i=@resnulli-us.20150623.gappssmtp.com\n\theader.b=\"zwnFYRUh\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxFg16yDtz9s7M\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 18:00:45 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751676AbdISIAn (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tTue, 19 Sep 2017 04:00:43 -0400", "from mail-wm0-f67.google.com ([74.125.82.67]:37588 \"EHLO\n\tmail-wm0-f67.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751606AbdISIA3 (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Tue, 19 Sep 2017 04:00:29 -0400", "by mail-wm0-f67.google.com with SMTP id f4so3039763wmh.4\n\tfor <netdev@vger.kernel.org>; Tue, 19 Sep 2017 01:00:29 -0700 (PDT)", "from localhost (ip-89-177-125-82.net.upcbroadband.cz.\n\t[89.177.125.82]) by smtp.gmail.com with ESMTPSA id\n\t63sm887380wmm.18.2017.09.19.01.00.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tTue, 19 Sep 2017 01:00:28 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=resnulli-us.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=ml6WH5JX9nkmghji6C0m3IVxOb7kd7Wh/v/7s86sIYE=;\n\tb=zwnFYRUhFiOIID7Eh9R/VajpxYM8uJbmpUMGBUdKeVe7khxuyN8SPj+dQfHka3Ym7J\n\t686GlOCb9igXz0clHsBbeCmN8svPUx7G5gZGZppydBSjzFCZAF5laMewuNmLtzy/qIr/\n\taYCznN0TIApJSZ1624VqG4kFscddTYCSgRCTbGS/4j6an+sQtViHL+hnsQGuWxNnk6Nb\n\tOBz7HuGqcblCjCD5MC6KBIDfqzcXy6OSPgyc+/omDa53NcGitYGgA2mIwEIWTLt0aHe8\n\t/2YC4olQjhtzl+3keeLSLUfv26Pq/UKVcG5ge399Esxmryyq2jMhwlsivWYSFc91117y\n\tVJuQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=ml6WH5JX9nkmghji6C0m3IVxOb7kd7Wh/v/7s86sIYE=;\n\tb=hSrpU8e0HT81bGnF2ADHt5JQ9Hi7kuilN09NUdsKuSirAMqn6acxmcFkgNRfVJ1Ece\n\t60w3kKhTXM2wr6fJk/EGxcaTdDTKS5kmteeLT+APKoNfXnpdhRVxedFEDM8Pk14WDJGu\n\tEx1TRJV+dtI1BLdx9lfArOluBUQYejEngVjKD5cX2GP+LdJYxNqiwYizjZ99gcszGQDp\n\tcAkIfsKv799zc7d7sAPYQHQ965JizQC1WqA+1eyWtveNfu8ZLMt2Dqd6vlTdYtT5d5Ed\n\tRHHNU+nnSQ6n7iU4Sn/ySx8zhweyMV+3f3ocKMVSr4+MaWvqzNdJBWxOyOt1itkK5jlu\n\tAK3g==", "X-Gm-Message-State": "AHPjjUjgOxXraEgtU5NeuXCRAYGVEUIClgnztZIvrz/YAnbM91ogzWat\n\t3CTdm4ZzUY4M7dxv4j7p/v6ZNvws", "X-Google-Smtp-Source": "AOwi7QAkPGJ6Tl71T/a4KnUQ10UmYA+5lkK3hCQ1nH0Dki7GBvtygEGeSWM7RTnmLfRgc5Ea1uDcrQ==", "X-Received": "by 10.28.93.84 with SMTP id r81mr252457wmb.149.1505808028417;\n\tTue, 19 Sep 2017 01:00:28 -0700 (PDT)", "From": "Jiri Pirko <jiri@resnulli.us>", "To": "netdev@vger.kernel.org", "Cc": "davem@davemloft.net, yotamg@mellanox.com, idosch@mellanox.com,\n\tmlxsw@mellanox.com", "Subject": "[patch net-next 07/13] mlxsw: reg: Add the Router Interface Group\n\tVersion 2 register", "Date": "Tue, 19 Sep 2017 10:00:14 +0200", "Message-Id": "<20170919080020.5870-8-jiri@resnulli.us>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20170919080020.5870-1-jiri@resnulli.us>", "References": "<20170919080020.5870-1-jiri@resnulli.us>", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "From: Yotam Gigi <yotamg@mellanox.com>\n\nThe RIGR-V2 register is used to add, remove and query egress interface list\nof a multicast forwarding entry and it will be used by the multicast\nrouter offloading logic.\n\nSigned-off-by: Yotam Gigi <yotamg@mellanox.com>\nReviewed-by: Ido Schimmel <idosch@mellanox.com>\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>\n---\n drivers/net/ethernet/mellanox/mlxsw/reg.h | 83 +++++++++++++++++++++++++++++++\n 1 file changed, 83 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h\nindex e9f37ea..1778d7f 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h\n+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h\n@@ -5646,6 +5646,88 @@ mlxsw_reg_rtdp_ipip4_pack(char *payload, u16 irif,\n \tmlxsw_reg_rtdp_ipip_expected_gre_key_set(payload, expected_gre_key);\n }\n \n+/* RIGR-V2 - Router Interface Group Register Version 2\n+ * ---------------------------------------------------\n+ * The RIGR_V2 register is used to add, remove and query egress interface list\n+ * of a multicast forwarding entry.\n+ */\n+#define MLXSW_REG_RIGR2_ID 0x8023\n+#define MLXSW_REG_RIGR2_LEN 0xB0\n+\n+#define MLXSW_REG_RIGR2_MAX_ERIFS 32\n+\n+MLXSW_REG_DEFINE(rigr2, MLXSW_REG_RIGR2_ID, MLXSW_REG_RIGR2_LEN);\n+\n+/* reg_rigr2_rigr_index\n+ * KVD Linear index.\n+ * Access: Index\n+ */\n+MLXSW_ITEM32(reg, rigr2, rigr_index, 0x04, 0, 24);\n+\n+/* reg_rigr2_vnext\n+ * Next RIGR Index is valid.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rigr2, vnext, 0x08, 31, 1);\n+\n+/* reg_rigr2_next_rigr_index\n+ * Next RIGR Index. The index is to the KVD linear.\n+ * Reserved when vnxet = '0'.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rigr2, next_rigr_index, 0x08, 0, 24);\n+\n+/* reg_rigr2_vrmid\n+ * RMID Index is valid.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rigr2, vrmid, 0x20, 31, 1);\n+\n+/* reg_rigr2_rmid_index\n+ * RMID Index.\n+ * Range 0 .. max_mid - 1\n+ * Reserved when vrmid = '0'.\n+ * The index is to the Port Group Table (PGT)\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rigr2, rmid_index, 0x20, 0, 16);\n+\n+/* reg_rigr2_erif_entry_v\n+ * Egress Router Interface is valid.\n+ * Note that low-entries must be set if high-entries are set. For\n+ * example: if erif_entry[2].v is set then erif_entry[1].v and\n+ * erif_entry[0].v must be set.\n+ * Index can be from 0 to cap_mc_erif_list_entries-1\n+ * Access: RW\n+ */\n+MLXSW_ITEM32_INDEXED(reg, rigr2, erif_entry_v, 0x24, 31, 1, 4, 0, false);\n+\n+/* reg_rigr2_erif_entry_erif\n+ * Egress Router Interface.\n+ * Valid range is from 0 to cap_max_router_interfaces - 1\n+ * Index can be from 0 to MLXSW_REG_RIGR2_MAX_ERIFS - 1\n+ * Access: RW\n+ */\n+MLXSW_ITEM32_INDEXED(reg, rigr2, erif_entry_erif, 0x24, 0, 16, 4, 0, false);\n+\n+static inline void mlxsw_reg_rigr2_pack(char *payload, u32 rigr_index,\n+\t\t\t\t\tbool vnext, u32 next_rigr_index)\n+{\n+\tMLXSW_REG_ZERO(rigr2, payload);\n+\tmlxsw_reg_rigr2_rigr_index_set(payload, rigr_index);\n+\tmlxsw_reg_rigr2_vnext_set(payload, vnext);\n+\tmlxsw_reg_rigr2_next_rigr_index_set(payload, next_rigr_index);\n+\tmlxsw_reg_rigr2_vrmid_set(payload, 0);\n+\tmlxsw_reg_rigr2_rmid_index_set(payload, 0);\n+}\n+\n+static inline void mlxsw_reg_rigr2_erif_entry_pack(char *payload, int index,\n+\t\t\t\t\t\t bool v, u16 erif)\n+{\n+\tmlxsw_reg_rigr2_erif_entry_v_set(payload, index, v);\n+\tmlxsw_reg_rigr2_erif_entry_erif_set(payload, index, erif);\n+}\n+\n /* MFCR - Management Fan Control Register\n * --------------------------------------\n * This register controls the settings of the Fan Speed PWM mechanism.\n@@ -6917,6 +6999,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {\n \tMLXSW_REG(rauht),\n \tMLXSW_REG(raleu),\n \tMLXSW_REG(rauhtd),\n+\tMLXSW_REG(rigr2),\n \tMLXSW_REG(mfcr),\n \tMLXSW_REG(mfsc),\n \tMLXSW_REG(mfsm),\n", "prefixes": [ "net-next", "07/13" ] }