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GET /api/patches/815164/?format=api
{ "id": 815164, "url": "http://patchwork.ozlabs.org/api/patches/815164/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505767187-4596-5-git-send-email-roy.pledge@nxp.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1505767187-4596-5-git-send-email-roy.pledge@nxp.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1505767187-4596-5-git-send-email-roy.pledge@nxp.com/", "date": "2017-09-18T20:39:39", "name": "[v5,04/12] dt-bindings: soc/fsl: Update reserved memory binding for QBMan", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "995ff47ded786acd0bd92e5f085f6e9a8ae1fa2a", "submitter": { "id": 70252, "url": "http://patchwork.ozlabs.org/api/people/70252/?format=api", "name": "Roy Pledge", "email": "roy.pledge@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505767187-4596-5-git-send-email-roy.pledge@nxp.com/mbox/", "series": [ { "id": 3731, "url": "http://patchwork.ozlabs.org/api/series/3731/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=3731", "date": "2017-09-18T20:39:38", "name": "soc/fsl/qbman: Enable QBMan on ARM Platforms", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/3731/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/815164/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/815164/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xwyq83qkhz9s7m\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 06:51:48 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xwyq831JRzDqh5\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 06:51:48 +1000 (AEST)", "from NAM02-BL2-obe.outbound.protection.outlook.com\n\t(mail-bl2nam02on0050.outbound.protection.outlook.com [104.47.38.50])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xwyYX5bVDzDq5k\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 19 Sep 2017 06:40:00 +1000 (AEST)", "from BN6PR03CA0020.namprd03.prod.outlook.com (10.168.230.158) by\n\tBN3PR03MB2354.namprd03.prod.outlook.com (10.166.74.149) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.56.11; Mon, 18 Sep 2017 20:39:56 +0000", "from BL2FFO11FD014.protection.gbl (2a01:111:f400:7c09::111) by\n\tBN6PR03CA0020.outlook.office365.com (2603:10b6:404:23::30) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.56.9 via\n\tFrontend Transport; Mon, 18 Sep 2017 20:39:56 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBL2FFO11FD014.mail.protection.outlook.com (10.173.160.222) with\n\tMicrosoft\n\tSMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id\n\t15.20.35.14 via Frontend Transport; Mon, 18 Sep 2017 20:39:54 +0000", "from otc-sw1.am.freescale.net (otc-sw1.am.freescale.net\n\t[10.29.200.182])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv8IKdn2p025841; Mon, 18 Sep 2017 13:39:53 -0700" ], "Authentication-Results": [ "ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nxp.com\n\t(client-ip=104.47.38.50;\n\thelo=nam02-bl2-obe.outbound.protection.outlook.com; \n\tenvelope-from=roy.pledge@nxp.com; receiver=<UNKNOWN>)", "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;" ], "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Roy Pledge <roy.pledge@nxp.com>", "To": "<leoyang.li@nxp.com>, <linuxppc-dev@lists.ozlabs.org>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>,\n\t<devicetree@vger.kernel.org>", "Subject": "[v5 04/12] dt-bindings: soc/fsl: Update reserved memory binding for\n\tQBMan", "Date": "Mon, 18 Sep 2017 16:39:39 -0400", "Message-ID": "<1505767187-4596-5-git-send-email-roy.pledge@nxp.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1505767187-4596-1-git-send-email-roy.pledge@nxp.com>", "References": "<1505767187-4596-1-git-send-email-roy.pledge@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131502407950060792;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:BN3PR03MB2354; ", "X-Forefront-PRVS": "04347F8039", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "18 Sep 2017 20:39:54.7096\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN3PR03MB2354", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Reply-To": "roy.pledge@nxp.com", "Cc": "mark.rutland@arm.com, arnd@arndb.de, madalin.bucur@nxp.com,\n\tcatalin.marinas@arm.com, Roy Pledge <roy.pledge@nxp.com>,\n\tlinux@armlinux.org.uk, oss@buserror.net", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Updates the QMan and BMan device tree bindings for reserved memory\nnodes. This makes the reserved memory allocation compatible with\nthe shared-dma-pool usage.\n\nSigned-off-by: Roy Pledge <roy.pledge@nxp.com>\n---\n Documentation/devicetree/bindings/soc/fsl/bman.txt | 12 +++++-----\n Documentation/devicetree/bindings/soc/fsl/qman.txt | 26 ++++++++++++++++------\n 2 files changed, 26 insertions(+), 12 deletions(-)", "diff": "diff --git a/Documentation/devicetree/bindings/soc/fsl/bman.txt b/Documentation/devicetree/bindings/soc/fsl/bman.txt\nindex 47ac834..48eed14 100644\n--- a/Documentation/devicetree/bindings/soc/fsl/bman.txt\n+++ b/Documentation/devicetree/bindings/soc/fsl/bman.txt\n@@ -65,8 +65,8 @@ to the respective BMan instance\n BMan Private Memory Node\n \n BMan requires a contiguous range of physical memory used for the backing store\n-for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as a\n-node under the /reserved-memory node\n+for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as\n+a node under the /reserved-memory node.\n \n The BMan FBPR memory node must be named \"bman-fbpr\"\n \n@@ -75,7 +75,9 @@ PROPERTIES\n - compatible\n \tUsage:\t\trequired\n \tValue type:\t<stringlist>\n-\tDefinition:\tMust inclide \"fsl,bman-fbpr\"\n+\tDefinition:\tPPC platforms: Must include \"fsl,bman-fbpr\"\n+\t\t\tARM platforms: Must include \"shared-dma-pool\"\n+\t\t\t\t as well as the \"no-map\" property\n \n The following constraints are relevant to the FBPR private memory:\n \t- The size must be 2^(size + 1), with size = 11..33. That is 4 KiB to\n@@ -100,10 +102,10 @@ The example below shows a BMan FBPR dynamic allocation memory node\n \t\tranges;\n \n \t\tbman_fbpr: bman-fbpr {\n-\t\t\tcompatible = \"fsl,bman-fbpr\";\n-\t\t\talloc-ranges = <0 0 0x10 0>;\n+\t\t\tcompatible = \"shared-mem-pool\";\n \t\t\tsize = <0 0x1000000>;\n \t\t\talignment = <0 0x1000000>;\n+\t\t\tno-map;\n \t\t};\n \t};\n \ndiff --git a/Documentation/devicetree/bindings/soc/fsl/qman.txt b/Documentation/devicetree/bindings/soc/fsl/qman.txt\nindex 556ebb8..ee96afd 100644\n--- a/Documentation/devicetree/bindings/soc/fsl/qman.txt\n+++ b/Documentation/devicetree/bindings/soc/fsl/qman.txt\n@@ -60,6 +60,12 @@ are located at offsets 0xbf8 and 0xbfc\n \tValue type:\t<prop-encoded-array>\n \tDefinition:\tReference input clock. Its frequency is half of the\n \t\t\tplatform clock\n+- memory-regions\n+\tUsage:\t\tRequired for ARM\n+\tValue type:\t<phandle array>\n+\tDefinition:\tList of phandles referencing the QMan private memory\n+\t\t\tnodes (described below). The qman-fqd node must be\n+\t\t\tfirst followed by qman-pfdr node. Only used on ARM\n \n Devices connected to a QMan instance via Direct Connect Portals (DCP) must link\n to the respective QMan instance\n@@ -74,7 +80,9 @@ QMan Private Memory Nodes\n \n QMan requires two contiguous range of physical memory used for the backing store\n for QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).\n-This memory is reserved/allocated as a nodes under the /reserved-memory node\n+This memory is reserved/allocated as a node under the /reserved-memory node.\n+\n+For additional details about reserved memory regions see reserved-memory.txt\n \n The QMan FQD memory node must be named \"qman-fqd\"\n \n@@ -83,7 +91,9 @@ PROPERTIES\n - compatible\n \tUsage:\t\trequired\n \tValue type:\t<stringlist>\n-\tDefinition:\tMust inclide \"fsl,qman-fqd\"\n+\tDefinition:\tPPC platforms: Must include \"fsl,qman-fqd\"\n+\t\t\tARM platforms: Must include \"shared-dma-pool\"\n+\t\t\t\t as well as the \"no-map\" property\n \n The QMan PFDR memory node must be named \"qman-pfdr\"\n \n@@ -92,7 +102,9 @@ PROPERTIES\n - compatible\n \tUsage:\t\trequired\n \tValue type:\t<stringlist>\n-\tDefinition:\tMust inclide \"fsl,qman-pfdr\"\n+\tDefinition:\tPPC platforms: Must include \"fsl,qman-pfdr\"\n+\t\t\tARM platforms: Must include \"shared-dma-pool\"\n+\t\t\t\t as well as the \"no-map\" property\n \n The following constraints are relevant to the FQD and PFDR private memory:\n \t- The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to\n@@ -117,16 +129,16 @@ The example below shows a QMan FQD and a PFDR dynamic allocation memory nodes\n \t\tranges;\n \n \t\tqman_fqd: qman-fqd {\n-\t\t\tcompatible = \"fsl,qman-fqd\";\n-\t\t\talloc-ranges = <0 0 0x10 0>;\n+\t\t\tcompatible = \"shared-dma-pool\";\n \t\t\tsize = <0 0x400000>;\n \t\t\talignment = <0 0x400000>;\n+\t\t\tno-map;\n \t\t};\n \t\tqman_pfdr: qman-pfdr {\n-\t\t\tcompatible = \"fsl,qman-pfdr\";\n-\t\t\talloc-ranges = <0 0 0x10 0>;\n+\t\t\tcompatible = \"shared-dma-pool\";\n \t\t\tsize = <0 0x2000000>;\n \t\t\talignment = <0 0x2000000>;\n+\t\t\tno-map;\n \t\t};\n \t};\n \n", "prefixes": [ "v5", "04/12" ] }