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{
    "id": 814739,
    "url": "http://patchwork.ozlabs.org/api/patches/814739/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1505699028-7765-2-git-send-email-aford173@gmail.com/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1505699028-7765-2-git-send-email-aford173@gmail.com>",
    "list_archive_url": null,
    "date": "2017-09-18T01:43:44",
    "name": "[U-Boot,V4,1/5] arm: dts: da850: Migrate da850-evm DTS files from Linux 4.13-RC5",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "d38f0b97aa49e813c98f61aaff8c3a2215229cdc",
    "submitter": {
        "id": 67132,
        "url": "http://patchwork.ozlabs.org/api/people/67132/?format=api",
        "name": "Adam Ford",
        "email": "aford173@gmail.com"
    },
    "delegate": {
        "id": 3651,
        "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api",
        "username": "trini",
        "first_name": "Tom",
        "last_name": "Rini",
        "email": "trini@ti.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1505699028-7765-2-git-send-email-aford173@gmail.com/mbox/",
    "series": [
        {
            "id": 3552,
            "url": "http://patchwork.ozlabs.org/api/series/3552/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=3552",
            "date": "2017-09-18T01:43:43",
            "name": "Update DA850 to Device tree, SPI MTDPARTS, and DM",
            "version": 4,
            "mbox": "http://patchwork.ozlabs.org/series/3552/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/814739/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/814739/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Adam Ford <aford173@gmail.com>",
        "To": "u-boot@lists.denx.de",
        "Date": "Sun, 17 Sep 2017 20:43:44 -0500",
        "Message-Id": "<1505699028-7765-2-git-send-email-aford173@gmail.com>",
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        "References": "<1505699028-7765-1-git-send-email-aford173@gmail.com>",
        "Cc": "adam.ford@logicpd.com, jagan@openedev.com",
        "Subject": "[U-Boot] [PATCH V4 1/5] arm: dts: da850: Migrate da850-evm DTS\n\tfiles from Linux 4.13-RC5",
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    },
    "content": "A few small additional items are needed to support DM_SPI and\nDM_SERIAL, so those were added to da850-evm-u-boot.dtsi\n\nSigned-off-by: Adam Ford <aford173@gmail.com>\n---\nV4: Re-sync with latest master\nV3: New to series.  I forgot to generate this before. This is required before\n     The rest of the files in the series.",
    "diff": "diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi\nnew file mode 100644\nindex 0000000..5cca47d\n--- /dev/null\n+++ b/arch/arm/dts/da850-evm-u-boot.dtsi\n@@ -0,0 +1,22 @@\n+/*\n+ * da850-evm U-Boot Additions\n+ *\n+ * Copyright (C) 2017 Logic PD, Inc.\n+ * Copyright (C) Adam Ford\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+/ {\n+\tchosen {\n+\t\tstdout-path = &serial2;\n+\t};\n+\n+\taliases {\n+\t\tspi0 = &spi1;\n+\t};\n+};\n+\n+&flash {\n+\tcompatible = \"m25p64\", \"spi-flash\";\n+};\ndiff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts\nnew file mode 100644\nindex 0000000..67e72bc\n--- /dev/null\n+++ b/arch/arm/dts/da850-evm.dts\n@@ -0,0 +1,304 @@\n+/*\n+ * Device Tree for DA850 EVM board\n+ *\n+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/\n+ *\n+ * This program is free software; you can redistribute  it and/or modify it\n+ * under  the terms of  the GNU General  Public License as published by the\n+ * Free Software Foundation, version 2.\n+ */\n+/dts-v1/;\n+#include \"da850.dtsi\"\n+#include <dt-bindings/gpio/gpio.h>\n+\n+/ {\n+\tcompatible = \"ti,da850-evm\", \"ti,da850\";\n+\tmodel = \"DA850/AM1808/OMAP-L138 EVM\";\n+\n+\tsoc@1c00000 {\n+\t\tpmx_core: pinmux@14120 {\n+\t\t\tstatus = \"okay\";\n+\n+\t\t\tmcasp0_pins: pinmux_mcasp0_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/*\n+\t\t\t\t\t * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR,\n+\t\t\t\t\t * AFSR, AMUTE\n+\t\t\t\t\t */\n+\t\t\t\t\t0x00 0x11111111 0xffffffff\n+\t\t\t\t\t/* AXR11, AXR12 */\n+\t\t\t\t\t0x04 0x00011000 0x000ff000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tnand_pins: nand_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */\n+\t\t\t\t\t0x1c 0x10110110  0xf0ff0ff0\n+\t\t\t\t\t/*\n+\t\t\t\t\t * EMA_D[0], EMA_D[1], EMA_D[2],\n+\t\t\t\t\t * EMA_D[3], EMA_D[4], EMA_D[5],\n+\t\t\t\t\t * EMA_D[6], EMA_D[7]\n+\t\t\t\t\t */\n+\t\t\t\t\t0x24 0x11111111  0xffffffff\n+\t\t\t\t\t/* EMA_A[1], EMA_A[2] */\n+\t\t\t\t\t0x30 0x01100000  0x0ff00000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t};\n+\t\tserial0: serial@42000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\t\tserial1: serial@10c000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\t\tserial2: serial@10d000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\t\trtc0: rtc@23000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\t\ti2c0: i2c@22000 {\n+\t\t\tstatus = \"okay\";\n+\t\t\tclock-frequency = <100000>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&i2c0_pins>;\n+\n+\t\t\ttps: tps@48 {\n+\t\t\t\treg = <0x48>;\n+\t\t\t};\n+\t\t\ttlv320aic3106: tlv320aic3106@18 {\n+\t\t\t\t#sound-dai-cells = <0>;\n+\t\t\t\tcompatible = \"ti,tlv320aic3106\";\n+\t\t\t\treg = <0x18>;\n+\t\t\t\tstatus = \"okay\";\n+\n+\t\t\t\t/* Regulators */\n+\t\t\t\tIOVDD-supply = <&vdcdc2_reg>;\n+\t\t\t\t/* Derived from VBAT: Baseboard 3.3V / 1.8V */\n+\t\t\t\tAVDD-supply = <&vbat>;\n+\t\t\t\tDRVDD-supply = <&vbat>;\n+\t\t\t\tDVDD-supply = <&vbat>;\n+\t\t\t};\n+\t\t\ttca6416: gpio@20 {\n+\t\t\t\tcompatible = \"ti,tca6416\";\n+\t\t\t\treg = <0x20>;\n+\t\t\t\tgpio-controller;\n+\t\t\t\t#gpio-cells = <2>;\n+\t\t\t};\n+\t\t};\n+\t\twdt: wdt@21000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\t\tmmc0: mmc@40000 {\n+\t\t\tmax-frequency = <50000000>;\n+\t\t\tbus-width = <4>;\n+\t\t\tstatus = \"okay\";\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&mmc0_pins>;\n+\t\t};\n+\t\tspi1: spi@30e000 {\n+\t\t\tstatus = \"okay\";\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&spi1_pins &spi1_cs0_pin>;\n+\t\t\tflash: m25p80@0 {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <1>;\n+\t\t\t\tcompatible = \"m25p64\";\n+\t\t\t\tspi-max-frequency = <30000000>;\n+\t\t\t\tm25p,fast-read;\n+\t\t\t\treg = <0>;\n+\t\t\t\tpartition@0 {\n+\t\t\t\t\tlabel = \"U-Boot-SPL\";\n+\t\t\t\t\treg = <0x00000000 0x00010000>;\n+\t\t\t\t\tread-only;\n+\t\t\t\t};\n+\t\t\t\tpartition@1 {\n+\t\t\t\t\tlabel = \"U-Boot\";\n+\t\t\t\t\treg = <0x00010000 0x00080000>;\n+\t\t\t\t\tread-only;\n+\t\t\t\t};\n+\t\t\t\tpartition@2 {\n+\t\t\t\t\tlabel = \"U-Boot-Env\";\n+\t\t\t\t\treg = <0x00090000 0x00010000>;\n+\t\t\t\t\tread-only;\n+\t\t\t\t};\n+\t\t\t\tpartition@3 {\n+\t\t\t\t\tlabel = \"Kernel\";\n+\t\t\t\t\treg = <0x000a0000 0x00280000>;\n+\t\t\t\t};\n+\t\t\t\tpartition@4 {\n+\t\t\t\t\tlabel = \"Filesystem\";\n+\t\t\t\t\treg = <0x00320000 0x00400000>;\n+\t\t\t\t};\n+\t\t\t\tpartition@5 {\n+\t\t\t\t\tlabel = \"MAC-Address\";\n+\t\t\t\t\treg = <0x007f0000 0x00010000>;\n+\t\t\t\t\tread-only;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t\tmdio: mdio@224000 {\n+\t\t\tstatus = \"okay\";\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&mdio_pins>;\n+\t\t\tbus_freq = <2200000>;\n+\t\t};\n+\t\teth0: ethernet@220000 {\n+\t\t\tstatus = \"okay\";\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&mii_pins>;\n+\t\t};\n+\t\tgpio: gpio@226000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\t};\n+\tvbat: fixedregulator0 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"vbat\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tregulator-boot-on;\n+\t};\n+\n+\tsound {\n+\t\tcompatible = \"simple-audio-card\";\n+\t\tsimple-audio-card,name = \"DA850/OMAP-L138 EVM\";\n+\t\tsimple-audio-card,widgets =\n+\t\t\t\"Line\", \"Line In\",\n+\t\t\t\"Line\", \"Line Out\";\n+\t\tsimple-audio-card,routing =\n+\t\t\t\"LINE1L\", \"Line In\",\n+\t\t\t\"LINE1R\", \"Line In\",\n+\t\t\t\"Line Out\", \"LLOUT\",\n+\t\t\t\"Line Out\", \"RLOUT\";\n+\t\tsimple-audio-card,format = \"dsp_b\";\n+\t\tsimple-audio-card,bitclock-master = <&link0_codec>;\n+\t\tsimple-audio-card,frame-master = <&link0_codec>;\n+\t\tsimple-audio-card,bitclock-inversion;\n+\n+\t\tsimple-audio-card,cpu {\n+\t\t\tsound-dai = <&mcasp0>;\n+\t\t\tsystem-clock-frequency = <24576000>;\n+\t\t};\n+\n+\t\tlink0_codec: simple-audio-card,codec {\n+\t\t\tsound-dai = <&tlv320aic3106>;\n+\t\t\tsystem-clock-frequency = <24576000>;\n+\t\t};\n+\t};\n+};\n+\n+/include/ \"tps6507x.dtsi\"\n+\n+&tps {\n+\tvdcdc1_2-supply = <&vbat>;\n+\tvdcdc3-supply = <&vbat>;\n+\tvldo1_2-supply = <&vbat>;\n+\n+\tregulators {\n+\t\tvdcdc1_reg: regulator@0 {\n+\t\t\tregulator-name = \"VDCDC1_3.3V\";\n+\t\t\tregulator-min-microvolt = <3150000>;\n+\t\t\tregulator-max-microvolt = <3450000>;\n+\t\t\tregulator-always-on;\n+\t\t\tregulator-boot-on;\n+\t\t};\n+\n+\t\tvdcdc2_reg: regulator@1 {\n+\t\t\tregulator-name = \"VDCDC2_3.3V\";\n+\t\t\tregulator-min-microvolt = <1710000>;\n+\t\t\tregulator-max-microvolt = <3450000>;\n+\t\t\tregulator-always-on;\n+\t\t\tregulator-boot-on;\n+\t\t\tti,defdcdc_default = <1>;\n+\t\t};\n+\n+\t\tvdcdc3_reg: regulator@2 {\n+\t\t\tregulator-name = \"VDCDC3_1.2V\";\n+\t\t\tregulator-min-microvolt = <950000>;\n+\t\t\tregulator-max-microvolt = <1350000>;\n+\t\t\tregulator-always-on;\n+\t\t\tregulator-boot-on;\n+\t\t\tti,defdcdc_default = <1>;\n+\t\t};\n+\n+\t\tldo1_reg: regulator@3 {\n+\t\t\tregulator-name = \"LDO1_1.8V\";\n+\t\t\tregulator-min-microvolt = <1710000>;\n+\t\t\tregulator-max-microvolt = <1890000>;\n+\t\t\tregulator-always-on;\n+\t\t\tregulator-boot-on;\n+\t\t};\n+\n+\t\tldo2_reg: regulator@4 {\n+\t\t\tregulator-name = \"LDO2_1.2V\";\n+\t\t\tregulator-min-microvolt = <1140000>;\n+\t\t\tregulator-max-microvolt = <1320000>;\n+\t\t\tregulator-always-on;\n+\t\t\tregulator-boot-on;\n+\t\t};\n+\t};\n+};\n+\n+&mcasp0 {\n+\t#sound-dai-cells = <0>;\n+\tstatus = \"okay\";\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&mcasp0_pins>;\n+\n+\top-mode = <0>;          /* MCASP_IIS_MODE */\n+\ttdm-slots = <2>;\n+\t/* 4 serializer */\n+\tserial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */\n+\t\t0 0 0 0\n+\t\t0 0 0 0\n+\t\t0 0 0 1\n+\t\t2 0 0 0\n+\t>;\n+\ttx-num-evt = <32>;\n+\trx-num-evt = <32>;\n+};\n+\n+&edma0 {\n+\tti,edma-reserved-slot-ranges = <32 50>;\n+};\n+\n+&edma1 {\n+\tti,edma-reserved-slot-ranges = <32 90>;\n+};\n+\n+&aemif {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&nand_pins>;\n+\tstatus = \"ok\";\n+\tcs3 {\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <1>;\n+\t\tclock-ranges;\n+\t\tranges;\n+\n+\t\tti,cs-chipselect = <3>;\n+\n+\t\tnand@2000000,0 {\n+\t\t\tcompatible = \"ti,davinci-nand\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <1>;\n+\t\t\treg = <0 0x02000000 0x02000000\n+\t\t\t       1 0x00000000 0x00008000>;\n+\n+\t\t\tti,davinci-chipselect = <1>;\n+\t\t\tti,davinci-mask-ale = <0>;\n+\t\t\tti,davinci-mask-cle = <0>;\n+\t\t\tti,davinci-mask-chipsel = <0>;\n+\t\t\tti,davinci-ecc-mode = \"hw\";\n+\t\t\tti,davinci-ecc-bits = <4>;\n+\t\t\tti,davinci-nand-use-bbt;\n+\t\t};\n+\t};\n+};\n+\n+&vpif {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm/dts/da850.dtsi b/arch/arm/dts/da850.dtsi\nnew file mode 100644\nindex 0000000..02e2f8f\n--- /dev/null\n+++ b/arch/arm/dts/da850.dtsi\n@@ -0,0 +1,581 @@\n+/*\n+ * Copyright 2012 DENX Software Engineering GmbH\n+ * Heiko Schocher <hs@denx.de>\n+ *\n+ * This program is free software; you can redistribute  it and/or modify it\n+ * under  the terms of  the GNU General  Public License as published by the\n+ * Free Software Foundation;  either version 2 of the  License, or (at your\n+ * option) any later version.\n+ */\n+#include \"skeleton.dtsi\"\n+#include <dt-bindings/interrupt-controller/irq.h>\n+\n+/ {\n+\tarm {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tranges;\n+\t\tintc: interrupt-controller@fffee000 {\n+\t\t\tcompatible = \"ti,cp-intc\";\n+\t\t\tinterrupt-controller;\n+\t\t\t#interrupt-cells = <1>;\n+\t\t\tti,intc-size = <101>;\n+\t\t\treg = <0xfffee000 0x2000>;\n+\t\t};\n+\t};\n+\n+\taliases {\n+\t\tspi0 = &spi0;\n+\t};\n+\n+\tsoc@1c00000 {\n+\t\tcompatible = \"simple-bus\";\n+\t\tmodel = \"da850\";\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tranges = <0x0 0x01c00000 0x400000>;\n+\t\tinterrupt-parent = <&intc>;\n+\n+\t\tpmx_core: pinmux@14120 {\n+\t\t\tcompatible = \"pinctrl-single\";\n+\t\t\treg = <0x14120 0x50>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\t#pinctrl-cells = <2>;\n+\t\t\tpinctrl-single,bit-per-mux;\n+\t\t\tpinctrl-single,register-width = <32>;\n+\t\t\tpinctrl-single,function-mask = <0xf>;\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\tserial0_rtscts_pins: pinmux_serial0_rtscts_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* UART0_RTS UART0_CTS */\n+\t\t\t\t\t0x0c 0x22000000 0xff000000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tserial0_rxtx_pins: pinmux_serial0_rxtx_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* UART0_TXD UART0_RXD */\n+\t\t\t\t\t0x0c 0x00220000 0x00ff0000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tserial1_rtscts_pins: pinmux_serial1_rtscts_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* UART1_CTS UART1_RTS */\n+\t\t\t\t\t0x00 0x00440000 0x00ff0000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tserial1_rxtx_pins: pinmux_serial1_rxtx_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* UART1_TXD UART1_RXD */\n+\t\t\t\t\t0x10 0x22000000 0xff000000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tserial2_rtscts_pins: pinmux_serial2_rtscts_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* UART2_CTS UART2_RTS */\n+\t\t\t\t\t0x00 0x44000000 0xff000000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tserial2_rxtx_pins: pinmux_serial2_rxtx_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* UART2_TXD UART2_RXD */\n+\t\t\t\t\t0x10 0x00220000 0x00ff0000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\ti2c0_pins: pinmux_i2c0_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* I2C0_SDA,I2C0_SCL */\n+\t\t\t\t\t0x10 0x00002200 0x0000ff00\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\ti2c1_pins: pinmux_i2c1_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* I2C1_SDA, I2C1_SCL */\n+\t\t\t\t\t0x10 0x00440000 0x00ff0000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tmmc0_pins: pinmux_mmc_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* MMCSD0_DAT[3] MMCSD0_DAT[2]\n+\t\t\t\t\t * MMCSD0_DAT[1] MMCSD0_DAT[0]\n+\t\t\t\t\t * MMCSD0_CMD    MMCSD0_CLK\n+\t\t\t\t\t */\n+\t\t\t\t\t0x28 0x00222222  0x00ffffff\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tehrpwm0a_pins: pinmux_ehrpwm0a_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* EPWM0A */\n+\t\t\t\t\t0xc 0x00000002 0x0000000f\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tehrpwm0b_pins: pinmux_ehrpwm0b_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* EPWM0B */\n+\t\t\t\t\t0xc 0x00000020 0x000000f0\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tehrpwm1a_pins: pinmux_ehrpwm1a_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* EPWM1A */\n+\t\t\t\t\t0x14 0x00000002 0x0000000f\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tehrpwm1b_pins: pinmux_ehrpwm1b_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* EPWM1B */\n+\t\t\t\t\t0x14 0x00000020 0x000000f0\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tecap0_pins: pinmux_ecap0_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* ECAP0_APWM0 */\n+\t\t\t\t\t0x8 0x20000000 0xf0000000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tecap1_pins: pinmux_ecap1_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* ECAP1_APWM1 */\n+\t\t\t\t\t0x4 0x40000000 0xf0000000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tecap2_pins: pinmux_ecap2_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* ECAP2_APWM2 */\n+\t\t\t\t\t0x4 0x00000004 0x0000000f\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tspi0_pins: pinmux_spi0_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* SIMO, SOMI, CLK */\n+\t\t\t\t\t0xc 0x00001101 0x0000ff0f\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tspi0_cs0_pin: pinmux_spi0_cs0 {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* CS0 */\n+\t\t\t\t\t0x10 0x00000010 0x000000f0\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tspi0_cs3_pin: pinmux_spi0_cs3_pin {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* CS3 */\n+\t\t\t\t\t0xc 0x01000000 0x0f000000\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tspi1_pins: pinmux_spi1_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* SIMO, SOMI, CLK */\n+\t\t\t\t\t0x14 0x00110100 0x00ff0f00\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tspi1_cs0_pin: pinmux_spi1_cs0 {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* CS0 */\n+\t\t\t\t\t0x14 0x00000010 0x000000f0\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tmdio_pins: pinmux_mdio_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* MDIO_CLK, MDIO_D */\n+\t\t\t\t\t0x10 0x00000088 0x000000ff\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tmii_pins: pinmux_mii_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/*\n+\t\t\t\t\t * MII_TXEN, MII_TXCLK, MII_COL\n+\t\t\t\t\t * MII_TXD_3, MII_TXD_2, MII_TXD_1\n+\t\t\t\t\t * MII_TXD_0\n+\t\t\t\t\t */\n+\t\t\t\t\t0x8 0x88888880 0xfffffff0\n+\t\t\t\t\t/*\n+\t\t\t\t\t * MII_RXER, MII_CRS, MII_RXCLK\n+\t\t\t\t\t * MII_RXDV, MII_RXD_3, MII_RXD_2\n+\t\t\t\t\t * MII_RXD_1, MII_RXD_0\n+\t\t\t\t\t */\n+\t\t\t\t\t0xc 0x88888888 0xffffffff\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tlcd_pins: pinmux_lcd_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/*\n+\t\t\t\t\t * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],\n+\t\t\t\t\t * LCD_D[6], LCD_D[7]\n+\t\t\t\t\t */\n+\t\t\t\t\t0x40 0x22222200 0xffffff00\n+\t\t\t\t\t/*\n+\t\t\t\t\t * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],\n+\t\t\t\t\t * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]\n+\t\t\t\t\t */\n+\t\t\t\t\t0x44 0x22222222 0xffffffff\n+\t\t\t\t\t/* LCD_D[8], LCD_D[9] */\n+\t\t\t\t\t0x48 0x00000022 0x000000ff\n+\n+\t\t\t\t\t/* LCD_PCLK */\n+\t\t\t\t\t0x48 0x02000000 0x0f000000\n+\t\t\t\t\t/* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */\n+\t\t\t\t\t0x4c 0x02000022 0x0f0000ff\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tvpif_capture_pins: vpif_capture_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */\n+\t\t\t\t\t0x38 0x11111111 0xffffffff\n+\t\t\t\t\t/* VP_DIN[10..15,0..1] */\n+\t\t\t\t\t0x3c 0x11111111 0xffffffff\n+\t\t\t\t\t/* VP_DIN[8..9] */\n+\t\t\t\t\t0x40 0x00000011 0x000000ff\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t\tvpif_display_pins: vpif_display_pins {\n+\t\t\t\tpinctrl-single,bits = <\n+\t\t\t\t\t/* VP_DOUT[2..7] */\n+\t\t\t\t\t0x40 0x11111100 0xffffff00\n+\t\t\t\t\t/* VP_DOUT[10..15,0..1] */\n+\t\t\t\t\t0x44 0x11111111 0xffffffff\n+\t\t\t\t\t/*  VP_DOUT[8..9] */\n+\t\t\t\t\t0x48 0x00000011 0x000000ff\n+\t\t\t\t\t/*\n+\t\t\t\t\t * VP_CLKOUT3, VP_CLKIN3,\n+\t\t\t\t\t * VP_CLKOUT2, VP_CLKIN2\n+\t\t\t\t\t */\n+\t\t\t\t\t0x4c 0x00111100 0x00ffff00\n+\t\t\t\t>;\n+\t\t\t};\n+\t\t};\n+\t\tprictrl: priority-controller@14110 {\n+\t\t\tcompatible = \"ti,da850-mstpri\";\n+\t\t\treg = <0x14110 0x0c>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tcfgchip: chip-controller@1417c {\n+\t\t\tcompatible = \"ti,da830-cfgchip\", \"syscon\", \"simple-mfd\";\n+\t\t\treg = <0x1417c 0x14>;\n+\n+\t\t\tusb_phy: usb-phy {\n+\t\t\t\tcompatible = \"ti,da830-usb-phy\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\t\t};\n+\t\tedma0: edma@0 {\n+\t\t\tcompatible = \"ti,edma3-tpcc\";\n+\t\t\t/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */\n+\t\t\treg =\t<0x0 0x8000>;\n+\t\t\treg-names = \"edma3_cc\";\n+\t\t\tinterrupts = <11 12>;\n+\t\t\tinterrupt-names = \"edma3_ccint\", \"edma3_ccerrint\";\n+\t\t\t#dma-cells = <2>;\n+\n+\t\t\tti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;\n+\t\t};\n+\t\tedma0_tptc0: tptc@8000 {\n+\t\t\tcompatible = \"ti,edma3-tptc\";\n+\t\t\treg =\t<0x8000 0x400>;\n+\t\t\tinterrupts = <13>;\n+\t\t\tinterrupt-names = \"edm3_tcerrint\";\n+\t\t};\n+\t\tedma0_tptc1: tptc@8400 {\n+\t\t\tcompatible = \"ti,edma3-tptc\";\n+\t\t\treg =\t<0x8400 0x400>;\n+\t\t\tinterrupts = <32>;\n+\t\t\tinterrupt-names = \"edm3_tcerrint\";\n+\t\t};\n+\t\tedma1: edma@230000 {\n+\t\t\tcompatible = \"ti,edma3-tpcc\";\n+\t\t\t/* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */\n+\t\t\treg =\t<0x230000 0x8000>;\n+\t\t\treg-names = \"edma3_cc\";\n+\t\t\tinterrupts = <93 94>;\n+\t\t\tinterrupt-names = \"edma3_ccint\", \"edma3_ccerrint\";\n+\t\t\t#dma-cells = <2>;\n+\n+\t\t\tti,tptcs = <&edma1_tptc0 7>;\n+\t\t};\n+\t\tedma1_tptc0: tptc@238000 {\n+\t\t\tcompatible = \"ti,edma3-tptc\";\n+\t\t\treg =\t<0x238000 0x400>;\n+\t\t\tinterrupts = <95>;\n+\t\t\tinterrupt-names = \"edm3_tcerrint\";\n+\t\t};\n+\t\tserial0: serial@42000 {\n+\t\t\tcompatible = \"ti,da830-uart\", \"ns16550a\";\n+\t\t\treg = <0x42000 0x100>;\n+\t\t\treg-io-width = <4>;\n+\t\t\treg-shift = <2>;\n+\t\t\tinterrupts = <25>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tserial1: serial@10c000 {\n+\t\t\tcompatible = \"ti,da830-uart\", \"ns16550a\";\n+\t\t\treg = <0x10c000 0x100>;\n+\t\t\treg-io-width = <4>;\n+\t\t\treg-shift = <2>;\n+\t\t\tinterrupts = <53>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tserial2: serial@10d000 {\n+\t\t\tcompatible = \"ti,da830-uart\", \"ns16550a\";\n+\t\t\treg = <0x10d000 0x100>;\n+\t\t\treg-io-width = <4>;\n+\t\t\treg-shift = <2>;\n+\t\t\tinterrupts = <61>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\trtc0: rtc@23000 {\n+\t\t\tcompatible = \"ti,da830-rtc\";\n+\t\t\treg = <0x23000 0x1000>;\n+\t\t\tinterrupts = <19\n+\t\t\t\t      19>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\ti2c0: i2c@22000 {\n+\t\t\tcompatible = \"ti,davinci-i2c\";\n+\t\t\treg = <0x22000 0x1000>;\n+\t\t\tinterrupts = <15>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\ti2c1: i2c@228000 {\n+\t\t\tcompatible = \"ti,davinci-i2c\";\n+\t\t\treg = <0x228000 0x1000>;\n+\t\t\tinterrupts = <51>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\twdt: wdt@21000 {\n+\t\t\tcompatible = \"ti,davinci-wdt\";\n+\t\t\treg = <0x21000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tmmc0: mmc@40000 {\n+\t\t\tcompatible = \"ti,da830-mmc\";\n+\t\t\treg = <0x40000 0x1000>;\n+\t\t\tcap-sd-highspeed;\n+\t\t\tcap-mmc-highspeed;\n+\t\t\tinterrupts = <16>;\n+\t\t\tdmas = <&edma0 16 0>, <&edma0 17 0>;\n+\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tvpif: video@217000 {\n+\t\t\tcompatible = \"ti,da850-vpif\";\n+\t\t\treg = <0x217000 0x1000>;\n+\t\t\tinterrupts = <92>;\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\t/* VPIF capture port */\n+\t\t\tport@0 {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t};\n+\n+\t\t\t/* VPIF display port */\n+\t\t\tport@1 {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t};\n+\t\t};\n+\t\tmmc1: mmc@21b000 {\n+\t\t\tcompatible = \"ti,da830-mmc\";\n+\t\t\treg = <0x21b000 0x1000>;\n+\t\t\tcap-sd-highspeed;\n+\t\t\tcap-mmc-highspeed;\n+\t\t\tinterrupts = <72>;\n+\t\t\tdmas = <&edma1 28 0>, <&edma1 29 0>;\n+\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tehrpwm0: pwm@300000 {\n+\t\t\tcompatible = \"ti,da850-ehrpwm\", \"ti,am3352-ehrpwm\",\n+\t\t\t\t     \"ti,am33xx-ehrpwm\";\n+\t\t\t#pwm-cells = <3>;\n+\t\t\treg = <0x300000 0x2000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tehrpwm1: pwm@302000 {\n+\t\t\tcompatible = \"ti,da850-ehrpwm\", \"ti,am3352-ehrpwm\",\n+\t\t\t\t     \"ti,am33xx-ehrpwm\";\n+\t\t\t#pwm-cells = <3>;\n+\t\t\treg = <0x302000 0x2000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tecap0: ecap@306000 {\n+\t\t\tcompatible = \"ti,da850-ecap\", \"ti,am3352-ecap\",\n+\t\t\t\t     \"ti,am33xx-ecap\";\n+\t\t\t#pwm-cells = <3>;\n+\t\t\treg = <0x306000 0x80>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tecap1: ecap@307000 {\n+\t\t\tcompatible = \"ti,da850-ecap\", \"ti,am3352-ecap\",\n+\t\t\t\t     \"ti,am33xx-ecap\";\n+\t\t\t#pwm-cells = <3>;\n+\t\t\treg = <0x307000 0x80>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tecap2: ecap@308000 {\n+\t\t\tcompatible = \"ti,da850-ecap\", \"ti,am3352-ecap\",\n+\t\t\t\t     \"ti,am33xx-ecap\";\n+\t\t\t#pwm-cells = <3>;\n+\t\t\treg = <0x308000 0x80>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tspi0: spi@41000 {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tcompatible = \"ti,da830-spi\";\n+\t\t\treg = <0x41000 0x1000>;\n+\t\t\tnum-cs = <6>;\n+\t\t\tti,davinci-spi-intr-line = <1>;\n+\t\t\tinterrupts = <20>;\n+\t\t\tdmas = <&edma0 14 0>, <&edma0 15 0>;\n+\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tspi1: spi@30e000 {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tcompatible = \"ti,da830-spi\";\n+\t\t\treg = <0x30e000 0x1000>;\n+\t\t\tnum-cs = <4>;\n+\t\t\tti,davinci-spi-intr-line = <1>;\n+\t\t\tinterrupts = <56>;\n+\t\t\tdmas = <&edma0 18 0>, <&edma0 19 0>;\n+\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tusb0: usb@200000 {\n+\t\t\tcompatible = \"ti,da830-musb\";\n+\t\t\treg = <0x200000 0x1000>;\n+\t\t\tranges;\n+\t\t\tinterrupts = <58>;\n+\t\t\tinterrupt-names = \"mc\";\n+\t\t\tdr_mode = \"otg\";\n+\t\t\tphys = <&usb_phy 0>;\n+\t\t\tphy-names = \"usb-phy\";\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <1>;\n+\n+\t\t\tdmas = <&cppi41dma 0 0 &cppi41dma 1 0\n+\t\t\t\t&cppi41dma 2 0 &cppi41dma 3 0\n+\t\t\t\t&cppi41dma 0 1 &cppi41dma 1 1\n+\t\t\t\t&cppi41dma 2 1 &cppi41dma 3 1>;\n+\t\t\tdma-names =\n+\t\t\t\t\"rx1\", \"rx2\", \"rx3\", \"rx4\",\n+\t\t\t\t\"tx1\", \"tx2\", \"tx3\", \"tx4\";\n+\n+\t\t\tcppi41dma: dma-controller@201000 {\n+\t\t\t\tcompatible = \"ti,da830-cppi41\";\n+\t\t\t\treg =  <0x201000 0x1000\n+\t\t\t\t\t0x202000 0x1000\n+\t\t\t\t\t0x204000 0x4000>;\n+\t\t\t\treg-names = \"controller\",\n+\t\t\t\t\t    \"scheduler\", \"queuemgr\";\n+\t\t\t\tinterrupts = <58>;\n+\t\t\t\t#dma-cells = <2>;\n+\t\t\t\t#dma-channels = <4>;\n+\t\t\t\tstatus = \"okay\";\n+\t\t\t};\n+\t\t};\n+\t\tsata: sata@218000 {\n+\t\t\tcompatible = \"ti,da850-ahci\";\n+\t\t\treg = <0x218000 0x2000>, <0x22c018 0x4>;\n+\t\t\tinterrupts = <67>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tmdio: mdio@224000 {\n+\t\t\tcompatible = \"ti,davinci_mdio\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\treg = <0x224000 0x1000>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\teth0: ethernet@220000 {\n+\t\t\tcompatible = \"ti,davinci-dm6467-emac\";\n+\t\t\treg = <0x220000 0x4000>;\n+\t\t\tti,davinci-ctrl-reg-offset = <0x3000>;\n+\t\t\tti,davinci-ctrl-mod-reg-offset = <0x2000>;\n+\t\t\tti,davinci-ctrl-ram-offset = <0>;\n+\t\t\tti,davinci-ctrl-ram-size = <0x2000>;\n+\t\t\tlocal-mac-address = [ 00 00 00 00 00 00 ];\n+\t\t\tinterrupts = <33\n+\t\t\t\t\t34\n+\t\t\t\t\t35\n+\t\t\t\t\t36\n+\t\t\t\t\t>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tusb1: usb@225000 {\n+\t\t\tcompatible = \"ti,da830-ohci\";\n+\t\t\treg = <0x225000 0x1000>;\n+\t\t\tinterrupts = <59>;\n+\t\t\tphys = <&usb_phy 1>;\n+\t\t\tphy-names = \"usb-phy\";\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t\tgpio: gpio@226000 {\n+\t\t\tcompatible = \"ti,dm6441-gpio\";\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\treg = <0x226000 0x1000>;\n+\t\t\tinterrupts = <42 IRQ_TYPE_EDGE_BOTH\n+\t\t\t\t43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH\n+\t\t\t\t45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH\n+\t\t\t\t47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH\n+\t\t\t\t49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;\n+\t\t\tti,ngpio = <144>;\n+\t\t\tti,davinci-gpio-unbanked = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t\tinterrupt-controller;\n+\t\t\t#interrupt-cells = <2>;\n+\t\t};\n+\t\tpinconf: pin-controller@22c00c {\n+\t\t\tcompatible = \"ti,da850-pupd\";\n+\t\t\treg = <0x22c00c 0x8>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tmcasp0: mcasp@100000 {\n+\t\t\tcompatible = \"ti,da830-mcasp-audio\";\n+\t\t\treg = <0x100000 0x2000>,\n+\t\t\t      <0x102000 0x400000>;\n+\t\t\treg-names = \"mpu\", \"dat\";\n+\t\t\tinterrupts = <54>;\n+\t\t\tinterrupt-names = \"common\";\n+\t\t\tstatus = \"disabled\";\n+\t\t\tdmas = <&edma0 1 1>,\n+\t\t\t\t<&edma0 0 1>;\n+\t\t\tdma-names = \"tx\", \"rx\";\n+\t\t};\n+\n+\t\tlcdc: display@213000 {\n+\t\t\tcompatible = \"ti,da850-tilcdc\";\n+\t\t\treg = <0x213000 0x1000>;\n+\t\t\tinterrupts = <52>;\n+\t\t\tmax-pixelclock = <37500>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t};\n+\taemif: aemif@68000000 {\n+\t\tcompatible = \"ti,da850-aemif\";\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <1>;\n+\n+\t\treg = <0x68000000 0x00008000>;\n+\t\tranges = <0 0 0x60000000 0x08000000\n+\t\t\t  1 0 0x68000000 0x00008000>;\n+\t\tstatus = \"disabled\";\n+\t};\n+\tmemctrl: memory-controller@b0000000 {\n+\t\tcompatible = \"ti,da850-ddr-controller\";\n+\t\treg = <0xb0000000 0xe8>;\n+\t\tstatus = \"disabled\";\n+\t};\n+};\ndiff --git a/arch/arm/dts/tps6507x.dtsi b/arch/arm/dts/tps6507x.dtsi\nnew file mode 100644\nindex 0000000..4c326e5\n--- /dev/null\n+++ b/arch/arm/dts/tps6507x.dtsi\n@@ -0,0 +1,47 @@\n+/*\n+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License version 2 as\n+ * published by the Free Software Foundation.\n+ */\n+\n+/*\n+ * Integrated Power Management Chip\n+ * http://www.ti.com/lit/ds/symlink/tps65070.pdf\n+ */\n+\n+&tps {\n+\tcompatible = \"ti,tps6507x\";\n+\n+\tregulators {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tvdcdc1_reg: regulator@0 {\n+\t\t\treg = <0>;\n+\t\t\tregulator-compatible = \"VDCDC1\";\n+\t\t};\n+\n+\t\tvdcdc2_reg: regulator@1 {\n+\t\t\treg = <1>;\n+\t\t\tregulator-compatible = \"VDCDC2\";\n+\t\t};\n+\n+\t\tvdcdc3_reg: regulator@2 {\n+\t\t\treg = <2>;\n+\t\t\tregulator-compatible = \"VDCDC3\";\n+\t\t};\n+\n+\t\tldo1_reg: regulator@3 {\n+\t\t\treg = <3>;\n+\t\t\tregulator-compatible = \"LDO1\";\n+\t\t};\n+\n+\t\tldo2_reg: regulator@4 {\n+\t\t\treg = <4>;\n+\t\t\tregulator-compatible = \"LDO2\";\n+\t\t};\n+\n+\t};\n+};\n",
    "prefixes": [
        "U-Boot",
        "V4",
        "1/5"
    ]
}