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GET /api/patches/814577/?format=api
{ "id": 814577, "url": "http://patchwork.ozlabs.org/api/patches/814577/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-3-stefan.bruens@rwth-aachen.de/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170917031956.28010-3-stefan.bruens@rwth-aachen.de>", "list_archive_url": null, "date": "2017-09-17T03:19:48", "name": "[v2,02/10] dmaengine: sun6i: Correct burst length field offsets for H3", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "fcc3f0176d959c50779bcaae50cee4690a63bb53", "submitter": { "id": 67055, "url": "http://patchwork.ozlabs.org/api/people/67055/?format=api", "name": "Stefan Brüns", "email": "stefan.bruens@rwth-aachen.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-3-stefan.bruens@rwth-aachen.de/mbox/", "series": [ { "id": 3480, "url": "http://patchwork.ozlabs.org/api/series/3480/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=3480", "date": "2017-09-17T03:19:50", "name": "dmaengine: sun6i: Fixes for H3/A83T, enable A64", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3480/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814577/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814577/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"r+hIVtul\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xvvcP1rxVz9ryQ\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tSun, 17 Sep 2017 13:23:49 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQBN-0004Jd-DS; Sun, 17 Sep 2017 03:23:45 +0000", "from mail-out-2.itc.rwth-aachen.de ([134.130.5.47])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQ8H-0001Rr-69 for linux-arm-kernel@lists.infradead.org;\n\tSun, 17 Sep 2017 03:20:45 +0000", "from rwthex-w1-a.rwth-ad.de ([134.130.26.156])\n\tby mail-in-2.itc.rwth-aachen.de with ESMTP; 17 Sep 2017 05:20:06 +0200", "from pebbles.fritz.box (85.183.223.53) by rwthex-w1-a.rwth-ad.de\n\t(2002:8682:1a9c::8682:1a9c) with Microsoft SMTP Server\n\t(version=TLS1_2, \n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1034.26;\n\tSun, 17 Sep 2017 05:20:04 +0200" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=CiFwjDUfjUpYuszeiUguz9eWHAGfeMtRk4QtpkLrZ4Y=;\n\tb=r+hIVtulxxIcfR\n\tZgdfir2tW2Jh2BB/qJVzRelC2udcDlyHxYw89pOrC6vN4HDFd8fszr3Zxr/sf8wobCHNOb0BHwXIg\n\t+uJdxRLV4yLIrrJRTXUfUXaMhe98/Pwgr+XIr/uXrBwhtsYZ9qQVlmil/K/3X3ztfyktGgnwQZgKy\n\toYwtDCujmH8vIQaNfPHyNFzCkh3loFYzTZifdDRSq671yIvf2Jh51p2HOTiHDsOs9eciBT/xv3Tos\n\tVlc5vd2Q1dEJ/n7Lqx6ZrvpIaA3y5PZYvEfNqCyQMmXFXwXJP43F/9BBLIEZyVeFUkN0GP/mJLJRx\n\t5/va+qlBL+BvVzzNcU6w==;", "X-IronPort-AV": "E=Sophos;i=\"5.42,405,1500933600\"; d=\"scan'208\";a=\"13727178\"", "From": "=?utf-8?q?Stefan_Br=C3=BCns?= <stefan.bruens@rwth-aachen.de>", "To": "<linux-sunxi@googlegroups.com>", "Subject": "[PATCH v2 02/10] dmaengine: sun6i: Correct burst length field\n\toffsets for H3", "Date": "Sun, 17 Sep 2017 05:19:48 +0200", "Message-ID": "<20170917031956.28010-3-stefan.bruens@rwth-aachen.de>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "References": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "MIME-Version": "1.0", "X-Originating-IP": "[85.183.223.53]", "X-ClientProxiedBy": "rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To\n\trwthex-w1-a.rwth-ad.de (2002:8682:1a9c::8682:1a9c)", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170916_202033_758358_D085C9E6 ", "X-CRM114-Status": "GOOD ( 10.04 )", "X-Spam-Score": "-4.2 (----)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [134.130.5.47 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "devicetree@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>,\n\tAndre Przywara <andre.przywara@arm.com>, linux-kernel@vger.kernel.org,\n\tCode Kipper <codekipper@gmail.com>, Chen-Yu Tsai <wens@csie.org>,\n\tRob Herring <robh+dt@kernel.org>, dmaengine@vger.kernel.org,\n\tMaxime Ripard <maxime.ripard@free-electrons.com>,\n\tlinux-arm-kernel@lists.infradead.org", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "For the H3, the burst lengths field offsets in the channel configuration\nregister differs from earlier SoC generations.\n\nUsing the A31 register macros actually configured the H3 controller\ndo to bursts of length 1 always, which although working leads to higher\nbus utilisation.\n\nSigned-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>\n---\n drivers/dma/sun6i-dma.c | 36 +++++++++++++++++++++++++++---------\n 1 file changed, 27 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c\nindex 45bcd5271d94..a6fc066a0ac6 100644\n--- a/drivers/dma/sun6i-dma.c\n+++ b/drivers/dma/sun6i-dma.c\n@@ -68,13 +68,15 @@\n #define DMA_CHAN_CFG_SRC_DRQ(x)\t\t((x) & 0x1f)\n #define DMA_CHAN_CFG_SRC_IO_MODE\tBIT(5)\n #define DMA_CHAN_CFG_SRC_LINEAR_MODE\t(0 << 5)\n-#define DMA_CHAN_CFG_SRC_BURST(x)\t(((x) & 0x3) << 7)\n+#define DMA_CHAN_CFG_SRC_BURST_A31(x)\t(((x) & 0x3) << 7)\n+#define DMA_CHAN_CFG_SRC_BURST_H3(x)\t(((x) & 0x3) << 6)\n #define DMA_CHAN_CFG_SRC_WIDTH(x)\t(((x) & 0x3) << 9)\n \n #define DMA_CHAN_CFG_DST_DRQ(x)\t\t(DMA_CHAN_CFG_SRC_DRQ(x) << 16)\n #define DMA_CHAN_CFG_DST_IO_MODE\t(DMA_CHAN_CFG_SRC_IO_MODE << 16)\n #define DMA_CHAN_CFG_DST_LINEAR_MODE\t(DMA_CHAN_CFG_SRC_LINEAR_MODE << 16)\n-#define DMA_CHAN_CFG_DST_BURST(x)\t(DMA_CHAN_CFG_SRC_BURST(x) << 16)\n+#define DMA_CHAN_CFG_DST_BURST_A31(x)\t(DMA_CHAN_CFG_SRC_BURST_A31(x) << 16)\n+#define DMA_CHAN_CFG_DST_BURST_H3(x)\t(DMA_CHAN_CFG_SRC_BURST_H3(x) << 16)\n #define DMA_CHAN_CFG_DST_WIDTH(x)\t(DMA_CHAN_CFG_SRC_WIDTH(x) << 16)\n \n #define DMA_CHAN_CUR_SRC\t0x10\n@@ -115,6 +117,7 @@ struct sun6i_dma_config {\n \t * BSP kernel source code.\n \t */\n \tvoid (*clock_autogate_enable)();\n+\tvoid (*set_burst_length)(u32 *p_cfg, s8 src_burst, s8 dst_burst);\n };\n \n /*\n@@ -284,6 +287,18 @@ static void sun6i_enable_clock_autogate_h3(struct sun6i_dma_dev *sdev)\n \twritel(SUNXI_H3_DMA_GATE_ENABLE, sdev->base + SUNXI_H3_DMA_GATE);\n }\n \n+static void sun6i_set_burst_length_a31(u32 *p_cfg, s8 src_burst, s8 dst_burst)\n+{\n+\t*p_cfg |= DMA_CHAN_CFG_SRC_BURST_A31(src_burst) |\n+\t\t DMA_CHAN_CFG_DST_BURST_A31(dst_burst);\n+}\n+\n+static void sun6i_set_burst_length_h3(u32 *p_cfg, s8 src_burst, s8 dst_burst)\n+{\n+\t*p_cfg |= DMA_CHAN_CFG_SRC_BURST_H3(src_burst) |\n+\t\t DMA_CHAN_CFG_DST_BURST_H3(dst_burst);\n+}\n+\n static size_t sun6i_get_chan_size(struct sun6i_pchan *pchan)\n {\n \tstruct sun6i_desc *txd = pchan->desc;\n@@ -563,11 +578,11 @@ static int set_config(struct sun6i_dma_dev *sdev,\n \tif (dst_width < 0)\n \t\treturn dst_width;\n \n-\t*p_cfg = DMA_CHAN_CFG_SRC_BURST(src_burst) |\n-\t\tDMA_CHAN_CFG_SRC_WIDTH(src_width) |\n-\t\tDMA_CHAN_CFG_DST_BURST(dst_burst) |\n+\t*p_cfg = DMA_CHAN_CFG_SRC_WIDTH(src_width) |\n \t\tDMA_CHAN_CFG_DST_WIDTH(dst_width);\n \n+\tsdev->cfg->set_burst_length(p_cfg, src_burst, dst_burst);\n+\n \treturn 0;\n }\n \n@@ -610,11 +625,11 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy(\n \t\tDMA_CHAN_CFG_DST_DRQ(DRQ_SDRAM) |\n \t\tDMA_CHAN_CFG_DST_LINEAR_MODE |\n \t\tDMA_CHAN_CFG_SRC_LINEAR_MODE |\n-\t\tDMA_CHAN_CFG_SRC_BURST(burst) |\n \t\tDMA_CHAN_CFG_SRC_WIDTH(width) |\n-\t\tDMA_CHAN_CFG_DST_BURST(burst) |\n \t\tDMA_CHAN_CFG_DST_WIDTH(width);\n \n+\tsdev->cfg->set_burst_length(v_lli->cfg, burst, burst);\n+\n \tsun6i_dma_lli_add(NULL, v_lli, p_lli, txd);\n \n \tsun6i_dma_dump_lli(vchan, v_lli);\n@@ -1027,6 +1042,7 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = {\n \t.nr_max_requests = 30,\n \t.nr_max_vchans = 53,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_noop;\n+\t.set_burst_length = sun6i_set_burst_length_a31;\n };\n \n /*\n@@ -1039,6 +1055,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {\n \t.nr_max_requests = 24,\n \t.nr_max_vchans = 37,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n+\t.set_burst_length = sun6i_set_burst_length_a31;\n };\n \n static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n@@ -1046,13 +1063,12 @@ static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n \t.nr_max_requests = 28,\n \t.nr_max_vchans = 39,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n+\t.set_burst_length = sun6i_set_burst_length_a31;\n };\n \n /*\n * The H3 has 12 physical channels, a maximum DRQ port id of 27,\n * and a total of 34 usable source and destination endpoints.\n- * It also supports additional burst lengths and bus widths,\n- * and the burst length fields have different offsets.\n */\n \n static struct sun6i_dma_config sun8i_h3_dma_cfg = {\n@@ -1060,6 +1076,7 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {\n \t.nr_max_requests = 27,\n \t.nr_max_vchans = 34,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_h3;\n+\t.set_burst_length = sun6i_set_burst_length_h3;\n };\n \n /*\n@@ -1072,6 +1089,7 @@ static struct sun6i_dma_config sun8i_v3s_dma_cfg = {\n \t.nr_max_requests = 23,\n \t.nr_max_vchans = 24,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n+\t.set_burst_length = sun6i_set_burst_length_a31;\n };\n \n static const struct of_device_id sun6i_dma_match[] = {\n", "prefixes": [ "v2", "02/10" ] }