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GET /api/patches/814574/?format=api
{ "id": 814574, "url": "http://patchwork.ozlabs.org/api/patches/814574/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-2-stefan.bruens@rwth-aachen.de/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170917031956.28010-2-stefan.bruens@rwth-aachen.de>", "list_archive_url": null, "date": "2017-09-17T03:19:47", "name": "[v2,01/10] dmaengine: sun6i: Correct setting of clock autogating register for A83T/H3", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f9edb84f8848a359896620e3083442bd7870eb4a", "submitter": { "id": 67055, "url": "http://patchwork.ozlabs.org/api/people/67055/?format=api", "name": "Stefan Brüns", "email": "stefan.bruens@rwth-aachen.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-2-stefan.bruens@rwth-aachen.de/mbox/", "series": [ { "id": 3480, "url": "http://patchwork.ozlabs.org/api/series/3480/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=3480", "date": "2017-09-17T03:19:50", "name": "dmaengine: sun6i: Fixes for H3/A83T, enable A64", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3480/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814574/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814574/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"A+5uTXaX\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xvvZn2tz9z9ryQ\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tSun, 17 Sep 2017 13:22:25 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQA0-0003Ht-Un; Sun, 17 Sep 2017 03:22:20 +0000", "from mail-out-2.itc.rwth-aachen.de ([134.130.5.47])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQ8G-0000qy-F3 for linux-arm-kernel@lists.infradead.org;\n\tSun, 17 Sep 2017 03:20:39 +0000", "from rwthex-w1-a.rwth-ad.de ([134.130.26.156])\n\tby mail-in-2.itc.rwth-aachen.de with ESMTP; 17 Sep 2017 05:20:04 +0200", "from pebbles.fritz.box (85.183.223.53) by rwthex-w1-a.rwth-ad.de\n\t(2002:8682:1a9c::8682:1a9c) with Microsoft SMTP Server\n\t(version=TLS1_2, \n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1034.26;\n\tSun, 17 Sep 2017 05:20:03 +0200" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=anTue/ohCwpryISkhMTLXzpJjJRuEJb3N6jcraXMg9E=;\n\tb=A+5uTXaXpbz+BA\n\tgSh5Lue0S7gFruFKevDtVResqdmfE18UKDrPqiBc1EdUDSdWfYhOH+9in4KQv3fd7LoxWtN6nbfE+\n\tcF+zZrqFQAUiAdlwZkOIFUJwIJwpOm32rd4CQlK3K8fwRocq6uKCNiGPq9SSen7nVlMNqeENtH8ws\n\tjOrGhpn72Tn8avIiQEdBIj7y0pGEsPHAvTcIoM/PfDLkg2aRgoQPajp0ZKWY8oRuZcSlLmYRWCP8p\n\tf06IxvFEBWlm4VlD+uScBPH4/Lbf8Xz0bsRRLfy4euzUzUKdQm2DPELAqz40wCqPGf/jNJHT2cBJm\n\tWyJHtHu92XOPOQ/4WTrA==;", "X-IronPort-AV": "E=Sophos;i=\"5.42,405,1500933600\"; d=\"scan'208\";a=\"13727176\"", "From": "=?utf-8?q?Stefan_Br=C3=BCns?= <stefan.bruens@rwth-aachen.de>", "To": "<linux-sunxi@googlegroups.com>", "Subject": "[PATCH v2 01/10] dmaengine: sun6i: Correct setting of clock\n\tautogating register for A83T/H3", "Date": "Sun, 17 Sep 2017 05:19:47 +0200", "Message-ID": "<20170917031956.28010-2-stefan.bruens@rwth-aachen.de>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "References": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "MIME-Version": "1.0", "X-Originating-IP": "[85.183.223.53]", "X-ClientProxiedBy": "rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To\n\trwthex-w1-a.rwth-ad.de (2002:8682:1a9c::8682:1a9c)", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170916_202033_056750_F2673F5E ", "X-CRM114-Status": "GOOD ( 10.32 )", "X-Spam-Score": "-4.2 (----)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [134.130.5.47 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "devicetree@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>,\n\tAndre Przywara <andre.przywara@arm.com>, linux-kernel@vger.kernel.org,\n\tCode Kipper <codekipper@gmail.com>, Chen-Yu Tsai <wens@csie.org>,\n\tRob Herring <robh+dt@kernel.org>, dmaengine@vger.kernel.org,\n\tMaxime Ripard <maxime.ripard@free-electrons.com>,\n\tlinux-arm-kernel@lists.infradead.org", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "The H83T uses a compatible string different from the A23, but requires\nthe same clock autogating register setting.\n\nThe H3 also requires setting the clock autogating register, but has\nthe register at a different offset.\n\nAdd three suitable callbacks for the existing controller generations\nand set it in the controller config structure.\n\nSigned-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>\n---\n drivers/dma/sun6i-dma.c | 31 ++++++++++++++++++++++++++-----\n 1 file changed, 26 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c\nindex bcd496edc70f..45bcd5271d94 100644\n--- a/drivers/dma/sun6i-dma.c\n+++ b/drivers/dma/sun6i-dma.c\n@@ -48,6 +48,9 @@\n #define SUN8I_DMA_GATE\t\t0x20\n #define SUN8I_DMA_GATE_ENABLE\t0x4\n \n+#define SUNXI_H3_SECURE_REG\t\t0x20\n+#define SUNXI_H3_DMA_GATE\t\t0x28\n+#define SUNXI_H3_DMA_GATE_ENABLE\t0x4\n /*\n * Channels specific registers\n */\n@@ -111,7 +114,7 @@ struct sun6i_dma_config {\n \t * however these SoCs really have and need this bit, as seen in the\n \t * BSP kernel source code.\n \t */\n-\tbool gate_needed;\n+\tvoid (*clock_autogate_enable)();\n };\n \n /*\n@@ -267,6 +270,20 @@ static inline s8 convert_buswidth(enum dma_slave_buswidth addr_width)\n \treturn addr_width >> 1;\n }\n \n+static void sun6i_enable_clock_autogate_noop(struct sun6i_dma_dev *sdev)\n+{\n+}\n+\n+static void sun6i_enable_clock_autogate_a23(struct sun6i_dma_dev *sdev)\n+{\n+\twritel(SUN8I_DMA_GATE_ENABLE, sdev->base + SUN8I_DMA_GATE);\n+}\n+\n+static void sun6i_enable_clock_autogate_h3(struct sun6i_dma_dev *sdev)\n+{\n+\twritel(SUNXI_H3_DMA_GATE_ENABLE, sdev->base + SUNXI_H3_DMA_GATE);\n+}\n+\n static size_t sun6i_get_chan_size(struct sun6i_pchan *pchan)\n {\n \tstruct sun6i_desc *txd = pchan->desc;\n@@ -1009,6 +1026,7 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = {\n \t.nr_max_channels = 16,\n \t.nr_max_requests = 30,\n \t.nr_max_vchans = 53,\n+\t.clock_autogate_enable = sun6i_enable_clock_autogate_noop;\n };\n \n /*\n@@ -1020,24 +1038,28 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {\n \t.nr_max_channels = 8,\n \t.nr_max_requests = 24,\n \t.nr_max_vchans = 37,\n-\t.gate_needed\t = true,\n+\t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n };\n \n static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n \t.nr_max_channels = 8,\n \t.nr_max_requests = 28,\n \t.nr_max_vchans = 39,\n+\t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n };\n \n /*\n * The H3 has 12 physical channels, a maximum DRQ port id of 27,\n * and a total of 34 usable source and destination endpoints.\n+ * It also supports additional burst lengths and bus widths,\n+ * and the burst length fields have different offsets.\n */\n \n static struct sun6i_dma_config sun8i_h3_dma_cfg = {\n \t.nr_max_channels = 12,\n \t.nr_max_requests = 27,\n \t.nr_max_vchans = 34,\n+\t.clock_autogate_enable = sun6i_enable_clock_autogate_h3;\n };\n \n /*\n@@ -1049,7 +1071,7 @@ static struct sun6i_dma_config sun8i_v3s_dma_cfg = {\n \t.nr_max_channels = 8,\n \t.nr_max_requests = 23,\n \t.nr_max_vchans = 24,\n-\t.gate_needed\t = true,\n+\t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n };\n \n static const struct of_device_id sun6i_dma_match[] = {\n@@ -1199,8 +1221,7 @@ static int sun6i_dma_probe(struct platform_device *pdev)\n \t\tgoto err_dma_unregister;\n \t}\n \n-\tif (sdc->cfg->gate_needed)\n-\t\twritel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);\n+\tsdc->cfg->clock_autogate_enable();\n \n \treturn 0;\n \n", "prefixes": [ "v2", "01/10" ] }