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GET /api/patches/814573/?format=api
{ "id": 814573, "url": "http://patchwork.ozlabs.org/api/patches/814573/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-4-stefan.bruens@rwth-aachen.de/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170917031956.28010-4-stefan.bruens@rwth-aachen.de>", "list_archive_url": null, "date": "2017-09-17T03:19:49", "name": "[v2,03/10] dmaengine: sun6i: Restructure code to allow extension for new SoCs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e611cd3835c57ba0e7dfc8c84784ab194a2ddb1c", "submitter": { "id": 67055, "url": "http://patchwork.ozlabs.org/api/people/67055/?format=api", "name": "Stefan Brüns", "email": "stefan.bruens@rwth-aachen.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-4-stefan.bruens@rwth-aachen.de/mbox/", "series": [ { "id": 3480, "url": "http://patchwork.ozlabs.org/api/series/3480/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=3480", "date": "2017-09-17T03:19:50", "name": "dmaengine: sun6i: Fixes for H3/A83T, enable A64", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3480/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814573/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814573/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"RWQOQCez\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xvvZ86YKfz9rxl\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tSun, 17 Sep 2017 13:21:52 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQ9U-0002y5-Mf; Sun, 17 Sep 2017 03:21:48 +0000", "from mail-out-1.itc.rwth-aachen.de ([134.130.5.46])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQ8G-0000zq-9S for linux-arm-kernel@lists.infradead.org;\n\tSun, 17 Sep 2017 03:20:45 +0000", "from rwthex-w1-a.rwth-ad.de ([134.130.26.156])\n\tby mail-in-1.itc.rwth-aachen.de with ESMTP; 17 Sep 2017 05:20:07 +0200", "from pebbles.fritz.box (85.183.223.53) by rwthex-w1-a.rwth-ad.de\n\t(2002:8682:1a9c::8682:1a9c) with Microsoft SMTP Server\n\t(version=TLS1_2, \n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1034.26;\n\tSun, 17 Sep 2017 05:20:05 +0200" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=zMcVMVPEKcg9MkH54UGOckribc4XlNMrEDm6nPRK3EE=;\n\tb=RWQOQCezBytyQj\n\tq4TkWrCPm6c73M0N6VlmcfUQbkTwgjKgQFGvIWj6kWmlRzISQwP+A7PESiLBVK9+WucQjrDdSAWzm\n\t7ZlYjjvyp2TqHDnN3Kz9fxYZb5/sGmnxCTlreUj0Q/d66e19hFfmeTuruwyfN5JTU50wr3v+tIhjw\n\t1r7GeiEQWdbAkDFBjZgA/jSCSaal3NhKE8EH8lGAs8wYR8lgDaBfvnr7HvS7h43OK+Zw5JHYO0Htr\n\tLXdmF1gHk2e1dse2Dzraw4BjQ8XKtP3pfZ9eUXezoJ77NlL9y29Q9+DwjqON08fdAVKrB1ZA3/KFj\n\thIwhDls9Jl8lPzkqypNQ==;", "X-IronPort-AV": "E=Sophos;i=\"5.42,405,1500933600\"; d=\"scan'208\";a=\"13708886\"", "From": "=?utf-8?q?Stefan_Br=C3=BCns?= <stefan.bruens@rwth-aachen.de>", "To": "<linux-sunxi@googlegroups.com>", "Subject": "[PATCH v2 03/10] dmaengine: sun6i: Restructure code to allow\n\textension for new SoCs", "Date": "Sun, 17 Sep 2017 05:19:49 +0200", "Message-ID": "<20170917031956.28010-4-stefan.bruens@rwth-aachen.de>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "References": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "MIME-Version": "1.0", "X-Originating-IP": "[85.183.223.53]", "X-ClientProxiedBy": "rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To\n\trwthex-w1-a.rwth-ad.de (2002:8682:1a9c::8682:1a9c)", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170916_202033_029683_77D8EEF5 ", "X-CRM114-Status": "GOOD ( 10.95 )", "X-Spam-Score": "-4.2 (----)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [134.130.5.46 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "devicetree@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>,\n\tAndre Przywara <andre.przywara@arm.com>, linux-kernel@vger.kernel.org,\n\tCode Kipper <codekipper@gmail.com>, Chen-Yu Tsai <wens@csie.org>,\n\tRob Herring <robh+dt@kernel.org>, dmaengine@vger.kernel.org,\n\tMaxime Ripard <maxime.ripard@free-electrons.com>,\n\tlinux-arm-kernel@lists.infradead.org", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "The current code mixes three distinct operations when transforming\nthe slave config to register settings:\n\n 1. special handling of DMA_SLAVE_BUSWIDTH_UNDEFINED, maxburst == 0\n 2. range checking\n 3. conversion of raw to register values\n\nAs the range checks depend on the specific SoC, move these out of the\nconversion to distinct operations.\n\nSigned-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>\n---\n drivers/dma/sun6i-dma.c | 66 ++++++++++++++++++++++++++++---------------------\n 1 file changed, 38 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c\nindex a6fc066a0ac6..663f4b0b450e 100644\n--- a/drivers/dma/sun6i-dma.c\n+++ b/drivers/dma/sun6i-dma.c\n@@ -118,6 +118,8 @@ struct sun6i_dma_config {\n \t */\n \tvoid (*clock_autogate_enable)();\n \tvoid (*set_burst_length)(u32 *p_cfg, s8 src_burst, s8 dst_burst);\n+\tu32 src_burst_lengths;\n+\tu32 dst_burst_lengths;\n };\n \n /*\n@@ -266,10 +268,6 @@ static inline s8 convert_burst(u32 maxburst)\n \n static inline s8 convert_buswidth(enum dma_slave_buswidth addr_width)\n {\n-\tif ((addr_width < DMA_SLAVE_BUSWIDTH_1_BYTE) ||\n-\t (addr_width > DMA_SLAVE_BUSWIDTH_4_BYTES))\n-\t\treturn -EINVAL;\n-\n \treturn addr_width >> 1;\n }\n \n@@ -542,41 +540,43 @@ static int set_config(struct sun6i_dma_dev *sdev,\n \t\t\tenum dma_transfer_direction direction,\n \t\t\tu32 *p_cfg)\n {\n+\tenum dma_slave_buswidth src_addr_width, dst_addr_width;\n+\tu32 src_maxburst, dst_maxburst;\n \ts8 src_width, dst_width, src_burst, dst_burst;\n \n+\tsrc_addr_width = sconfig->src_addr_width;\n+\tdst_addr_width = sconfig->dst_addr_width;\n+\tsrc_maxburst = sconfig->src_maxburst;\n+\tdst_maxburst = sconfig->dst_maxburst;\n+\n \tswitch (direction) {\n \tcase DMA_MEM_TO_DEV:\n-\t\tsrc_burst = convert_burst(sconfig->src_maxburst ?\n-\t\t\t\t\tsconfig->src_maxburst : 8);\n-\t\tsrc_width = convert_buswidth(sconfig->src_addr_width !=\n-\t\t\t\t\t\tDMA_SLAVE_BUSWIDTH_UNDEFINED ?\n-\t\t\t\tsconfig->src_addr_width :\n-\t\t\t\tDMA_SLAVE_BUSWIDTH_4_BYTES);\n-\t\tdst_burst = convert_burst(sconfig->dst_maxburst);\n-\t\tdst_width = convert_buswidth(sconfig->dst_addr_width);\n+\t\tif (src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED)\n+\t\t\tsrc_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;\n+\t\tsrc_maxburst = src_maxburst ? src_maxburst : 8;\n \t\tbreak;\n \tcase DMA_DEV_TO_MEM:\n-\t\tsrc_burst = convert_burst(sconfig->src_maxburst);\n-\t\tsrc_width = convert_buswidth(sconfig->src_addr_width);\n-\t\tdst_burst = convert_burst(sconfig->dst_maxburst ?\n-\t\t\t\t\tsconfig->dst_maxburst : 8);\n-\t\tdst_width = convert_buswidth(sconfig->dst_addr_width !=\n-\t\t\t\t\t\tDMA_SLAVE_BUSWIDTH_UNDEFINED ?\n-\t\t\t\tsconfig->dst_addr_width :\n-\t\t\t\tDMA_SLAVE_BUSWIDTH_4_BYTES);\n+\t\tif (dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED)\n+\t\t\tdst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;\n+\t\tdst_maxburst = dst_maxburst ? dst_maxburst : 8;\n \t\tbreak;\n \tdefault:\n \t\treturn -EINVAL;\n \t}\n \n-\tif (src_burst < 0)\n-\t\treturn src_burst;\n-\tif (src_width < 0)\n-\t\treturn src_width;\n-\tif (dst_burst < 0)\n-\t\treturn dst_burst;\n-\tif (dst_width < 0)\n-\t\treturn dst_width;\n+\tif (!(BIT(src_addr_width) & sdev->slave.src_addr_widths))\n+\t\treturn -EINVAL;\n+\tif (!(BIT(dst_addr_width) & sdev->slave.dst_addr_widths))\n+\t\treturn -EINVAL;\n+\tif (!(BIT(src_maxburst) & sdev->cfg->src_burst_lengths))\n+\t\treturn -EINVAL;\n+\tif (!(BIT(dst_maxburst) & sdev->cfg->dst_burst_lengths))\n+\t\treturn -EINVAL;\n+\n+\tsrc_width = convert_buswidth(src_addr_width);\n+\tdst_width = convert_buswidth(dst_addr_width);\n+\tdst_burst = convert_burst(dst_maxburst);\n+\tsrc_burst = convert_burst(src_maxburst);\n \n \t*p_cfg = DMA_CHAN_CFG_SRC_WIDTH(src_width) |\n \t\tDMA_CHAN_CFG_DST_WIDTH(dst_width);\n@@ -1043,6 +1043,8 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = {\n \t.nr_max_vchans = 53,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_noop;\n \t.set_burst_length = sun6i_set_burst_length_a31;\n+\t.src_burst_lengths = BIT(1) | BIT(8);\n+\t.dst_burst_lengths = BIT(1) | BIT(8);\n };\n \n /*\n@@ -1056,6 +1058,8 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {\n \t.nr_max_vchans = 37,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n \t.set_burst_length = sun6i_set_burst_length_a31;\n+\t.src_burst_lengths = BIT(1) | BIT(8);\n+\t.dst_burst_lengths = BIT(1) | BIT(8);\n };\n \n static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n@@ -1064,6 +1068,8 @@ static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n \t.nr_max_vchans = 39,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n \t.set_burst_length = sun6i_set_burst_length_a31;\n+\t.src_burst_lengths = BIT(1) | BIT(8);\n+\t.dst_burst_lengths = BIT(1) | BIT(8);\n };\n \n /*\n@@ -1077,6 +1083,8 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {\n \t.nr_max_vchans = 34,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_h3;\n \t.set_burst_length = sun6i_set_burst_length_h3;\n+\t.src_burst_lengths = BIT(1) | BIT(8);\n+\t.dst_burst_lengths = BIT(1) | BIT(8);\n };\n \n /*\n@@ -1090,6 +1098,8 @@ static struct sun6i_dma_config sun8i_v3s_dma_cfg = {\n \t.nr_max_vchans = 24,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_a23;\n \t.set_burst_length = sun6i_set_burst_length_a31;\n+\t.src_burst_lengths = BIT(1) | BIT(8);\n+\t.dst_burst_lengths = BIT(1) | BIT(8);\n };\n \n static const struct of_device_id sun6i_dma_match[] = {\n", "prefixes": [ "v2", "03/10" ] }