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GET /api/patches/814570/?format=api
{ "id": 814570, "url": "http://patchwork.ozlabs.org/api/patches/814570/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-5-stefan.bruens@rwth-aachen.de/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170917031956.28010-5-stefan.bruens@rwth-aachen.de>", "list_archive_url": null, "date": "2017-09-17T03:19:50", "name": "[v2,04/10] dmaengine: sun6i: Enable additional burst lengths/widths on H3", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8e2105ec7980dac8b65d5764a540ee037149e7f6", "submitter": { "id": 67055, "url": "http://patchwork.ozlabs.org/api/people/67055/?format=api", "name": "Stefan Brüns", "email": "stefan.bruens@rwth-aachen.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/20170917031956.28010-5-stefan.bruens@rwth-aachen.de/mbox/", "series": [ { "id": 3480, "url": "http://patchwork.ozlabs.org/api/series/3480/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=3480", "date": "2017-09-17T03:19:50", "name": "dmaengine: sun6i: Fixes for H3/A83T, enable A64", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3480/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814570/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814570/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"W46b8p4F\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xvvY107Y8z9rxl\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tSun, 17 Sep 2017 13:20:49 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQ8N-0002BS-1h; Sun, 17 Sep 2017 03:20:40 +0000", "from mail-out-1.itc.rwth-aachen.de ([134.130.5.46])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dtQ8F-000159-RK for linux-arm-kernel@lists.infradead.org;\n\tSun, 17 Sep 2017 03:20:35 +0000", "from rwthex-w1-a.rwth-ad.de ([134.130.26.156])\n\tby mail-in-1.itc.rwth-aachen.de with ESMTP; 17 Sep 2017 05:20:08 +0200", "from pebbles.fritz.box (85.183.223.53) by rwthex-w1-a.rwth-ad.de\n\t(2002:8682:1a9c::8682:1a9c) with Microsoft SMTP Server\n\t(version=TLS1_2, \n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1034.26;\n\tSun, 17 Sep 2017 05:20:07 +0200" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=MF0XuSXrM2PdG2vXPKGrXGUsHPLFEeCihFtPez1mAZE=;\n\tb=W46b8p4FWzal62\n\t3eLUi8d11M27jmSiarmve3xGplKEI874KOiOj64sd7xccpIg8iStkEDlZEXjB0ZCtjvV6dguLzZxe\n\t6Uq8fvNuxh+6M72wnmG7eQcJWcn02AfLnGGBa8Z8GAyzaGp/3PrG33UD0LaqxGP/VVxE/MBwV43zS\n\tdSAtrWpgljbMHdZ3eEmAEO894tOHIxJlJSgG9l44WgWCFRQFPBNjvu3E3XKjj30cE1ecntSfnAjEa\n\tLOc/d1OEF55NFVdLSS/xKJ+OYIG7rUmWNBRL3XuPrYk+D5k4B5XrpRDzCbh/feRjn2X0+6bvHI55s\n\tU6eAuz5FBYLxAYa6jmVA==;", "X-IronPort-AV": "E=Sophos;i=\"5.42,405,1500933600\"; d=\"scan'208\";a=\"13708889\"", "From": "=?utf-8?q?Stefan_Br=C3=BCns?= <stefan.bruens@rwth-aachen.de>", "To": "<linux-sunxi@googlegroups.com>", "Subject": "[PATCH v2 04/10] dmaengine: sun6i: Enable additional burst\n\tlengths/widths on H3", "Date": "Sun, 17 Sep 2017 05:19:50 +0200", "Message-ID": "<20170917031956.28010-5-stefan.bruens@rwth-aachen.de>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "References": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "MIME-Version": "1.0", "X-Originating-IP": "[85.183.223.53]", "X-ClientProxiedBy": "rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To\n\trwthex-w1-a.rwth-ad.de (2002:8682:1a9c::8682:1a9c)", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170916_202032_390719_F74BDB7D ", "X-CRM114-Status": "GOOD ( 11.36 )", "X-Spam-Score": "-4.2 (----)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [134.130.5.46 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "devicetree@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>,\n\tAndre Przywara <andre.przywara@arm.com>, linux-kernel@vger.kernel.org,\n\tCode Kipper <codekipper@gmail.com>, Chen-Yu Tsai <wens@csie.org>,\n\tRob Herring <robh+dt@kernel.org>, dmaengine@vger.kernel.org,\n\tMaxime Ripard <maxime.ripard@free-electrons.com>,\n\tlinux-arm-kernel@lists.infradead.org", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with\na width of 1, 2, 4 or 8 bytes.\n\nThe register value for the the width is log2-encoded, change the\nconversion function to provide the correct value for width == 8.\n\nSigned-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>\n---\n drivers/dma/sun6i-dma.c | 54 ++++++++++++++++++++++++++++++++++++++++---------\n 1 file changed, 45 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c\nindex 663f4b0b450e..f2ee914cd755 100644\n--- a/drivers/dma/sun6i-dma.c\n+++ b/drivers/dma/sun6i-dma.c\n@@ -120,6 +120,8 @@ struct sun6i_dma_config {\n \tvoid (*set_burst_length)(u32 *p_cfg, s8 src_burst, s8 dst_burst);\n \tu32 src_burst_lengths;\n \tu32 dst_burst_lengths;\n+\tu32 src_addr_widths;\n+\tu32 dst_addr_widths;\n };\n \n /*\n@@ -259,8 +261,12 @@ static inline s8 convert_burst(u32 maxburst)\n \tswitch (maxburst) {\n \tcase 1:\n \t\treturn 0;\n+\tcase 4:\n+\t\treturn 1;\n \tcase 8:\n \t\treturn 2;\n+\tcase 16:\n+\t\treturn 3;\n \tdefault:\n \t\treturn -EINVAL;\n \t}\n@@ -268,7 +274,7 @@ static inline s8 convert_burst(u32 maxburst)\n \n static inline s8 convert_buswidth(enum dma_slave_buswidth addr_width)\n {\n-\treturn addr_width >> 1;\n+\treturn ilog2(addr_width);\n }\n \n static void sun6i_enable_clock_autogate_noop(struct sun6i_dma_dev *sdev)\n@@ -1045,6 +1051,12 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = {\n \t.set_burst_length = sun6i_set_burst_length_a31;\n \t.src_burst_lengths = BIT(1) | BIT(8);\n \t.dst_burst_lengths = BIT(1) | BIT(8);\n+\t.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n+\t.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n };\n \n /*\n@@ -1060,6 +1072,12 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {\n \t.set_burst_length = sun6i_set_burst_length_a31;\n \t.src_burst_lengths = BIT(1) | BIT(8);\n \t.dst_burst_lengths = BIT(1) | BIT(8);\n+\t.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n+\t.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n };\n \n static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n@@ -1070,11 +1088,19 @@ static struct sun6i_dma_config sun8i_a83t_dma_cfg = {\n \t.set_burst_length = sun6i_set_burst_length_a31;\n \t.src_burst_lengths = BIT(1) | BIT(8);\n \t.dst_burst_lengths = BIT(1) | BIT(8);\n+\t.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n+\t.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n };\n \n /*\n * The H3 has 12 physical channels, a maximum DRQ port id of 27,\n * and a total of 34 usable source and destination endpoints.\n+ * It also supports additional burst lengths and bus widths,\n+ * and the burst length fields have different offsets.\n */\n \n static struct sun6i_dma_config sun8i_h3_dma_cfg = {\n@@ -1083,8 +1109,16 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {\n \t.nr_max_vchans = 34,\n \t.clock_autogate_enable = sun6i_enable_clock_autogate_h3;\n \t.set_burst_length = sun6i_set_burst_length_h3;\n-\t.src_burst_lengths = BIT(1) | BIT(8);\n-\t.dst_burst_lengths = BIT(1) | BIT(8);\n+\t.src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16);\n+\t.dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16);\n+\t.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);\n+\t.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);\n };\n \n /*\n@@ -1100,6 +1134,12 @@ static struct sun6i_dma_config sun8i_v3s_dma_cfg = {\n \t.set_burst_length = sun6i_set_burst_length_a31;\n \t.src_burst_lengths = BIT(1) | BIT(8);\n \t.dst_burst_lengths = BIT(1) | BIT(8);\n+\t.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n+\t.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n+\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n };\n \n static const struct of_device_id sun6i_dma_match[] = {\n@@ -1179,12 +1219,8 @@ static int sun6i_dma_probe(struct platform_device *pdev)\n \tsdc->slave.device_pause\t\t\t= sun6i_dma_pause;\n \tsdc->slave.device_resume\t\t= sun6i_dma_resume;\n \tsdc->slave.device_terminate_all\t\t= sun6i_dma_terminate_all;\n-\tsdc->slave.src_addr_widths\t\t= BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n-\t\t\t\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n-\t\t\t\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n-\tsdc->slave.dst_addr_widths\t\t= BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |\n-\t\t\t\t\t\t BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\n-\t\t\t\t\t\t BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);\n+\tsdc->slave.src_addr_widths\t\t= sdc->cfg->src_addr_widths;\n+\tsdc->slave.dst_addr_widths\t\t= sdc->cfg->dst_addr_widths;\n \tsdc->slave.directions\t\t\t= BIT(DMA_DEV_TO_MEM) |\n \t\t\t\t\t\t BIT(DMA_MEM_TO_DEV);\n \tsdc->slave.residue_granularity\t\t= DMA_RESIDUE_GRANULARITY_BURST;\n", "prefixes": [ "v2", "04/10" ] }