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GET /api/patches/814247/?format=api
{ "id": 814247, "url": "http://patchwork.ozlabs.org/api/patches/814247/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/patch/1505478062-1623-6-git-send-email-akshay.adiga@linux.vnet.ibm.com/", "project": { "id": 44, "url": "http://patchwork.ozlabs.org/api/projects/44/?format=api", "name": "skiboot firmware development", "link_name": "skiboot", "list_id": "skiboot.lists.ozlabs.org", "list_email": "skiboot@lists.ozlabs.org", "web_url": "http://github.com/open-power/skiboot", "scm_url": "http://github.com/open-power/skiboot", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505478062-1623-6-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "list_archive_url": null, "date": "2017-09-15T12:20:59", "name": "[v5,5/8] SLW: Configure self-restore for HRMOR", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "7fb45f843d0db2b4ec090f339fd5646b671051b0", "submitter": { "id": 68766, "url": "http://patchwork.ozlabs.org/api/people/68766/?format=api", "name": "Akshay Adiga", "email": "akshay.adiga@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/skiboot/patch/1505478062-1623-6-git-send-email-akshay.adiga@linux.vnet.ibm.com/mbox/", "series": [ { "id": 3295, "url": "http://patchwork.ozlabs.org/api/series/3295/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/list/?series=3295", "date": "2017-09-15T12:20:54", "name": "Enable stop4 idle state", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/3295/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814247/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814247/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtvdw5qcDz9s3w\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 22:21:40 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xtvdw56kTzDrYr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 22:21:40 +1000 (AEST)", "from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xtvdr6cWFzDrYk\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 22:21:36 +1000 (AEST)", "from pps.filterd (m0098410.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8FCLPw1058336\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 08:21:34 -0400", "from e23smtp05.au.ibm.com (e23smtp05.au.ibm.com [202.81.31.147])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2d0dsajyyc-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 08:21:34 -0400", "from localhost\n\tby e23smtp05.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <skiboot@lists.ozlabs.org> from <akshay.adiga@linux.vnet.ibm.com>;\n\tFri, 15 Sep 2017 22:21:28 +1000", "from d23relay09.au.ibm.com (202.81.31.228)\n\tby e23smtp05.au.ibm.com (202.81.31.211) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tFri, 15 Sep 2017 22:21:27 +1000", "from d23av06.au.ibm.com (d23av06.au.ibm.com [9.190.235.151])\n\tby d23relay09.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n\tv8FCLQ7e39649310\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 22:21:26 +1000", "from d23av06.au.ibm.com (localhost [127.0.0.1])\n\tby d23av06.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id\n\tv8FCLQng024673\n\tfor <skiboot@lists.ozlabs.org>; Fri, 15 Sep 2017 22:21:26 +1000", "from aksadiga.in.ibm.com (aksadiga.in.ibm.com [9.124.35.28])\n\tby d23av06.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id\n\tv8FCL61N024170; Fri, 15 Sep 2017 22:21:23 +1000" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=akshay.adiga@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "From": "Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>", "To": "skiboot@lists.ozlabs.org", "Date": "Fri, 15 Sep 2017 17:50:59 +0530", "X-Mailer": "git-send-email 2.5.5", "In-Reply-To": "<1505478062-1623-1-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "References": "<1505478062-1623-1-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "X-TM-AS-MML": "disable", "x-cbid": "17091512-0016-0000-0000-000002650E2A", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17091512-0017-0000-0000-000006EA1AAF", "Message-Id": "<1505478062-1623-6-git-send-email-akshay.adiga@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-15_05:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=1\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709150179", "Subject": "[Skiboot] [PATCH v5 5/8] SLW: Configure self-restore for HRMOR", "X-BeenThere": "skiboot@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Mailing list for skiboot development <skiboot.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/skiboot>,\n\t<mailto:skiboot-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/skiboot/>", "List-Post": "<mailto:skiboot@lists.ozlabs.org>", "List-Help": "<mailto:skiboot-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/skiboot>,\n\t<mailto:skiboot-request@lists.ozlabs.org?subject=subscribe>", "Cc": "ego@linux.vnet.ibm.com, shriyak@linux.vnet.ibm.com", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"Skiboot\"\n\t<skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "Make a stop api call using libpore to restore HRMOR register. HRMOR needs\nto be cleared so that when thread exits stop, they arrives at linux\nsystem_reset vector (0x100).\n\nSigned-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>\nReviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>\n---\n hw/slw.c | 29 +++++++++++++++++++++++++++++\n 1 file changed, 29 insertions(+)", "diff": "diff --git a/hw/slw.c b/hw/slw.c\nindex a1ed7ba..39aa4d0 100644\n--- a/hw/slw.c\n+++ b/hw/slw.c\n@@ -1254,12 +1254,41 @@ static void slw_patch_regs(struct proc_chip *chip)\n static void slw_init_chip_p9(struct proc_chip *chip)\n {\n \tstruct cpu_thread *c;\n+\tint rc;\n \n \tprlog(PR_DEBUG, \"SLW: Init chip 0x%x\\n\", chip->id);\n \n \t/* At power ON setup inits for power-mgt */\n \tfor_each_available_core_in_chip(c, chip->id)\n \t\tslw_set_overrides_p9(chip, c);\n+\n+\tif (!chip->homer_base) {\n+\t\tlog_simple_error(&e_info(OPAL_RC_SLW_REG),\n+\t\t\t\t \"SLW: HOMER base not set %x\\n\",\n+\t\t\t\t chip->id);\n+\t\treturn;\n+\t}\n+\n+\tprlog(PR_NOTICE, \"SLW: Configuring self-restore for HRMOR\\n\");\n+\n+\t/* Should this be for_each_present_cpu() ? */\n+\tfor_each_available_cpu(c) {\n+\t\tif (c->chip_id != chip->id)\n+\t\t\tcontinue;\n+\n+\t\t/*\n+\t\t * Clear HRMOR. Need to update only for thread\n+\t\t * 0 of each core. Doing it anyway for all threads\n+\t\t */\n+\t\trc = p9_stop_save_cpureg((void *)chip->homer_base,\n+\t\t\t\t\t\tP9_STOP_SPR_HRMOR, 0,\n+\t\t\t\t\t c->pir);\n+\t\tif (rc) {\n+\t\t\tlog_simple_error(&e_info(OPAL_RC_SLW_REG),\n+\t\t\t\t \"SLW: Failed to set HRMOR for CPU %x,RC=0x%x\\n\",\n+\t\t\t\t c->pir, rc);\n+\t\t}\n+\t}\n }\n static void slw_init_chip(struct proc_chip *chip)\n {\n", "prefixes": [ "v5", "5/8" ] }